OMAP3: Fix SDRC init

Defaults are for Infineon DDR timings.
Since none of the supported boards currently do
XIP boot, these seem to be faulty. fix the values
as per the calculations(ACTIMA,B), conf
the sdrc power with pwdnen and wakeupproc bits

Signed-off-by: Nishanth Menon <nm@ti.com>

diff --git a/cpu/arm_cortexa8/omap3/mem.c b/cpu/arm_cortexa8/omap3/mem.c
index 2c2d4f7b4bc30075550336ffc48956e9c51e4d4b..dfb7e4c2ad71831095a4ae014cb1e0203077b8ce 100644 (file)
--- a/cpu/arm_cortexa8/omap3/mem.c
+++ b/cpu/arm_cortexa8/omap3/mem.c
@@ -164,7 +164,8 @@ void do_sdrc_init(u32 cs, u32 early)
                writel(SDRC_SHARING, &sdrc_base->sharing);
 
                /* Disable Power Down of CKE cuz of 1 CKE on combo part */
-               writel(SRFRONRESET | PAGEPOLICY_HIGH, &sdrc_base->power);
+               writel(WAKEUPPROC | PWDNEN | SRFRONRESET | PAGEPOLICY_HIGH,
+                               &sdrc_base->power);
 
                writel(ENADLL | DLLPHASE_90, &sdrc_base->dlla_ctrl);
                sdelay(0x20000);

diff --git a/include/asm-arm/arch-omap3/cpu.h b/include/asm-arm/arch-omap3/cpu.h
index 8ab2e391bc33b244bb54ff8ec19f67ff17e136ca..e51c4f3293d1c1a315eb74a20c879f9bb75e83e4 100644 (file)
--- a/include/asm-arm/arch-omap3/cpu.h
+++ b/include/asm-arm/arch-omap3/cpu.h
@@ -222,6 +222,7 @@ struct sdrc {
 
 #define PAGEPOLICY_HIGH                (0x1 << 0)
 #define SRFRONRESET            (0x1 << 7)
+#define PWDNEN                 (0x1 << 2)
 #define WAKEUPPROC             (0x1 << 26)
 
 #define DDR_SDRAM              (0x1 << 0)