ARM: tegra: pack pinmux data tables tighter
authorStephen Warren <swarren@nvidia.com>
Fri, 21 Mar 2014 21:58:03 +0000 (15:58 -0600)
committerTom Warren <twarren@nvidia.com>
Thu, 17 Apr 2014 15:41:06 +0000 (08:41 -0700)
Use smaller fields in the Tegra pinmux structures in order to pack the
data tables into a smaller space. This saves around 1-3KB for the SPL
and around 3-8KB for the main build of U-Boot, depending on the board,
which SoC it uses, and how many pinmux table entries there are.

In order to pack PMUX_FUNC_* into a smaller space, don't hard-code the
values of PMUX_FUNC_RSVD* to values which require 16 bits to store them,
but instead let their values be assigned automatically, so they end up
fitting into 8 bits.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
arch/arm/cpu/tegra-common/pinmux-common.c
arch/arm/include/asm/arch-tegra/pinmux.h
arch/arm/include/asm/arch-tegra114/pinmux.h
arch/arm/include/asm/arch-tegra124/pinmux.h
arch/arm/include/asm/arch-tegra20/pinmux.h
arch/arm/include/asm/arch-tegra30/pinmux.h

index 32a46d53f068e3b35875a8cb037a47d0059c3177..d62618cd0f618230fd01a85766e949e6a61a1554 100644 (file)
@@ -14,8 +14,7 @@
 
 /* return 1 if a pmux_func is in range */
 #define pmux_func_isvalid(func) \
-       ((((func) >= 0) && ((func) < PMUX_FUNC_COUNT)) || \
-        (((func) >= PMUX_FUNC_RSVD1) && ((func) <= PMUX_FUNC_RSVD4)))
+       (((func) >= 0) && ((func) < PMUX_FUNC_COUNT))
 
 /* return 1 if a pin_pupd_is in range */
 #define pmux_pin_pupd_isvalid(pupd) \
@@ -97,8 +96,8 @@ void pinmux_set_func(enum pmux_pingrp pin, enum pmux_func func)
        assert(pmux_pingrp_isvalid(pin));
        assert(pmux_func_isvalid(func));
 
-       if (func & PMUX_FUNC_RSVD1) {
-               mux = func & 3;
+       if (func >= PMUX_FUNC_RSVD1) {
+               mux = (func - PMUX_FUNC_RSVD1) & 3;
        } else {
                /* Search for the appropriate function */
                for (i = 0; i < 4; i++) {
index 80b804694aee5a79c2db3c79f228c3093efa5f16..035159d665371fa6100bebf6ed60eea8c5ff65eb 100644 (file)
@@ -64,18 +64,18 @@ enum pmux_pin_rcv_sel {
  * available is pinmux_config_table() to configure a list of pins.
  */
 struct pmux_pingrp_config {
-       enum pmux_pingrp pingrp;        /* pin group PMUX_PINGRP_...        */
-       enum pmux_func func;            /* function to assign PMUX_FUNC_... */
-       enum pmux_pull pull;            /* pull up/down/normal PMUX_PULL_...*/
-       enum pmux_tristate tristate;    /* tristate or normal PMUX_TRI_...  */
+       u32 pingrp:16;          /* pin group PMUX_PINGRP_...        */
+       u32 func:8;             /* function to assign PMUX_FUNC_... */
+       u32 pull:2;             /* pull up/down/normal PMUX_PULL_...*/
+       u32 tristate:2;         /* tristate or normal PMUX_TRI_...  */
 #ifdef TEGRA_PMX_HAS_PIN_IO_BIT_ETC
-       enum pmux_pin_io io;            /* input or output PMUX_PIN_...     */
-       enum pmux_pin_lock lock;        /* lock enable/disable PMUX_PIN...  */
-       enum pmux_pin_od od;            /* open-drain or push-pull driver   */
-       enum pmux_pin_ioreset ioreset;  /* input/output reset PMUX_PIN...   */
+       u32 io:2;               /* input or output PMUX_PIN_...     */
+       u32 lock:2;             /* lock enable/disable PMUX_PIN...  */
+       u32 od:2;               /* open-drain or push-pull driver   */
+       u32 ioreset:2;          /* input/output reset PMUX_PIN...   */
 #ifdef TEGRA_PMX_HAS_RCV_SEL
-       enum pmux_pin_rcv_sel rcv_sel;  /* select between High and Normal  */
-                                       /* VIL/VIH receivers */
+       u32 rcv_sel:2;          /* select between High and Normal  */
+                               /* VIL/VIH receivers */
 #endif
 #endif
 };
@@ -151,14 +151,14 @@ enum pmux_hsm {
  * This defines the configuration for a pin group's pad control config
  */
 struct pmux_drvgrp_config {
-       enum pmux_drvgrp drvgrp;        /* pin group PMUX_DRVGRP_x   */
-       int slwf;                       /* falling edge slew         */
-       int slwr;                       /* rising edge slew          */
-       int drvup;                      /* pull-up drive strength    */
-       int drvdn;                      /* pull-down drive strength  */
-       enum pmux_lpmd lpmd;            /* low-power mode selection  */
-       enum pmux_schmt schmt;          /* schmidt enable            */
-       enum pmux_hsm hsm;              /* high-speed mode enable    */
+       u32 drvgrp:16;  /* pin group PMUX_DRVGRP_x   */
+       u32 slwf:3;             /* falling edge slew         */
+       u32 slwr:3;             /* rising edge slew          */
+       u32 drvup:8;            /* pull-up drive strength    */
+       u32 drvdn:8;            /* pull-down drive strength  */
+       u32 lpmd:3;             /* low-power mode selection  */
+       u32 schmt:2;            /* schmidt enable            */
+       u32 hsm:2;              /* high-speed mode enable    */
 };
 
 /**
@@ -173,10 +173,10 @@ void pinmux_config_drvgrp_table(const struct pmux_drvgrp_config *config,
 #endif /* TEGRA_PMX_HAS_DRVGRPS */
 
 struct pmux_pingrp_desc {
-       enum pmux_func funcs[4];
+       u8 funcs[4];
 #if defined(CONFIG_TEGRA20)
-       u32 ctl_id;
-       u32 pull_id;
+       u8 ctl_id;
+       u8 pull_id;
 #endif /* CONFIG_TEGRA20 */
 };
 
index 0df69e3ab34b0f9125a58f61d1418106a4570631..c1cb3ef16b1a3b987de22e68b2f06822cf7aa7bf 100644 (file)
@@ -305,11 +305,11 @@ enum pmux_func {
        PMUX_FUNC_VI,
        PMUX_FUNC_VI_ALT1,
        PMUX_FUNC_VI_ALT3,
+       PMUX_FUNC_RSVD1,
+       PMUX_FUNC_RSVD2,
+       PMUX_FUNC_RSVD3,
+       PMUX_FUNC_RSVD4,
        PMUX_FUNC_COUNT,
-       PMUX_FUNC_RSVD1 = 0x8000,
-       PMUX_FUNC_RSVD2 = 0x8001,
-       PMUX_FUNC_RSVD3 = 0x8002,
-       PMUX_FUNC_RSVD4 = 0x8003,
 };
 
 #define TEGRA_PMX_HAS_PIN_IO_BIT_ETC
index 70254b5c731e13209d1250ffc1076d8c5d667257..c49801c21d072d3e06e9bf0c8275e6d2420c4568 100644 (file)
@@ -327,11 +327,11 @@ enum pmux_func {
        PMUX_FUNC_VI_ALT3,
        PMUX_FUNC_VIMCLK2,
        PMUX_FUNC_VIMCLK2_ALT,
+       PMUX_FUNC_RSVD1,
+       PMUX_FUNC_RSVD2,
+       PMUX_FUNC_RSVD3,
+       PMUX_FUNC_RSVD4,
        PMUX_FUNC_COUNT,
-       PMUX_FUNC_RSVD1 = 0x8000,
-       PMUX_FUNC_RSVD2 = 0x8001,
-       PMUX_FUNC_RSVD3 = 0x8002,
-       PMUX_FUNC_RSVD4 = 0x8003,
 };
 
 #define TEGRA_PMX_HAS_PIN_IO_BIT_ETC
index d7802d9675979ac118c4d2b1da956e31320d77b7..11c0104ff3e024681cb45c4561d24ed32687d095 100644 (file)
@@ -225,11 +225,11 @@ enum pmux_func {
        PMUX_FUNC_VI,
        PMUX_FUNC_VI_SENSOR_CLK,
        PMUX_FUNC_XIO,
+       PMUX_FUNC_RSVD1,
+       PMUX_FUNC_RSVD2,
+       PMUX_FUNC_RSVD3,
+       PMUX_FUNC_RSVD4,
        PMUX_FUNC_COUNT,
-       PMUX_FUNC_RSVD1 = 0x8000,
-       PMUX_FUNC_RSVD2 = 0x8001,
-       PMUX_FUNC_RSVD3 = 0x8002,
-       PMUX_FUNC_RSVD4 = 0x8003,
 };
 
 #include <asm/arch-tegra/pinmux.h>
index 3fed194339dd78637193ddf56926746b2ad62721..6d83061dc1e9a290418e2fa6caa15da00b4819ab 100644 (file)
@@ -383,11 +383,11 @@ enum pmux_func {
        PMUX_FUNC_VI_ALT1,
        PMUX_FUNC_VI_ALT2,
        PMUX_FUNC_VI_ALT3,
+       PMUX_FUNC_RSVD1,
+       PMUX_FUNC_RSVD2,
+       PMUX_FUNC_RSVD3,
+       PMUX_FUNC_RSVD4,
        PMUX_FUNC_COUNT,
-       PMUX_FUNC_RSVD1 = 0x8000,
-       PMUX_FUNC_RSVD2 = 0x8001,
-       PMUX_FUNC_RSVD3 = 0x8002,
-       PMUX_FUNC_RSVD4 = 0x8003,
 };
 
 #define TEGRA_PMX_HAS_PIN_IO_BIT_ETC