imx: correct speed grading info for i.MX6UL

Correct speed grading info for i.MX6UL

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>

diff --git a/arch/arm/cpu/armv7/mx6/soc.c b/arch/arm/cpu/armv7/mx6/soc.c
index d4b22ad7f315072c8df91be9c3b214c15879eeb7..aaa1adb446c1ea2fa289308062d0f5aa7700e5f7 100644 (file)
--- a/arch/arm/cpu/armv7/mx6/soc.c
+++ b/arch/arm/cpu/armv7/mx6/soc.c
@@ -108,6 +108,12 @@ u32 get_cpu_rev(void)
 #define OCOTP_CFG3_SPEED_1GHZ  2
 #define OCOTP_CFG3_SPEED_1P2GHZ        3
 
+/*
+ * For i.MX6UL
+ */
+#define OCOTP_CFG3_SPEED_528MHZ 1
+#define OCOTP_CFG3_SPEED_696MHZ 2
+
 u32 get_cpu_speed_grade_hz(void)
 {
        struct ocotp_regs *ocotp = (struct ocotp_regs *)OCOTP_BASE_ADDR;
@@ -120,6 +126,15 @@ u32 get_cpu_speed_grade_hz(void)
        val >>= OCOTP_CFG3_SPEED_SHIFT;
        val &= 0x3;
 
+       if (is_cpu_type(MXC_CPU_MX6UL)) {
+               if (val == OCOTP_CFG3_SPEED_528MHZ)
+                       return 528000000;
+               else if (val == OCOTP_CFG3_SPEED_696MHZ)
+                       return 69600000;
+               else
+                       return 0;
+       }
+
        switch (val) {
        /* Valid for IMX6DQ */
        case OCOTP_CFG3_SPEED_1P2GHZ: