dm: serial: use Driver Model for UniPhier serial driver
authorMasahiro Yamada <yamada.m@jp.panasonic.com>
Thu, 23 Oct 2014 13:26:10 +0000 (22:26 +0900)
committerSimon Glass <sjg@chromium.org>
Fri, 24 Oct 2014 03:43:09 +0000 (21:43 -0600)
This commit converts UniPhier on-chip serial driver to driver model.

Since UniPhier SoCs do not have Device Tree support, some board files
should be added under arch/arm/cpu/armv7/uniphier/ph1-*/ directories.
(Device Tree support for UniPhier platform is still under way.)

Now the base address and master clock frequency are passed from
platform data, so CONFIG_SYS_UNIPHIER_SERIAL_BASE* and
CONFIG_SYS_UNIPHIER_UART_CLK should be removed.

Tested on UniPhier PH1-LD4 ref board.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Simon Glass <sjg@chromium.org>
16 files changed:
arch/arm/cpu/armv7/uniphier/ph1-ld4/Makefile
arch/arm/cpu/armv7/uniphier/ph1-ld4/platdevice.c [new file with mode: 0644]
arch/arm/cpu/armv7/uniphier/ph1-pro4/Makefile
arch/arm/cpu/armv7/uniphier/ph1-pro4/platdevice.c [new file with mode: 0644]
arch/arm/cpu/armv7/uniphier/ph1-sld8/Makefile
arch/arm/cpu/armv7/uniphier/ph1-sld8/platdevice.c [new file with mode: 0644]
arch/arm/include/asm/arch-uniphier/platdevice.h [new file with mode: 0644]
configs/ph1_ld4_defconfig
configs/ph1_pro4_defconfig
configs/ph1_sld8_defconfig
drivers/serial/serial_uniphier.c
include/configs/ph1_ld4.h
include/configs/ph1_pro4.h
include/configs/ph1_sld8.h
include/configs/uniphier-common.h
include/dm/platform_data/serial-uniphier.h [new file with mode: 0644]

index b385e195447a71b3de2a762228458248999ce5b2..781b511a97b499090b4485f78a57d60070b10673 100644 (file)
@@ -3,6 +3,7 @@
 #
 
 obj-$(CONFIG_DISPLAY_BOARDINFO) += board_info.o
+obj-y += platdevice.o
 obj-y += boot-mode.o
 obj-$(CONFIG_BOARD_POSTCLK_INIT) += board_postclk_init.o bcu_init.o \
                sbc_init.o sg_init.o pll_init.o clkrst_init.o pinctrl.o
diff --git a/arch/arm/cpu/armv7/uniphier/ph1-ld4/platdevice.c b/arch/arm/cpu/armv7/uniphier/ph1-ld4/platdevice.c
new file mode 100644 (file)
index 0000000..0047223
--- /dev/null
@@ -0,0 +1,15 @@
+/*
+ * Copyright (C) 2014 Panasonic Corporation
+ *   Author: Masahiro Yamada <yamada.m@jp.panasonic.com>
+ *
+ * SPDX-License-Identifier:    GPL-2.0+
+ */
+
+#include <asm/arch/platdevice.h>
+
+#define UART_MASTER_CLK                36864000
+
+SERIAL_DEVICE(0, 0x54006800, UART_MASTER_CLK)
+SERIAL_DEVICE(1, 0x54006900, UART_MASTER_CLK)
+SERIAL_DEVICE(2, 0x54006a00, UART_MASTER_CLK)
+SERIAL_DEVICE(3, 0x54006b00, UART_MASTER_CLK)
index 712afd1beebe74f0163041ee0adf517c68acd12c..e11f4f6d8b3f36c44d340f5bafdf9d8fd4858b12 100644 (file)
@@ -3,6 +3,7 @@
 #
 
 obj-$(CONFIG_DISPLAY_BOARDINFO) += board_info.o
+obj-y += platdevice.o
 obj-y += boot-mode.o
 obj-$(CONFIG_BOARD_POSTCLK_INIT) += board_postclk_init.o sbc_init.o \
                                sg_init.o pll_init.o clkrst_init.o pinctrl.o
diff --git a/arch/arm/cpu/armv7/uniphier/ph1-pro4/platdevice.c b/arch/arm/cpu/armv7/uniphier/ph1-pro4/platdevice.c
new file mode 100644 (file)
index 0000000..6da921e
--- /dev/null
@@ -0,0 +1,15 @@
+/*
+ * Copyright (C) 2014 Panasonic Corporation
+ *   Author: Masahiro Yamada <yamada.m@jp.panasonic.com>
+ *
+ * SPDX-License-Identifier:    GPL-2.0+
+ */
+
+#include <asm/arch/platdevice.h>
+
+#define UART_MASTER_CLK                73728000
+
+SERIAL_DEVICE(0, 0x54006800, UART_MASTER_CLK)
+SERIAL_DEVICE(1, 0x54006900, UART_MASTER_CLK)
+SERIAL_DEVICE(2, 0x54006a00, UART_MASTER_CLK)
+SERIAL_DEVICE(3, 0x54006b00, UART_MASTER_CLK)
index b385e195447a71b3de2a762228458248999ce5b2..781b511a97b499090b4485f78a57d60070b10673 100644 (file)
@@ -3,6 +3,7 @@
 #
 
 obj-$(CONFIG_DISPLAY_BOARDINFO) += board_info.o
+obj-y += platdevice.o
 obj-y += boot-mode.o
 obj-$(CONFIG_BOARD_POSTCLK_INIT) += board_postclk_init.o bcu_init.o \
                sbc_init.o sg_init.o pll_init.o clkrst_init.o pinctrl.o
diff --git a/arch/arm/cpu/armv7/uniphier/ph1-sld8/platdevice.c b/arch/arm/cpu/armv7/uniphier/ph1-sld8/platdevice.c
new file mode 100644 (file)
index 0000000..59d054a
--- /dev/null
@@ -0,0 +1,15 @@
+/*
+ * Copyright (C) 2014 Panasonic Corporation
+ *   Author: Masahiro Yamada <yamada.m@jp.panasonic.com>
+ *
+ * SPDX-License-Identifier:    GPL-2.0+
+ */
+
+#include <asm/arch/platdevice.h>
+
+#define UART_MASTER_CLK                80000000
+
+SERIAL_DEVICE(0, 0x54006800, UART_MASTER_CLK)
+SERIAL_DEVICE(1, 0x54006900, UART_MASTER_CLK)
+SERIAL_DEVICE(2, 0x54006a00, UART_MASTER_CLK)
+SERIAL_DEVICE(3, 0x54006b00, UART_MASTER_CLK)
diff --git a/arch/arm/include/asm/arch-uniphier/platdevice.h b/arch/arm/include/asm/arch-uniphier/platdevice.h
new file mode 100644 (file)
index 0000000..cdf7d13
--- /dev/null
@@ -0,0 +1,24 @@
+/*
+ * Copyright (C) 2014 Panasonic Corporation
+ *   Author: Masahiro Yamada <yamada.m@jp.panasonic.com>
+ *
+ * SPDX-License-Identifier:    GPL-2.0+
+ */
+
+#ifndef ARCH_PLATDEVICE_H
+#define ARCH_PLATDEVICE_H
+
+#include <dm/platdata.h>
+#include <dm/platform_data/serial-uniphier.h>
+
+#define SERIAL_DEVICE(n, ba, clk)                                      \
+static struct uniphier_serial_platform_data serial_device##n = {       \
+       .base = ba,                                                     \
+       .uartclk = clk                                                  \
+};                                                                     \
+U_BOOT_DEVICE(serial##n) = {                                           \
+       .name = DRIVER_NAME,                                            \
+       .platdata = &serial_device##n                                   \
+};
+
+#endif /* ARCH_PLATDEVICE_H */
index 53f3126e71e43e453d00815e4222de3204e38016..c8404f8a8ee421a5f48fdf788b0adf0dac0a4eaa 100644 (file)
@@ -2,7 +2,9 @@ CONFIG_SPL=y
 +S:CONFIG_ARM=y
 +S:CONFIG_ARCH_UNIPHIER=y
 +S:CONFIG_MACH_PH1_LD4=y
+CONFIG_DM=y
 CONFIG_NAND_DENALI=y
 CONFIG_SYS_NAND_DENALI_64BIT=y
 CONFIG_NAND_DENALI_SPARE_AREA_SKIP_BYTES=8
+CONFIG_DM_SERIAL=y
 S:CONFIG_SPL_NAND_DENALI=y
index 209466ebcb334c900e54692ac75993e7e5dbb00d..5c051e36a0371ca93f45238020b532885bd85149 100644 (file)
@@ -2,7 +2,9 @@ CONFIG_SPL=y
 +S:CONFIG_ARM=y
 +S:CONFIG_ARCH_UNIPHIER=y
 +S:CONFIG_MACH_PH1_PRO4=y
+CONFIG_DM=y
 CONFIG_NAND_DENALI=y
 CONFIG_SYS_NAND_DENALI_64BIT=y
 CONFIG_NAND_DENALI_SPARE_AREA_SKIP_BYTES=8
+CONFIG_DM_SERIAL=y
 S:CONFIG_SPL_NAND_DENALI=y
index 658977bcf6293f8b58e358c1c2bc8d75d0050342..2c636e60d14ba1c342f2b5793c9f55385bd543c3 100644 (file)
@@ -2,7 +2,9 @@ CONFIG_SPL=y
 +S:CONFIG_ARM=y
 +S:CONFIG_ARCH_UNIPHIER=y
 +S:CONFIG_MACH_PH1_SLD8=y
+CONFIG_DM=y
 CONFIG_NAND_DENALI=y
 CONFIG_SYS_NAND_DENALI_64BIT=y
 CONFIG_NAND_DENALI_SPARE_AREA_SKIP_BYTES=8
+CONFIG_DM_SERIAL=y
 S:CONFIG_SPL_NAND_DENALI=y
index f8c9d921e283028c5fe199efa7b081bbfc08d09f..9114b3ed6002a1a0d9e3c6303ad07993060b07f9 100644 (file)
@@ -2,14 +2,14 @@
  * Copyright (C) 2012-2014 Panasonic Corporation
  *   Author: Masahiro Yamada <yamada.m@jp.panasonic.com>
  *
- * Based on serial_ns16550.c
- * (C) Copyright 2000
- * Rob Taylor, Flying Pig Systems. robt@flyingpig.com.
- *
  * SPDX-License-Identifier:    GPL-2.0+
  */
 
 #include <common.h>
+#include <asm/io.h>
+#include <asm/errno.h>
+#include <dm/device.h>
+#include <dm/platform_data/serial-uniphier.h>
 #include <serial.h>
 
 #define UART_REG(x)                                    \
@@ -48,157 +48,104 @@ struct uniphier_serial {
 #define UART_LSR_DR    0x01            /* Data ready */
 #define UART_LSR_THRE  0x20            /* Xmit holding register empty */
 
-DECLARE_GLOBAL_DATA_PTR;
+struct uniphier_serial_private_data {
+       struct uniphier_serial __iomem *membase;
+};
+
+#define uniphier_serial_port(dev)      \
+       ((struct uniphier_serial_private_data *)dev_get_priv(dev))->membase
 
-static void uniphier_serial_init(struct uniphier_serial *port)
+int uniphier_serial_setbrg(struct udevice *dev, int baudrate)
 {
+       struct uniphier_serial_platform_data *plat = dev_get_platdata(dev);
+       struct uniphier_serial __iomem *port = uniphier_serial_port(dev);
        const unsigned int mode_x_div = 16;
        unsigned int divisor;
 
        writeb(UART_LCR_WLS_8, &port->lcr);
 
-       divisor = DIV_ROUND_CLOSEST(CONFIG_SYS_UNIPHIER_UART_CLK,
-                                               mode_x_div * gd->baudrate);
+       divisor = DIV_ROUND_CLOSEST(plat->uartclk, mode_x_div * baudrate);
 
        writew(divisor, &port->dlr);
-}
 
-static void uniphier_serial_setbrg(struct uniphier_serial *port)
-{
-       uniphier_serial_init(port);
+       return 0;
 }
 
-static int uniphier_serial_tstc(struct uniphier_serial *port)
+static int uniphier_serial_getc(struct udevice *dev)
 {
-       return (readb(&port->lsr) & UART_LSR_DR) != 0;
-}
+       struct uniphier_serial __iomem *port = uniphier_serial_port(dev);
 
-static int uniphier_serial_getc(struct uniphier_serial *port)
-{
-       while (!uniphier_serial_tstc(port))
-               ;
+       if (!(readb(&port->lsr) & UART_LSR_DR))
+               return -EAGAIN;
 
        return readb(&port->rbr);
 }
 
-static void uniphier_serial_putc(struct uniphier_serial *port, const char c)
+static int uniphier_serial_putc(struct udevice *dev, const char c)
 {
-       if (c == '\n')
-               uniphier_serial_putc(port, '\r');
+       struct uniphier_serial __iomem *port = uniphier_serial_port(dev);
 
-       while (!(readb(&port->lsr) & UART_LSR_THRE))
-               ;
+       if (!(readb(&port->lsr) & UART_LSR_THRE))
+               return -EAGAIN;
 
        writeb(c, &port->thr);
+
+       return 0;
 }
 
-static struct uniphier_serial *serial_ports[4] = {
-#ifdef CONFIG_SYS_UNIPHIER_SERIAL_BASE0
-       (struct uniphier_serial *)CONFIG_SYS_UNIPHIER_SERIAL_BASE0,
-#else
-       NULL,
-#endif
-#ifdef CONFIG_SYS_UNIPHIER_SERIAL_BASE1
-       (struct uniphier_serial *)CONFIG_SYS_UNIPHIER_SERIAL_BASE1,
-#else
-       NULL,
-#endif
-#ifdef CONFIG_SYS_UNIPHIER_SERIAL_BASE2
-       (struct uniphier_serial *)CONFIG_SYS_UNIPHIER_SERIAL_BASE2,
-#else
-       NULL,
-#endif
-#ifdef CONFIG_SYS_UNIPHIER_SERIAL_BASE3
-       (struct uniphier_serial *)CONFIG_SYS_UNIPHIER_SERIAL_BASE3,
-#else
-       NULL,
-#endif
-};
+int uniphier_serial_probe(struct udevice *dev)
+{
+       struct uniphier_serial_private_data *priv = dev_get_priv(dev);
+       struct uniphier_serial_platform_data *plat = dev_get_platdata(dev);
 
-/* Multi serial device functions */
-#define DECLARE_ESERIAL_FUNCTIONS(port) \
-       static int  eserial##port##_init(void) \
-       { \
-               uniphier_serial_init(serial_ports[port]); \
-               return 0 ; \
-       } \
-       static void eserial##port##_setbrg(void) \
-       { \
-               uniphier_serial_setbrg(serial_ports[port]); \
-       } \
-       static int  eserial##port##_getc(void) \
-       { \
-               return uniphier_serial_getc(serial_ports[port]); \
-       } \
-       static int  eserial##port##_tstc(void) \
-       { \
-               return uniphier_serial_tstc(serial_ports[port]); \
-       } \
-       static void eserial##port##_putc(const char c) \
-       { \
-               uniphier_serial_putc(serial_ports[port], c); \
-       }
-
-/* Serial device descriptor */
-#define INIT_ESERIAL_STRUCTURE(port, __name) { \
-       .name   = __name,                       \
-       .start  = eserial##port##_init,         \
-       .stop   = NULL,                         \
-       .setbrg = eserial##port##_setbrg,       \
-       .getc   = eserial##port##_getc,         \
-       .tstc   = eserial##port##_tstc,         \
-       .putc   = eserial##port##_putc,         \
-       .puts   = default_serial_puts,          \
-}
+       priv->membase = map_sysmem(plat->base, sizeof(struct uniphier_serial));
 
-#if defined(CONFIG_SYS_UNIPHIER_SERIAL_BASE0)
-DECLARE_ESERIAL_FUNCTIONS(0);
-struct serial_device uniphier_serial0_device =
-       INIT_ESERIAL_STRUCTURE(0, "ttyS0");
-#endif
-#if defined(CONFIG_SYS_UNIPHIER_SERIAL_BASE1)
-DECLARE_ESERIAL_FUNCTIONS(1);
-struct serial_device uniphier_serial1_device =
-       INIT_ESERIAL_STRUCTURE(1, "ttyS1");
-#endif
-#if defined(CONFIG_SYS_UNIPHIER_SERIAL_BASE2)
-DECLARE_ESERIAL_FUNCTIONS(2);
-struct serial_device uniphier_serial2_device =
-       INIT_ESERIAL_STRUCTURE(2, "ttyS2");
-#endif
-#if defined(CONFIG_SYS_UNIPHIER_SERIAL_BASE3)
-DECLARE_ESERIAL_FUNCTIONS(3);
-struct serial_device uniphier_serial3_device =
-       INIT_ESERIAL_STRUCTURE(3, "ttyS3");
-#endif
+       if (!priv->membase)
+               return -ENOMEM;
 
-__weak struct serial_device *default_serial_console(void)
+       return 0;
+}
+
+int uniphier_serial_remove(struct udevice *dev)
 {
-#if defined(CONFIG_SYS_UNIPHIER_SERIAL_BASE0)
-       return &uniphier_serial0_device;
-#elif defined(CONFIG_SYS_UNIPHIER_SERIAL_BASE1)
-       return &uniphier_serial1_device;
-#elif defined(CONFIG_SYS_UNIPHIER_SERIAL_BASE2)
-       return &uniphier_serial2_device;
-#elif defined(CONFIG_SYS_UNIPHIER_SERIAL_BASE3)
-       return &uniphier_serial3_device;
-#else
-#error "No uniphier serial ports configured."
-#endif
+       unmap_sysmem(uniphier_serial_port(dev));
+
+       return 0;
 }
 
-void uniphier_serial_initialize(void)
+#ifdef CONFIG_OF_CONTROL
+static const struct udevice_id uniphier_uart_of_match = {
+       { .compatible = "panasonic,uniphier-uart"},
+       {},
+};
+
+static int uniphier_serial_ofdata_to_platdata(struct udevice *dev)
 {
-#if defined(CONFIG_SYS_UNIPHIER_SERIAL_BASE0)
-       serial_register(&uniphier_serial0_device);
-#endif
-#if defined(CONFIG_SYS_UNIPHIER_SERIAL_BASE1)
-       serial_register(&uniphier_serial1_device);
-#endif
-#if defined(CONFIG_SYS_UNIPHIER_SERIAL_BASE2)
-       serial_register(&uniphier_serial2_device);
-#endif
-#if defined(CONFIG_SYS_UNIPHIER_SERIAL_BASE3)
-       serial_register(&uniphier_serial3_device);
-#endif
+       /*
+        * TODO: Masahiro Yamada (yamada.m@jp.panasonic.com)
+        *
+        * Implement conversion code from DTB to platform data
+        * when supporting CONFIG_OF_CONTROL on UniPhir platform.
+        */
 }
+#endif
+
+static const struct dm_serial_ops uniphier_serial_ops = {
+       .setbrg = uniphier_serial_setbrg,
+       .getc = uniphier_serial_getc,
+       .putc = uniphier_serial_putc,
+};
+
+U_BOOT_DRIVER(uniphier_serial) = {
+       .name = DRIVER_NAME,
+       .id = UCLASS_SERIAL,
+       .of_match = of_match_ptr(uniphier_uart_of_match),
+       .ofdata_to_platdata = of_match_ptr(uniphier_serial_ofdata_to_platdata),
+       .probe = uniphier_serial_probe,
+       .remove = uniphier_serial_remove,
+       .priv_auto_alloc_size = sizeof(struct uniphier_serial_private_data),
+       .platdata_auto_alloc_size =
+                               sizeof(struct uniphier_serial_platform_data),
+       .ops = &uniphier_serial_ops,
+       .flags = DM_FLAG_PRE_RELOC,
+};
index a28d7b579a6405a1b7f32e5f9ba7816681a08045..a54686593713b802d2cd490e7a0a011a1805fabd 100644 (file)
@@ -34,8 +34,6 @@
 #define CONFIG_SYS_NS16550_SERIAL
 #endif
 
-#define CONFIG_SYS_UNIPHIER_UART_CLK    36864000
-
 #define CONFIG_SMC911X
 
 #define CONFIG_DDR_NUM_CH0 1
index b79967f7da477c351e307f2b1dc879f8932a037e..85c14ba6cd0d39122b56060ae0c66d29fd9a40e5 100644 (file)
@@ -34,8 +34,6 @@
 #define CONFIG_SYS_NS16550_SERIAL
 #endif
 
-#define CONFIG_SYS_UNIPHIER_UART_CLK    73728000
-
 #define CONFIG_SMC911X
 
 #define CONFIG_DDR_NUM_CH0 2
index 9d391f1d74a2650b4d53ab5730e55aa7553866cd..41e2299beeca53713e73cd1f0e068911df8a140a 100644 (file)
@@ -34,8 +34,6 @@
 #define CONFIG_SYS_NS16550_SERIAL
 #endif
 
-#define CONFIG_SYS_UNIPHIER_UART_CLK    80000000
-
 #define CONFIG_SMC911X
 
 #define CONFIG_DDR_NUM_CH0 1
index 18fe277cada77b585012af8d5c0279ea834a7d0e..b18ae6dfaeb3551573ae9810fd4ef817428e209f 100644 (file)
@@ -33,18 +33,17 @@ are defined. Select only one of them."
 # define CONFIG_SUPPORT_CARD_UART_BASE (CONFIG_SUPPORT_CARD_BASE + 0x00200000)
 #endif
 
+#ifdef CONFIG_SYS_NS16550_SERIAL
 #define CONFIG_SYS_NS16550
 #define CONFIG_SYS_NS16550_COM1                CONFIG_SUPPORT_CARD_UART_BASE
 #define CONFIG_SYS_NS16550_CLK         12288000
 #define CONFIG_SYS_NS16550_REG_SIZE    -2
+#endif
 
 #define CONFIG_SMC911X_BASE            CONFIG_SUPPORT_CARD_ETHER_BASE
 #define CONFIG_SMC911X_32_BIT
 
-#define CONFIG_SYS_UNIPHIER_SERIAL_BASE0 0x54006800
-#define CONFIG_SYS_UNIPHIER_SERIAL_BASE1 0x54006900
-#define CONFIG_SYS_UNIPHIER_SERIAL_BASE2 0x54006a00
-#define CONFIG_SYS_UNIPHIER_SERIAL_BASE3 0x54006b00
+#define CONFIG_SYS_MALLOC_F_LEN  0x7000
 
 /*-----------------------------------------------------------------------
  * MMU and Cache Setting
diff --git a/include/dm/platform_data/serial-uniphier.h b/include/dm/platform_data/serial-uniphier.h
new file mode 100644 (file)
index 0000000..52343e3
--- /dev/null
@@ -0,0 +1,18 @@
+/*
+ * Copyright (C) 2014 Panasonic Corporation
+ *   Author: Masahiro Yamada <yamada.m@jp.panasonic.com>
+ *
+ * SPDX-License-Identifier:    GPL-2.0+
+ */
+
+#ifndef __PLAT_UNIPHIER_SERIAL_H
+#define __PLAT_UNIPHIER_SERIAL_H
+
+#define DRIVER_NAME    "uniphier-uart"
+
+struct uniphier_serial_platform_data {
+       unsigned long base;
+       unsigned int uartclk;
+};
+
+#endif /* __PLAT_UNIPHIER_SERIAL_H */