rockchip: rock2: dts: Make changes for U-Boot
authorSimon Glass <sjg@chromium.org>
Fri, 22 Jan 2016 02:45:23 +0000 (19:45 -0700)
committerSimon Glass <sjg@chromium.org>
Fri, 22 Jan 2016 03:42:37 +0000 (20:42 -0700)
Add the required pre-relocation tags and SDRAM init information for U-Boot.

Signed-off-by: Simon Glass <sjg@chromium.org>
arch/arm/dts/rk3288-rock2-square.dts

index c5453a0b07fca940227c8f24a92b838cbe43219d..8d7446fd5d63b46ad7db451be89acd07da42eab9 100644 (file)
@@ -96,6 +96,7 @@
 };
 
 &sdmmc {
+       u-boot,dm-pre-reloc;
        bus-width = <4>;
        cap-mmc-highspeed;
        cap-sd-highspeed;
 };
 
 &pinctrl {
+       u-boot,dm-pre-reloc;
        ir {
                ir_int: ir-int {
                        rockchip,pins = <8 1 RK_FUNC_GPIO &pcfg_pull_up>;
 
 &uart2 {
        status = "okay";
+       u-boot,dm-pre-reloc;
+       reg-shift = <2>;
 };
 
 &usbphy {
 &usb_host0_ehci {
        status = "okay";
 };
+
+&dmc {
+       rockchip,num-channels = <2>;
+       rockchip,pctl-timing = <0x29a 0xc8 0x1f8 0x42 0x4e 0x4 0xea 0xa
+               0x5 0x0 0xa 0x7 0x19 0x24 0xa 0x7
+               0x5 0xa 0x5 0x200 0x5 0x10 0x40 0x0
+               0x1 0x7 0x7 0x4 0xc 0x43 0x100 0x0
+               0x5 0x0>;
+       rockchip,phy-timing = <0x48f9aab4 0xea0910 0x1002c200
+               0xa60 0x40 0x10 0x0>;
+       rockchip,sdram-channel = /bits/ 8 <0x1 0xa 0x3 0x2 0x1 0x0 0xf 0xf>;
+       rockchip,sdram-params = <0x30B25564 0x627 3 666000000 3 9 1>;
+};
+
+&gpio7 {
+       u-boot,dm-pre-reloc;
+};