#include <common.h>
#include <asm/io.h>
#include <asm/arch/hardware.h>
-#include <asm/arch/at91_dbu.h>
#include <asm/arch/at91_pmc.h>
#include <asm/arch/at91_pit.h>
#include <asm/arch/at91_gpbr.h>
dcache_enable();
}
+#define ATMEL_CHIPID_CIDR_VERSION 0x1f
+
unsigned int get_chip_id(void)
{
- return readl(ATMEL_BASE_DBGU + AT91_DBU_CIDR) & ~AT91_DBU_CIDR_MASK;
+ return readl(ATMEL_CHIPID_CIDR) & ~ATMEL_CHIPID_CIDR_VERSION;
}
unsigned int get_extension_chip_id(void)
{
- return readl(ATMEL_BASE_DBGU + AT91_DBU_EXID);
+ return readl(ATMEL_CHIPID_EXID);
}
#define AT91_DBU_CID_ARCH_9xx 0x01900000
#define AT91_DBU_CID_ARCH_9XExx 0x02900000
-#define AT91_DBU_CIDR_MASK 0x1f
-#define AT91_DBU_CIDR 0x40
-#define AT91_DBU_EXID 0x44
-
#endif
#define ATMEL_BASE_RTC 0xfffffeb0
/* Reserved: 0xfffffee0 - 0xffffffff */
+#define ATMEL_CHIPID_CIDR 0xffffee40
+#define ATMEL_CHIPID_EXID 0xffffee44
+
/*
* Internal Memory.
*/