config TARGET_P2041RDB
bool "Support P2041RDB"
+ select ARCH_P2041
select PHYS_64BIT
config TARGET_QEMU_PPCE500
config TARGET_KMP204X
bool "Support kmp204x"
+ select ARCH_P2041
select PHYS_64BIT
config TARGET_XPEDITE520X
config ARCH_P2020
bool
+config ARCH_P2041
+ bool
+
source "board/freescale/b4860qds/Kconfig"
source "board/freescale/bsc9131rdb/Kconfig"
source "board/freescale/bsc9132qds/Kconfig"
obj-$(CONFIG_SYS_DPAA_QBMAN) += portals.o
# various SoC specific assignments
-obj-$(CONFIG_PPC_P2041) += p2041_ids.o
+obj-$(CONFIG_ARCH_P2041) += p2041_ids.o
obj-$(CONFIG_PPC_P3041) += p3041_ids.o
obj-$(CONFIG_PPC_P4080) += p4080_ids.o
obj-$(CONFIG_PPC_P5020) += p5020_ids.o
obj-$(CONFIG_ARCH_P1024) += p1021_serdes.o
obj-$(CONFIG_ARCH_P1025) += p1021_serdes.o
obj-$(CONFIG_ARCH_P2020) += p2020_serdes.o
-obj-$(CONFIG_PPC_P2041) += p2041_serdes.o
+obj-$(CONFIG_ARCH_P2041) += p2041_serdes.o
obj-$(CONFIG_PPC_P3041) += p3041_serdes.o
obj-$(CONFIG_PPC_P4080) += p4080_serdes.o
obj-$(CONFIG_PPC_P5020) += p5020_serdes.o
void __iomem *dcsr = (void *)CONFIG_SYS_DCSRBAR + 0xb0000;
unsigned int i;
-#if defined(CONFIG_PPC_P2041) || defined(CONFIG_PPC_P3041)
+#if defined(CONFIG_ARCH_P2041) || defined(CONFIG_PPC_P3041)
static const uint8_t offsets[] = {
0x50, 0x54, 0x58, 0x90, 0x94, 0x98
};
}
}
-#if defined(CONFIG_PPC_P2041) || defined(CONFIG_PPC_P3041)
+#if defined(CONFIG_ARCH_P2041) || defined(CONFIG_PPC_P3041)
x108 = 0x12;
#endif
#define CONFIG_SYS_FSL_ERRATUM_A004477
#define CONFIG_USB_MAX_CONTROLLER_COUNT 1
-#elif defined(CONFIG_PPC_P2041) /* also supports P2040 */
+#elif defined(CONFIG_ARCH_P2041) /* also supports P2040 */
#define CONFIG_SYS_FSL_QORIQ_CHASSIS1
#define CONFIG_FSL_CORENET /* Freescale CoreNet platform */
#define CONFIG_MAX_CPUS 4
defined(CONFIG_PPC_P4080) || \
defined(CONFIG_PPC_P5020) || \
defined(CONFIG_PPC_P5040) || \
- defined(CONFIG_PPC_P2041)
+ defined(CONFIG_ARCH_P2041)
#define CONFIG_FSL_TRUST_ARCH_v1
#endif
#define FSL_CORENET_RCWSR11_EC2_FM1_DTSEC2 0x00080000
#define FSL_CORENET_RCWSR11_EC2_USB2 0x00100000
#endif
-#if defined(CONFIG_PPC_P2041) \
+#if defined(CONFIG_ARCH_P2041) \
|| defined(CONFIG_PPC_P3041) || defined(CONFIG_PPC_P5020)
#define FSL_CORENET_RCWSR11_EC1_FM1_DTSEC4_RGMII 0x00000000
#define FSL_CORENET_RCWSR11_EC1_FM1_DTSEC4_MII 0x00800000
# SoC specific SERDES support
obj-$(CONFIG_ARCH_P1023) += p1023.o
# The P204x, P304x, and P5020 are the same
-obj-$(CONFIG_PPC_P2041) += p5020.o
+obj-$(CONFIG_ARCH_P2041) += p5020.o
obj-$(CONFIG_PPC_P3041) += p5020.o
obj-$(CONFIG_PPC_P4080) += p4080.o
obj-$(CONFIG_PPC_P5020) += p5020.o
#define __CONFIG_H
#define CONFIG_P2041RDB
-#define CONFIG_PPC_P2041
#ifdef CONFIG_RAMBOOT_PBL
#define CONFIG_RAMBOOT_TEXT_BASE CONFIG_SYS_TEXT_BASE
#ifndef _CONFIG_KMP204X_H
#define _CONFIG_KMP204X_H
-#define CONFIG_PPC_P2041
-
#define CONFIG_SYS_TEXT_BASE 0xfff40000
#define CONFIG_KM_DEF_NETDEV "netdev=eth0\0"
CONFIG_PPC_B4420
CONFIG_PPC_B4860
CONFIG_PPC_CLUSTER_START
-CONFIG_PPC_P2041
CONFIG_PPC_P3041
CONFIG_PPC_P4080
CONFIG_PPC_P5020