/*
- * Copyright 2007, Freescale Semiconductor, Inc
+ * Copyright 2007,2010 Freescale Semiconductor, Inc
* Andy Fleming
*
* Based vaguely on the pxa mmc code:
clk = (pre_div << 8) | (div << 4);
- /* On imx the clock must be stopped before changing frequency */
- if (cfg->clk_enable)
- esdhc_clrbits32(®s->sysctl, SYSCTL_CKEN);
+ esdhc_clrbits32(®s->sysctl, SYSCTL_CKEN);
esdhc_clrsetbits32(®s->sysctl, SYSCTL_CLOCK_MASK, clk);
udelay(10000);
- clk = SYSCTL_PEREN;
- /* On imx systems the clock must be explicitely enabled */
- if (cfg->clk_enable)
- clk |= SYSCTL_CKEN;
+ clk = SYSCTL_PEREN | SYSCTL_CKEN;
esdhc_setbits32(®s->sysctl, clk);
}
* FSL SD/MMC Defines
*-------------------------------------------------------------------
*
- * Copyright 2007-2008, Freescale Semiconductor, Inc
+ * Copyright 2007-2008,2010 Freescale Semiconductor, Inc
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
struct fsl_esdhc_cfg {
u32 esdhc_base;
u32 no_snoop;
- u32 clk_enable;
};
/* Select the correct accessors depending on endianess */