ARC: [plat-axs10x]: migrate to DM_MMC

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>

diff --git a/arch/arc/dts/axs10x_mb.dtsi b/arch/arc/dts/axs10x_mb.dtsi
index b5aacd5170e18c31f2b80c37350e6453e43bf79e..6d97de9fd8c91db1c55f6e642afd7dade9b20ecf 100644 (file)
--- a/arch/arc/dts/axs10x_mb.dtsi
+++ b/arch/arc/dts/axs10x_mb.dtsi
@@ -31,6 +31,25 @@
                                #clock-cells = <0>;
                                u-boot,dm-pre-reloc;
                        };
+
+                       mmcclk_ciu: mmcclk-ciu {
+                               compatible = "fixed-clock";
+                               /*
+                                * DW sdio controller has external ciu clock divider
+                                * controlled via register in SDIO IP. It divides
+                                * sdio_ref_clk (which comes from CGU) by 16 for
+                                * default. So default mmcclk clock (which comes
+                                * to sdk_in) is 25000000 Hz.
+                                */
+                               clock-frequency = <25000000>;
+                               #clock-cells = <0>;
+                       };
+
+                       mmcclk_biu: mmcclk-biu {
+                               compatible = "fixed-clock";
+                               clock-frequency = <50000000>;
+                               #clock-cells = <0>;
+                       };
                };
 
                ethernet@18000 {
@@ -53,6 +72,15 @@
                        reg = < 0x60000 0x100 >;
                };
 
+               mmc: mmc@15000 {
+                       compatible = "snps,dw-mshc";
+                       reg = <0x15000 0x400>;
+                       bus-width = <4>;
+                       clocks = <&mmcclk_biu>, <&mmcclk_ciu>;
+                       clock-names = "biu", "ciu";
+                       max-frequency = <25000000>;
+               };
+
                uart0: serial0@22000 {
                        compatible = "snps,dw-apb-uart";
                        reg = <0x22000 0x100>;

diff --git a/board/synopsys/axs10x/axs10x.c b/board/synopsys/axs10x/axs10x.c
index ffa7c154b5445b2859b668fc057537dde8e16dc1..7c4fcf281cbe59723d971a7991430ed33c99636e 100644 (file)
--- a/board/synopsys/axs10x/axs10x.c
+++ b/board/synopsys/axs10x/axs10x.c
@@ -11,35 +11,6 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-int board_mmc_init(bd_t *bis)
-{
-       struct dwmci_host *host = NULL;
-
-       host = malloc(sizeof(struct dwmci_host));
-       if (!host) {
-               printf("dwmci_host malloc fail!\n");
-               return 1;
-       }
-
-       memset(host, 0, sizeof(struct dwmci_host));
-       host->name = "Synopsys Mobile storage";
-       host->ioaddr = (void *)ARC_DWMMC_BASE;
-       host->buswidth = 4;
-       host->dev_index = 0;
-       host->bus_hz = 50000000;
-
-       add_dwmci(host, host->bus_hz / 2, 400000);
-
-       return 0;
-}
-
-int board_mmc_getcd(struct mmc *mmc)
-{
-       struct dwmci_host *host = mmc->priv;
-
-       return !(dwmci_readl(host, DWMCI_CDETECT) & 1);
-}
-
 #define AXS_MB_CREG    0xE0011000
 
 int board_early_init_f(void)

diff --git a/configs/axs103_defconfig b/configs/axs103_defconfig
index 0c8af405a971909f56fd5d16379c5fe58938b283..8255d9fa068a94bae43fbf96ec0e135362d8e3f5 100644 (file)
--- a/configs/axs103_defconfig
+++ b/configs/axs103_defconfig
@@ -35,7 +35,9 @@ CONFIG_DM=y
 CONFIG_DM_GPIO=y
 CONFIG_HSDK_CREG_GPIO=y
 CONFIG_MMC=y
+CONFIG_DM_MMC=y
 CONFIG_MMC_DW=y
+CONFIG_MMC_DW_SNPS=y
 CONFIG_DM_SPI_FLASH=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_STMICRO=y