bcm283x: Add pinctrl driver
authorAlexander Graf <agraf@suse.de>
Tue, 23 Jan 2018 17:05:21 +0000 (18:05 +0100)
committerTom Rini <trini@konsulko.com>
Sun, 28 Jan 2018 17:27:32 +0000 (12:27 -0500)
The bcm283x family of SoCs have a GPIO controller that also acts as
pinctrl controller.

This patch introduces a new pinctrl driver that can actually properly mux
devices into their device tree defined pin states and is now the primary
owner of the gpio device. The previous GPIO driver gets moved into a
subdevice of the pinctrl driver, bound to the same OF node.

That way whenever a device asks for pinctrl support, it gets it
automatically from the pinctrl driver and GPIO support is still available
in the normal command line phase.

Signed-off-by: Alexander Graf <agraf@suse.de>
14 files changed:
MAINTAINERS
arch/arm/mach-bcm283x/include/mach/gpio.h
board/raspberrypi/rpi/rpi.c
configs/rpi_0_w_defconfig
configs/rpi_2_defconfig
configs/rpi_3_32b_defconfig
configs/rpi_3_defconfig
configs/rpi_defconfig
drivers/gpio/bcm2835_gpio.c
drivers/pinctrl/Kconfig
drivers/pinctrl/Makefile
drivers/pinctrl/broadcom/Kconfig [new file with mode: 0644]
drivers/pinctrl/broadcom/Makefile [new file with mode: 0644]
drivers/pinctrl/broadcom/pinctrl-bcm283x.c [new file with mode: 0644]

index d4591535039dfaf2a2e7c0ff00d09f96861a9f2c..aa161c819a07e946aedaaeedb43bdfe72299ed88 100644 (file)
@@ -100,6 +100,7 @@ F:  drivers/mmc/bcm2835_sdhci.c
 F:     drivers/serial/serial_bcm283x_mu.c
 F:     drivers/video/bcm2835.c
 F:     include/dm/platform_data/serial_bcm283x_mu.h
+F:     drivers/pinctrl/broadcom/
 
 ARM FREESCALE IMX
 M:     Stefano Babic <sbabic@denx.de>
index daaee52f81054c8bf8f49d1fad4bc5a1cdce0ef0..7b4ddc924640b215c10f2ade91ce28f2e022f630 100644 (file)
@@ -61,6 +61,4 @@ struct bcm2835_gpio_platdata {
        unsigned long base;
 };
 
-int bcm2835_gpio_get_func_id(struct udevice *dev, unsigned gpio);
-
 #endif /* _BCM2835_GPIO_H_ */
index 3b7a54f519d701de8f83543038d696873a415601..c8924d43627cc364dae9e51f752af05d18282008 100644 (file)
@@ -24,6 +24,7 @@
 #include <asm/armv8/mmu.h>
 #endif
 #include <watchdog.h>
+#include <dm/pinctrl.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -430,10 +431,10 @@ static bool rpi_is_serial_active(void)
         * out whether it is available is to check if the RX pin is muxed.
         */
 
-       if (uclass_first_device(UCLASS_GPIO, &dev) || !dev)
+       if (uclass_first_device(UCLASS_PINCTRL, &dev) || !dev)
                return true;
 
-       if (bcm2835_gpio_get_func_id(dev, serial_gpio) != BCM2835_GPIO_ALT5)
+       if (pinctrl_get_gpio_mux(dev, 0, serial_gpio) != BCM2835_GPIO_ALT5)
                return false;
 
        return true;
index 12482944af49be50589d027b2092421cc9f2c33a..8ed7a58659ab892338cd36377a2eae1e23ba1d61 100644 (file)
@@ -32,3 +32,7 @@ CONFIG_SYS_WHITE_ON_BLACK=y
 CONFIG_CONSOLE_SCROLL_LINES=10
 CONFIG_PHYS_TO_BUS=y
 CONFIG_OF_LIBFDT_OVERLAY=y
+CONFIG_PINCTRL=y
+CONFIG_PINCTRL_FULL=y
+# CONFIG_PINCTRL_GENERIC is not set
+CONFIG_PINCTRL_BCM283X=y
index c45ffb65aff74e0a827bcbc2cc6c514a97b15365..b30e6e144c95311a6a05ddc55ffa8473c3b9809d 100644 (file)
@@ -32,3 +32,7 @@ CONFIG_SYS_WHITE_ON_BLACK=y
 CONFIG_CONSOLE_SCROLL_LINES=10
 CONFIG_PHYS_TO_BUS=y
 CONFIG_OF_LIBFDT_OVERLAY=y
+CONFIG_PINCTRL=y
+CONFIG_PINCTRL_FULL=y
+# CONFIG_PINCTRL_GENERIC is not set
+CONFIG_PINCTRL_BCM283X=y
index f7aed3579748e74b50211733752fb056e8e659fc..bb406440646adeea46872db466b4e68a461d5459 100644 (file)
@@ -34,3 +34,7 @@ CONFIG_SYS_WHITE_ON_BLACK=y
 CONFIG_CONSOLE_SCROLL_LINES=10
 CONFIG_PHYS_TO_BUS=y
 CONFIG_OF_LIBFDT_OVERLAY=y
+CONFIG_PINCTRL=y
+CONFIG_PINCTRL_FULL=y
+# CONFIG_PINCTRL_GENERIC is not set
+CONFIG_PINCTRL_BCM283X=y
index 9416e3b8fe9f2da6a3c6abc04e13da76e8cf6495..8306bc251db5030622faf896ee632d0776e97207 100644 (file)
@@ -34,3 +34,7 @@ CONFIG_SYS_WHITE_ON_BLACK=y
 CONFIG_CONSOLE_SCROLL_LINES=10
 CONFIG_PHYS_TO_BUS=y
 CONFIG_OF_LIBFDT_OVERLAY=y
+CONFIG_PINCTRL=y
+CONFIG_PINCTRL_FULL=y
+# CONFIG_PINCTRL_GENERIC is not set
+CONFIG_PINCTRL_BCM283X=y
index 3bfa745c2eed7bb5e2c442348951e33f887b1544..a7a079ddabfa8046128d1f71040c1b0c4e9707d4 100644 (file)
@@ -32,3 +32,7 @@ CONFIG_SYS_WHITE_ON_BLACK=y
 CONFIG_CONSOLE_SCROLL_LINES=10
 CONFIG_PHYS_TO_BUS=y
 CONFIG_OF_LIBFDT_OVERLAY=y
+CONFIG_PINCTRL=y
+CONFIG_PINCTRL_FULL=y
+# CONFIG_PINCTRL_GENERIC is not set
+CONFIG_PINCTRL_BCM283X=y
index beaa21853a473dfaa4e59a58f995cce871afc045..d68f8df32d55fdff1b44f28eebb62b9cd1026dbe 100644 (file)
@@ -7,6 +7,7 @@
 
 #include <common.h>
 #include <dm.h>
+#include <dm/pinctrl.h>
 #include <errno.h>
 #include <asm/gpio.h>
 #include <asm/io.h>
@@ -14,6 +15,7 @@
 
 struct bcm2835_gpios {
        struct bcm2835_gpio_regs *reg;
+       struct udevice *pinctrl;
 };
 
 static int bcm2835_gpio_direction_input(struct udevice *dev, unsigned gpio)
@@ -29,7 +31,7 @@ static int bcm2835_gpio_direction_input(struct udevice *dev, unsigned gpio)
        return 0;
 }
 
-static int bcm2835_gpio_direction_output(struct udevice *dev, unsigned gpio,
+static int bcm2835_gpio_direction_output(struct udevice *dev, unsigned int gpio,
                                         int value)
 {
        struct bcm2835_gpios *gpios = dev_get_priv(dev);
@@ -73,19 +75,12 @@ static int bcm2835_gpio_set_value(struct udevice *dev, unsigned gpio,
        return 0;
 }
 
-int bcm2835_gpio_get_func_id(struct udevice *dev, unsigned gpio)
-{
-       struct bcm2835_gpios *gpios = dev_get_priv(dev);
-       u32 val;
-
-       val = readl(&gpios->reg->gpfsel[BCM2835_GPIO_FSEL_BANK(gpio)]);
-
-       return (val >> BCM2835_GPIO_FSEL_SHIFT(gpio) & BCM2835_GPIO_FSEL_MASK);
-}
-
 static int bcm2835_gpio_get_function(struct udevice *dev, unsigned offset)
 {
-       int funcid = bcm2835_gpio_get_func_id(dev, offset);
+       struct bcm2835_gpios *priv = dev_get_priv(dev);
+       int funcid;
+
+       funcid = pinctrl_get_gpio_mux(priv->pinctrl, 0, offset);
 
        switch (funcid) {
        case BCM2835_GPIO_OUTPUT:
@@ -97,7 +92,6 @@ static int bcm2835_gpio_get_function(struct udevice *dev, unsigned offset)
        }
 }
 
-
 static const struct dm_gpio_ops gpio_bcm2835_ops = {
        .direction_input        = bcm2835_gpio_direction_input,
        .direction_output       = bcm2835_gpio_direction_output,
@@ -116,15 +110,13 @@ static int bcm2835_gpio_probe(struct udevice *dev)
        uc_priv->gpio_count = BCM2835_GPIO_COUNT;
        gpios->reg = (struct bcm2835_gpio_regs *)plat->base;
 
+       /* We know we're spawned by the pinctrl driver */
+       gpios->pinctrl = dev->parent;
+
        return 0;
 }
 
 #if CONFIG_IS_ENABLED(OF_CONTROL)
-static const struct udevice_id bcm2835_gpio_id[] = {
-       {.compatible = "brcm,bcm2835-gpio"},
-       {}
-};
-
 static int bcm2835_gpio_ofdata_to_platdata(struct udevice *dev)
 {
        struct bcm2835_gpio_platdata *plat = dev_get_platdata(dev);
@@ -142,7 +134,6 @@ static int bcm2835_gpio_ofdata_to_platdata(struct udevice *dev)
 U_BOOT_DRIVER(gpio_bcm2835) = {
        .name   = "gpio_bcm2835",
        .id     = UCLASS_GPIO,
-       .of_match = of_match_ptr(bcm2835_gpio_id),
        .ofdata_to_platdata = of_match_ptr(bcm2835_gpio_ofdata_to_platdata),
        .platdata_auto_alloc_size = sizeof(struct bcm2835_gpio_platdata),
        .ops    = &gpio_bcm2835_ops,
index 7e8e4b0b2762101e6730d4ae72863e73c0de26de..0a4dd3c0cfd1f587fa10ef7d3e7db707c4795225 100644 (file)
@@ -306,5 +306,6 @@ source "drivers/pinctrl/renesas/Kconfig"
 source "drivers/pinctrl/uniphier/Kconfig"
 source "drivers/pinctrl/exynos/Kconfig"
 source "drivers/pinctrl/mvebu/Kconfig"
+source "drivers/pinctrl/broadcom/Kconfig"
 
 endmenu
index 8c04028dfbc2d84ee6549fbb38e7edea783c4d44..c7135d29f86ac2a62fe4f7852b401cb4599df7ad 100644 (file)
@@ -22,3 +22,4 @@ obj-$(CONFIG_ARCH_MVEBU)      += mvebu/
 obj-$(CONFIG_PINCTRL_SINGLE)   += pinctrl-single.o
 obj-$(CONFIG_PINCTRL_STI)      += pinctrl-sti.o
 obj-$(CONFIG_PINCTRL_STM32)    += pinctrl_stm32.o
+obj-y                          += broadcom/
diff --git a/drivers/pinctrl/broadcom/Kconfig b/drivers/pinctrl/broadcom/Kconfig
new file mode 100644 (file)
index 0000000..4056782
--- /dev/null
@@ -0,0 +1,7 @@
+config PINCTRL_BCM283X
+       depends on ARCH_BCM283X && PINCTRL_FULL && OF_CONTROL
+       default y
+       bool "Broadcom 283x family pin control driver"
+       help
+          Support pin multiplexing and pin configuration control on
+          Broadcom's 283x family of SoCs.
diff --git a/drivers/pinctrl/broadcom/Makefile b/drivers/pinctrl/broadcom/Makefile
new file mode 100644 (file)
index 0000000..2a1e550
--- /dev/null
@@ -0,0 +1,7 @@
+#
+# Copyright (C) 2018 Alexander Graf <agraf@suse.de>
+#
+# SPDX-License-Identifier:     GPL-2.0
+# https://spdx.org/licenses
+
+obj-$(CONFIG_PINCTRL_BCM283X) += pinctrl-bcm283x.o
diff --git a/drivers/pinctrl/broadcom/pinctrl-bcm283x.c b/drivers/pinctrl/broadcom/pinctrl-bcm283x.c
new file mode 100644 (file)
index 0000000..83dde23
--- /dev/null
@@ -0,0 +1,152 @@
+/*
+ * Copyright (C) 2018 Alexander Graf <agraf@suse.de>
+ *
+ * Based on drivers/pinctrl/mvebu/pinctrl-mvebu.c and
+ *          drivers/gpio/bcm2835_gpio.c
+ *
+ * This driver gets instantiated by the GPIO driver, because both devices
+ * share the same device node.
+ *
+ * SPDX-License-Identifier:    GPL-2.0
+ * https://spdx.org/licenses
+ */
+
+#include <common.h>
+#include <config.h>
+#include <errno.h>
+#include <dm.h>
+#include <dm/pinctrl.h>
+#include <dm/root.h>
+#include <dm/device-internal.h>
+#include <dm/lists.h>
+#include <asm/system.h>
+#include <asm/io.h>
+#include <asm/gpio.h>
+
+struct bcm283x_pinctrl_priv {
+       u32 *base_reg;
+};
+
+#define MAX_PINS_PER_BANK 16
+
+static void bcm2835_gpio_set_func_id(struct udevice *dev, unsigned int gpio,
+                                    int func)
+{
+       struct bcm283x_pinctrl_priv *priv = dev_get_priv(dev);
+       int reg_offset;
+       int field_offset;
+
+       reg_offset = BCM2835_GPIO_FSEL_BANK(gpio);
+       field_offset = BCM2835_GPIO_FSEL_SHIFT(gpio);
+
+       clrsetbits_le32(&priv->base_reg[reg_offset],
+                       BCM2835_GPIO_FSEL_MASK << field_offset,
+                       (func & BCM2835_GPIO_FSEL_MASK) << field_offset);
+}
+
+static int bcm2835_gpio_get_func_id(struct udevice *dev, unsigned int gpio)
+{
+       struct bcm283x_pinctrl_priv *priv = dev_get_priv(dev);
+       u32 val;
+
+       val = readl(&priv->base_reg[BCM2835_GPIO_FSEL_BANK(gpio)]);
+
+       return (val >> BCM2835_GPIO_FSEL_SHIFT(gpio) & BCM2835_GPIO_FSEL_MASK);
+}
+
+/*
+ * bcm283x_pinctrl_set_state: configure pin functions.
+ * @dev: the pinctrl device to be configured.
+ * @config: the state to be configured.
+ * @return: 0 in success
+ */
+int bcm283x_pinctrl_set_state(struct udevice *dev, struct udevice *config)
+{
+       u32 pin_arr[MAX_PINS_PER_BANK];
+       u32 function;
+       int i, len, pin_count = 0;
+
+       if (!dev_read_prop(config, "brcm,pins", &len) || !len ||
+           len & 0x3 || dev_read_u32_array(config, "brcm,pins", pin_arr,
+                                                 len / sizeof(u32))) {
+               debug("Failed reading pins array for pinconfig %s (%d)\n",
+                     config->name, len);
+               return -EINVAL;
+       }
+
+       pin_count = len / sizeof(u32);
+
+       function = dev_read_u32_default(config, "brcm,function", -1);
+       if (function < 0) {
+               debug("Failed reading function for pinconfig %s (%d)\n",
+                     config->name, function);
+               return -EINVAL;
+       }
+
+       for (i = 0; i < pin_count; i++)
+               bcm2835_gpio_set_func_id(dev, pin_arr[i], function);
+
+       return 0;
+}
+
+static int bcm283x_pinctrl_get_gpio_mux(struct udevice *dev, int banknum,
+                                       int index)
+{
+       if (banknum != 0)
+               return -EINVAL;
+
+       return bcm2835_gpio_get_func_id(dev, index);
+}
+
+static const struct udevice_id bcm2835_pinctrl_id[] = {
+       {.compatible = "brcm,bcm2835-gpio"},
+       {}
+};
+
+int bcm283x_pinctl_probe(struct udevice *dev)
+{
+       struct bcm283x_pinctrl_priv *priv;
+       int ret;
+       struct udevice *pdev;
+
+       priv = dev_get_priv(dev);
+       if (!priv) {
+               debug("%s: Failed to get private\n", __func__);
+               return -EINVAL;
+       }
+
+       priv->base_reg = dev_read_addr_ptr(dev);
+       if (priv->base_reg == (void *)FDT_ADDR_T_NONE) {
+               debug("%s: Failed to get base address\n", __func__);
+               return -EINVAL;
+       }
+
+       /* Create GPIO device as well */
+       ret = device_bind(dev, lists_driver_lookup_name("gpio_bcm2835"),
+                         "gpio_bcm2835", NULL, dev_of_offset(dev), &pdev);
+       if (ret) {
+               /*
+                * While we really want the pinctrl driver to work to make
+                * devices go where they should go, the GPIO controller is
+                * not quite as crucial as it's only rarely used, so don't
+                * fail here.
+                */
+               printf("Failed to bind GPIO driver\n");
+       }
+
+       return 0;
+}
+
+static struct pinctrl_ops bcm283x_pinctrl_ops = {
+       .set_state      = bcm283x_pinctrl_set_state,
+       .get_gpio_mux   = bcm283x_pinctrl_get_gpio_mux,
+};
+
+U_BOOT_DRIVER(pinctrl_bcm283x) = {
+       .name           = "bcm283x_pinctrl",
+       .id             = UCLASS_PINCTRL,
+       .of_match       = of_match_ptr(bcm2835_pinctrl_id),
+       .priv_auto_alloc_size = sizeof(struct bcm283x_pinctrl_priv),
+       .ops            = &bcm283x_pinctrl_ops,
+       .probe          = bcm283x_pinctl_probe
+};