armv8: ls1088aqds: Add support of I2C driver model.

Udate ls1088aqds board init code to support DM_I2C.

Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>

diff --git a/board/freescale/ls1088a/eth_ls1088aqds.c b/board/freescale/ls1088a/eth_ls1088aqds.c
index d4ab9791e966b4cbbab0a0c91bbe8407118df30a..237088a53710eaf517daa68c339f9581d762124a 100644 (file)
--- a/board/freescale/ls1088a/eth_ls1088aqds.c
+++ b/board/freescale/ls1088a/eth_ls1088aqds.c
@@ -81,11 +81,16 @@ struct ls1088a_qds_mdio {
        struct mii_dev *realbus;
 };
 
+struct reg_pair {
+       uint addr;
+       u8 *val;
+};
+
 static void sgmii_configure_repeater(int dpmac)
 {
        struct mii_dev *bus;
        uint8_t a = 0xf;
-       int i, j, ret;
+       int i, j, k, ret;
        unsigned short value;
        const char *dev = "LS1088A_QDS_MDIO2";
        int i2c_addr[] = {0x58, 0x59, 0x5a, 0x5b};
@@ -97,8 +102,28 @@ static void sgmii_configure_repeater(int dpmac)
        uint8_t ch_b_eq[] = {0x1, 0x2, 0x3, 0x7};
        uint8_t ch_b_ctl2[] = {0x81, 0x82, 0x83, 0x84};
 
+       u8 reg_val[6] = {0x18, 0x38, 0x4, 0x14, 0xb5, 0x20};
+       struct reg_pair reg_pair[10] = {
+               {6, &reg_val[0]}, {4, &reg_val[1]},
+               {8, &reg_val[2]}, {0xf, NULL},
+               {0x11, NULL}, {0x16, NULL},
+               {0x18, NULL}, {0x23, &reg_val[3]},
+               {0x2d, &reg_val[4]}, {4, &reg_val[5]},
+       };
+#ifdef CONFIG_DM_I2C
+       struct udevice *udev;
+#endif
+
        /* Set I2c to Slot 1 */
-       i2c_write(0x77, 0, 0, &a, 1);
+#ifndef CONFIG_DM_I2C
+       ret = i2c_write(0x77, 0, 0, &a, 1);
+#else
+       ret = i2c_get_chip_for_busnum(0, 0x77, 1, &udev);
+       if (!ret)
+               ret = dm_i2c_write(udev, 0, &a, 1);
+#endif
+       if (ret)
+               goto error;
 
        switch (dpmac) {
        case 1:
@@ -144,31 +169,34 @@ static void sgmii_configure_repeater(int dpmac)
                return;
        }
 
+#ifdef CONFIG_DM_I2C
+       i2c_get_chip_for_busnum(0, i2c_phy_addr, 1, &udev);
+#endif
+
        for (i = 0; i < 4; i++) {
                for (j = 0; j < 4; j++) {
-                       a = 0x18;
-                       i2c_write(i2c_phy_addr, 6, 1, &a, 1);
-                       a = 0x38;
-                       i2c_write(i2c_phy_addr, 4, 1, &a, 1);
-                       a = 0x4;
-                       i2c_write(i2c_phy_addr, 8, 1, &a, 1);
-
-                       i2c_write(i2c_phy_addr, 0xf, 1,
-                                 &ch_a_eq[i], 1);
-                       i2c_write(i2c_phy_addr, 0x11, 1,
-                                 &ch_a_ctl2[j], 1);
-
-                       i2c_write(i2c_phy_addr, 0x16, 1,
-                                 &ch_b_eq[i], 1);
-                       i2c_write(i2c_phy_addr, 0x18, 1,
-                                 &ch_b_ctl2[j], 1);
-
-                       a = 0x14;
-                       i2c_write(i2c_phy_addr, 0x23, 1, &a, 1);
-                       a = 0xb5;
-                       i2c_write(i2c_phy_addr, 0x2d, 1, &a, 1);
-                       a = 0x20;
-                       i2c_write(i2c_phy_addr, 4, 1, &a, 1);
+                       reg_pair[3].val = &ch_a_eq[i];
+                       reg_pair[4].val = &ch_a_ctl2[j];
+                       reg_pair[5].val = &ch_b_eq[i];
+                       reg_pair[6].val = &ch_b_ctl2[j];
+                       for (k = 0; k < 10; k++) {
+#ifndef CONFIG_DM_I2C
+                               ret = i2c_write(i2c_phy_addr,
+                                               reg_pair[k].addr,
+                                               1, reg_pair[k].val, 1);
+#else
+                               ret = i2c_get_chip_for_busnum(0,
+                                                             i2c_phy_addr,
+                                                             1, &udev);
+                               if (!ret)
+                                       ret = dm_i2c_write(udev,
+                                                          reg_pair[k].addr,
+                                                          reg_pair[k].val, 1);
+#endif
+                               if (ret)
+                                       goto error;
+                       }
+
                        mdelay(100);
                        ret = miiphy_read(dev, phy_addr, 0x11, &value);
                        if (ret > 0)
@@ -203,7 +231,7 @@ error:
 static void qsgmii_configure_repeater(int dpmac)
 {
        uint8_t a = 0xf;
-       int i, j;
+       int i, j, k;
        int i2c_phy_addr = 0;
        int phy_addr = 0;
        int i2c_addr[] = {0x58, 0x59, 0x5a, 0x5b};
@@ -213,12 +241,32 @@ static void qsgmii_configure_repeater(int dpmac)
        uint8_t ch_b_eq[] = {0x1, 0x2, 0x3, 0x7};
        uint8_t ch_b_ctl2[] = {0x81, 0x82, 0x83, 0x84};
 
+       u8 reg_val[6] = {0x18, 0x38, 0x4, 0x14, 0xb5, 0x20};
+       struct reg_pair reg_pair[10] = {
+               {6, &reg_val[0]}, {4, &reg_val[1]},
+               {8, &reg_val[2]}, {0xf, NULL},
+               {0x11, NULL}, {0x16, NULL},
+               {0x18, NULL}, {0x23, &reg_val[3]},
+               {0x2d, &reg_val[4]}, {4, &reg_val[5]},
+       };
+
        const char *dev = mdio_names[EMI1_SLOT1];
        int ret = 0;
        unsigned short value;
+#ifdef CONFIG_DM_I2C
+       struct udevice *udev;
+#endif
 
        /* Set I2c to Slot 1 */
-       i2c_write(0x77, 0, 0, &a, 1);
+#ifndef CONFIG_DM_I2C
+       ret = i2c_write(0x77, 0, 0, &a, 1);
+#else
+       ret = i2c_get_chip_for_busnum(0, 0x77, 1, &udev);
+       if (!ret)
+               ret = dm_i2c_write(udev, 0, &a, 1);
+#endif
+       if (ret)
+               goto error;
 
        switch (dpmac) {
        case 7:
@@ -252,28 +300,35 @@ static void qsgmii_configure_repeater(int dpmac)
                return;
        }
 
+#ifdef CONFIG_DM_I2C
+       i2c_get_chip_for_busnum(0, i2c_phy_addr, 1, &udev);
+#endif
+
        for (i = 0; i < 4; i++) {
                for (j = 0; j < 4; j++) {
-                       a = 0x18;
-                       i2c_write(i2c_phy_addr, 6, 1, &a, 1);
-                       a = 0x38;
-                       i2c_write(i2c_phy_addr, 4, 1, &a, 1);
-                       a = 0x4;
-                       i2c_write(i2c_phy_addr, 8, 1, &a, 1);
-
-                       i2c_write(i2c_phy_addr, 0xf, 1, &ch_a_eq[i], 1);
-                       i2c_write(i2c_phy_addr, 0x11, 1, &ch_a_ctl2[j], 1);
-
-                       i2c_write(i2c_phy_addr, 0x16, 1, &ch_b_eq[i], 1);
-                       i2c_write(i2c_phy_addr, 0x18, 1, &ch_b_ctl2[j], 1);
-
-                       a = 0x14;
-                       i2c_write(i2c_phy_addr, 0x23, 1, &a, 1);
-                       a = 0xb5;
-                       i2c_write(i2c_phy_addr, 0x2d, 1, &a, 1);
-                       a = 0x20;
-                       i2c_write(i2c_phy_addr, 4, 1, &a, 1);
-                       mdelay(100);
+                       reg_pair[3].val = &ch_a_eq[i];
+                       reg_pair[4].val = &ch_a_ctl2[j];
+                       reg_pair[5].val = &ch_b_eq[i];
+                       reg_pair[6].val = &ch_b_ctl2[j];
+
+                       for (k = 0; k < 10; k++) {
+#ifndef CONFIG_DM_I2C
+                               ret = i2c_write(i2c_phy_addr,
+                                               reg_pair[k].addr,
+                                               1, reg_pair[k].val, 1);
+#else
+                               ret = i2c_get_chip_for_busnum(0,
+                                                             i2c_addr[dpmac],
+                                                             1, &udev);
+                               if (!ret)
+                                       ret = dm_i2c_write(udev,
+                                                          reg_pair[k].addr,
+                                                          reg_pair[k].val, 1);
+#endif
+                               if (ret)
+                                       goto error;
+                       }
+
                        ret = miiphy_read(dev, phy_addr, 0x11, &value);
                        if (ret > 0)
                                goto error;

diff --git a/include/configs/ls1088aqds.h b/include/configs/ls1088aqds.h
index 4387862582a152b356862c6f8f7144a9d8aed297..8b62bbe68445cf34e6571e314bd3cb978ddf7e3b 100644 (file)
--- a/include/configs/ls1088aqds.h
+++ b/include/configs/ls1088aqds.h
@@ -46,7 +46,9 @@ unsigned long get_board_ddr_clk(void);
 #define CONFIG_DDR_CLK_FREQ            100000000
 #else
 #define CONFIG_QIXIS_I2C_ACCESS
+#ifndef CONFIG_DM_I2C
 #define CONFIG_SYS_I2C_EARLY_INIT
+#endif
 #define CONFIG_SYS_CLK_FREQ            get_board_sys_clk()
 #define CONFIG_DDR_CLK_FREQ            get_board_ddr_clk()
 #endif
@@ -357,9 +359,7 @@ unsigned long get_board_ddr_clk(void);
 * RTC configuration
 */
 #define RTC
-#define CONFIG_RTC_PCF8563 1
 #define CONFIG_SYS_I2C_RTC_ADDR         0x51  /* Channel 3*/
-#define CONFIG_CMD_DATE
 
 /* EEPROM */
 #define CONFIG_ID_EEPROM