clk: stm32fx: migrate define from rcc.h to driver

STM32F4 doesn't get rcc.h file, to avoid compilation
issue, migrate RCC related defines from rcc.h to driver
file and remove rcc.h file.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Vikas Manocha <vikas.manocha@st.com>

diff --git a/arch/arm/include/asm/arch-stm32f7/rcc.h b/arch/arm/include/asm/arch-stm32f7/rcc.h
deleted file mode 100644 (file)
index 6475f9d..0000000
--- a/arch/arm/include/asm/arch-stm32f7/rcc.h
+++ /dev/null
@@ -1,31 +0,0 @@
-/*
- * Copyright (C) 2016, STMicroelectronics - All Rights Reserved
- * Author(s): Vikas Manocha, <vikas.manocha@st.com> for STMicroelectronics.
- *
- * SPDX-License-Identifier:    GPL-2.0+
- */
-
-#ifndef _STM32_RCC_H
-#define _STM32_RCC_H
-
-#include <dt-bindings/mfd/stm32f7-rcc.h>
-
-/*
- * RCC AHB1ENR specific definitions
- */
-#define RCC_AHB1ENR_ETHMAC_EN          BIT(25)
-#define RCC_AHB1ENR_ETHMAC_TX_EN       BIT(26)
-#define RCC_AHB1ENR_ETHMAC_RX_EN       BIT(27)
-
-/*
- * RCC APB1ENR specific definitions
- */
-#define RCC_APB1ENR_TIM2EN             BIT(0)
-#define RCC_APB1ENR_PWREN              BIT(28)
-
-/*
- * RCC APB2ENR specific definitions
- */
-#define RCC_APB2ENR_SYSCFGEN           BIT(14)
-
-#endif

diff --git a/drivers/clk/clk_stm32f.c b/drivers/clk/clk_stm32f.c
index 10f44859cda1ae169d3720b1abd40741b5100a2f..c7af7a1d8d1e610400880ae13f5c5469f9aee251 100644 (file)
--- a/drivers/clk/clk_stm32f.c
+++ b/drivers/clk/clk_stm32f.c
@@ -10,7 +10,6 @@
 #include <dm.h>
 
 #include <asm/io.h>
-#include <asm/arch/rcc.h>
 #include <asm/arch/stm32.h>
 #include <asm/arch/stm32_periph.h>
 #include <asm/arch/stm32_pwr.h>
@@ -54,6 +53,24 @@
 #define RCC_CFGR_PPRE1_SHIFT           10
 #define RCC_CFGR_PPRE2_SHIFT           13
 
+/*
+ * RCC AHB1ENR specific definitions
+ */
+#define RCC_AHB1ENR_ETHMAC_EN          BIT(25)
+#define RCC_AHB1ENR_ETHMAC_TX_EN       BIT(26)
+#define RCC_AHB1ENR_ETHMAC_RX_EN       BIT(27)
+
+/*
+ * RCC APB1ENR specific definitions
+ */
+#define RCC_APB1ENR_TIM2EN             BIT(0)
+#define RCC_APB1ENR_PWREN              BIT(28)
+
+/*
+ * RCC APB2ENR specific definitions
+ */
+#define RCC_APB2ENR_SYSCFGEN           BIT(14)
+
 
 struct pll_psc {
        u8      pll_m;