mmc: am654_sdhci: Update output tap delay writes

With the latest RIOT, there is a different otap delay value for each
speed mode. Add a new binding with every supported speed mode. Also
disable a given speed mode in the host caps if its corresponding
otap-del-sel is not present.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>

diff --git a/arch/arm/dts/k3-am65-main.dtsi b/arch/arm/dts/k3-am65-main.dtsi
index ab40dafceb526817de560426d78b8e7bb650d95d..028f57379b9f2f8156e6a02369bad1c51781e441 100644 (file)
--- a/arch/arm/dts/k3-am65-main.dtsi
+++ b/arch/arm/dts/k3-am65-main.dtsi
@@ -98,7 +98,17 @@
                interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>;
                mmc-ddr-1_8v;
                mmc-hs200-1_8v;
-               ti,otap-del-sel = <0x2>;
+               ti,otap-del-sel-legacy = <0x0>;
+               ti,otap-del-sel-mmc-hs = <0x0>;
+               ti,otap-del-sel-sd-hs = <0x0>;
+               ti,otap-del-sel-sdr12 = <0x0>;
+               ti,otap-del-sel-sdr25 = <0x0>;
+               ti,otap-del-sel-sdr50 = <0x8>;
+               ti,otap-del-sel-sdr104 = <0x5>;
+               ti,otap-del-sel-ddr50 = <0x5>;
+               ti,otap-del-sel-ddr52 = <0x5>;
+               ti,otap-del-sel-hs200 = <0x5>;
+               ti,otap-del-sel-hs400 = <0x0>;
                ti,trm-icp = <0x8>;
                dma-coherent;
        };

diff --git a/arch/arm/dts/k3-am654-base-board-u-boot.dtsi b/arch/arm/dts/k3-am654-base-board-u-boot.dtsi
index a349edcfa5fd6d6100c7fddefa3908991468c511..54ecb3d44400241f110647885521ea7b6d80ffa8 100644 (file)
--- a/arch/arm/dts/k3-am654-base-board-u-boot.dtsi
+++ b/arch/arm/dts/k3-am654-base-board-u-boot.dtsi
@@ -29,7 +29,16 @@
                clock-names = "clk_ahb", "clk_xin";
                power-domains = <&k3_pds 48 TI_SCI_PD_EXCLUSIVE>;
                max-frequency = <25000000>;
-               ti,otap-del-sel = <0x2>;
+               ti,otap-del-sel-legacy = <0x0>;
+               ti,otap-del-sel-mmc-hs = <0x0>;
+               ti,otap-del-sel-sd-hs = <0x0>;
+               ti,otap-del-sel-sdr12 = <0x0>;
+               ti,otap-del-sel-sdr25 = <0x0>;
+               ti,otap-del-sel-sdr50 = <0x8>;
+               ti,otap-del-sel-sdr104 = <0x7>;
+               ti,otap-del-sel-ddr50 = <0x4>;
+               ti,otap-del-sel-ddr52 = <0x4>;
+               ti,otap-del-sel-hs200 = <0x7>;
                ti,trm-icp = <0x8>;
        };
 

diff --git a/arch/arm/dts/k3-j721e-main.dtsi b/arch/arm/dts/k3-j721e-main.dtsi
index 45ac98c47ed37f5aff21ae52572daa17b657a230..1433932e7f383f9e64b8f7457f7ddfa0147eefe9 100644 (file)
--- a/arch/arm/dts/k3-j721e-main.dtsi
+++ b/arch/arm/dts/k3-j721e-main.dtsi
@@ -232,9 +232,14 @@
                assigned-clocks = <&k3_clks 91 1>;
                assigned-clock-parents = <&k3_clks 91 2>;
                bus-width = <8>;
-               ti,otap-del-sel = <0x2>;
                ti,trm-icp = <0x8>;
                dma-coherent;
+               mmc-ddr-1_8v;
+               ti,otap-del-sel-legacy = <0x0>;
+               ti,otap-del-sel-mmc-hs = <0x0>;
+               ti,otap-del-sel-ddr52 = <0x5>;
+               ti,otap-del-sel-hs200 = <0x6>;
+               ti,otap-del-sel-hs400 = <0x0>;
        };
 
        main_sdhci1: sdhci@4fb0000 {
@@ -246,7 +251,13 @@
                clocks = <&k3_clks 92 0>, <&k3_clks 92 5>;
                assigned-clocks = <&k3_clks 92 0>;
                assigned-clock-parents = <&k3_clks 92 1>;
-               ti,otap-del-sel = <0x2>;
+               ti,otap-del-sel-legacy = <0x0>;
+               ti,otap-del-sel-sd-hs = <0xf>;
+               ti,otap-del-sel-sdr12 = <0xf>;
+               ti,otap-del-sel-sdr25 = <0xf>;
+               ti,otap-del-sel-sdr50 = <0xc>;
+               ti,otap-del-sel-sdr104 = <0x5>;
+               ti,otap-del-sel-ddr50 = <0xc>;
                ti,trm-icp = <0x8>;
                dma-coherent;
        };

diff --git a/drivers/mmc/am654_sdhci.c b/drivers/mmc/am654_sdhci.c
index aad9d8b85b461ebd125837b21c8381b9666d31db..92e7100f567dbaa37822a4d71cbbc2d7482e3946 100644 (file)
--- a/drivers/mmc/am654_sdhci.c
+++ b/drivers/mmc/am654_sdhci.c
@@ -74,7 +74,7 @@ struct am654_sdhci_plat {
        struct mmc mmc;
        struct regmap *base;
        bool non_removable;
-       u32 otap_del_sel;
+       u32 otap_del_sel[11];
        u32 trm_icp;
        u32 drv_strength;
        u32 strb_sel;
@@ -86,6 +86,25 @@ struct am654_sdhci_plat {
        bool dll_on;
 };
 
+struct timing_data {
+       const char *binding;
+       u32 capability;
+};
+
+static const struct timing_data td[] = {
+       [MMC_LEGACY] = {"ti,otap-del-sel-legacy", 0},
+       [MMC_HS] = {"ti,otap-del-sel-mmc-hs", MMC_CAP(MMC_HS)},
+       [SD_HS]  = {"ti,otap-del-sel-sd-hs", MMC_CAP(SD_HS)},
+       [UHS_SDR12] = {"ti,otap-del-sel-sdr12", MMC_CAP(UHS_SDR12)},
+       [UHS_SDR25] = {"ti,otap-del-sel-sdr25", MMC_CAP(UHS_SDR25)},
+       [UHS_SDR50] = {"ti,otap-del-sel-sdr50", MMC_CAP(UHS_SDR50)},
+       [UHS_SDR104] = {"ti,otap-del-sel-sdr104", MMC_CAP(UHS_SDR104)},
+       [UHS_DDR50] = {"ti,otap-del-sel-ddr50", MMC_CAP(UHS_DDR50)},
+       [MMC_DDR_52] = {"ti,otap-del-sel-ddr52", MMC_CAP(MMC_DDR_52)},
+       [MMC_HS_200] = {"ti,otap-del-sel-hs200", MMC_CAP(MMC_HS_200)},
+       [MMC_HS_400] = {"ti,otap-del-sel-hs400", MMC_CAP(MMC_HS_400)},
+};
+
 struct am654_driver_data {
        const struct sdhci_ops *ops;
        u32 flags;
@@ -112,6 +131,7 @@ static int am654_sdhci_set_ios_post(struct sdhci_host *host)
        struct am654_sdhci_plat *plat = dev_get_platdata(dev);
        unsigned int speed = host->mmc->clock;
        int sel50, sel100, freqsel;
+       u32 otap_del_sel;
        u32 mask, val;
        int ret;
 
@@ -132,9 +152,10 @@ static int am654_sdhci_set_ios_post(struct sdhci_host *host)
 
        /* switch phy back on */
        if (speed > AM654_SDHCI_MIN_FREQ) {
+               otap_del_sel = plat->otap_del_sel[host->mmc->selected_mode];
                mask = OTAPDLYENA_MASK | OTAPDLYSEL_MASK;
                val = (1 << OTAPDLYENA_SHIFT) |
-                     (plat->otap_del_sel << OTAPDLYSEL_SHIFT);
+                     (otap_del_sel << OTAPDLYSEL_SHIFT);
 
                /* Write to STRBSEL for HS400 speed mode */
                if (host->mmc->selected_mode == MMC_HS_400) {
@@ -216,11 +237,11 @@ static int j721e_4bit_sdhci_set_ios_post(struct sdhci_host *host)
 {
        struct udevice *dev = host->mmc->dev;
        struct am654_sdhci_plat *plat = dev_get_platdata(dev);
-       u32 mask, val;
+       u32 otap_del_sel, mask, val;
 
+       otap_del_sel = plat->otap_del_sel[host->mmc->selected_mode];
        mask = OTAPDLYENA_MASK | OTAPDLYSEL_MASK;
-       val = (1 << OTAPDLYENA_SHIFT) |
-             (plat->otap_del_sel << OTAPDLYSEL_SHIFT);
+       val = (1 << OTAPDLYENA_SHIFT) | (otap_del_sel << OTAPDLYSEL_SHIFT);
        regmap_update_bits(plat->base, PHY_CTRL4, mask, val);
 
        return 0;
@@ -281,6 +302,37 @@ int am654_sdhci_init(struct am654_sdhci_plat *plat)
        return 0;
 }
 
+static int sdhci_am654_get_otap_delay(struct udevice *dev,
+                                     struct mmc_config *cfg)
+{
+       struct am654_sdhci_plat *plat = dev_get_platdata(dev);
+       int ret;
+       int i;
+
+       /* ti,otap-del-sel-legacy is mandatory */
+       ret = dev_read_u32(dev, "ti,otap-del-sel-legacy",
+                          &plat->otap_del_sel[0]);
+       if (ret)
+               return ret;
+       /*
+        * Remove the corresponding capability if an otap-del-sel
+        * value is not found
+        */
+       for (i = MMC_HS; i <= MMC_HS_400; i++) {
+               ret = dev_read_u32(dev, td[i].binding, &plat->otap_del_sel[i]);
+               if (ret) {
+                       dev_dbg(dev, "Couldn't find %s\n", td[i].binding);
+                       /*
+                        * Remove the corresponding capability
+                        * if an otap-del-sel value is not found
+                        */
+                       cfg->host_caps &= ~td[i].capability;
+               }
+       }
+
+       return 0;
+}
+
 static int am654_sdhci_probe(struct udevice *dev)
 {
        struct am654_driver_data *drv_data =
@@ -313,6 +365,10 @@ static int am654_sdhci_probe(struct udevice *dev)
        if (ret)
                return ret;
 
+       ret = sdhci_am654_get_otap_delay(dev, cfg);
+       if (ret)
+               return ret;
+
        host->ops = drv_data->ops;
        host->mmc->priv = host;
        upriv->mmc = host->mmc;
@@ -336,10 +392,6 @@ static int am654_sdhci_ofdata_to_platdata(struct udevice *dev)
        host->ioaddr = (void *)dev_read_addr(dev);
        plat->non_removable = dev_read_bool(dev, "non-removable");
 
-       ret = dev_read_u32(dev, "ti,otap-del-sel", &plat->otap_del_sel);
-       if (ret)
-               return ret;
-
        if (plat->flags & DLL_PRESENT) {
                ret = dev_read_u32(dev, "ti,trm-icp", &plat->trm_icp);
                if (ret)