Merge branch 'master' of git://www.denx.de/git/u-boot-marvell
authorTom Rini <trini@konsulko.com>
Fri, 26 Aug 2016 11:41:54 +0000 (07:41 -0400)
committerTom Rini <trini@konsulko.com>
Fri, 26 Aug 2016 11:41:54 +0000 (07:41 -0400)
12 files changed:
arch/arm/mach-mvebu/cpu.c
arch/arm/mach-mvebu/include/mach/soc.h
arch/arm/mach-mvebu/serdes/a38x/ctrl_pex.c
arch/arm/mach-mvebu/serdes/a38x/high_speed_env_spec.c
include/configs/clearfog.h
include/configs/db-88f6720.h
include/configs/db-88f6820-gp.h
include/configs/db-mv784mp-gp.h
include/configs/ds414.h
include/configs/maxbcm.h
include/configs/theadorable.h
tools/kwboot.c

index fd66f5939210945800e8b838250118cd1ce9761c..5eb2a398d14c51bafa7f6b800b90d235c995e551 100644 (file)
@@ -452,8 +452,15 @@ int arch_cpu_init(void)
 
 u32 mvebu_get_nand_clock(void)
 {
+       u32 reg;
+
+       if (mvebu_soc_family() == MVEBU_SOC_A38X)
+               reg = MVEBU_DFX_DIV_CLK_CTRL(1);
+       else
+               reg = MVEBU_CORE_DIV_CLK_CTRL(1);
+
        return CONFIG_SYS_MVEBU_PLL_CLOCK /
-               ((readl(MVEBU_CORE_DIV_CLK_CTRL(1)) &
+               ((readl(reg) &
                  NAND_ECC_DIVCKL_RATIO_MASK) >> NAND_ECC_DIVCKL_RATIO_OFFS);
 }
 
index 13c9f29c14a0560df7e36eea2db6147032e26a6a..6342cdc35cd12507f1117d4ad1bcc056c8ff9e3f 100644 (file)
@@ -73,6 +73,7 @@
 #define MVEBU_NAND_BASE                (MVEBU_REGISTER(0xd0000))
 #define MVEBU_SDIO_BASE                (MVEBU_REGISTER(0xd8000))
 #define MVEBU_LCD_BASE         (MVEBU_REGISTER(0xe0000))
+#define MVEBU_DFX_BASE         (MVEBU_REGISTER(0xe4000))
 
 #define SOC_COHERENCY_FABRIC_CTRL_REG  (MVEBU_REGISTER(0x20200))
 #define MBUS_ERR_PROP_EN       (1 << 8)
@@ -92,6 +93,7 @@
 #define SPI_PUP_EN             BIT(5)
 
 #define MVEBU_CORE_DIV_CLK_CTRL(i)     (MVEBU_CLOCK_BASE + ((i) * 0x8))
+#define MVEBU_DFX_DIV_CLK_CTRL(i)      (MVEBU_DFX_BASE + 0x250 + ((i) * 0x4))
 #define NAND_ECC_DIVCKL_RATIO_OFFS     8
 #define NAND_ECC_DIVCKL_RATIO_MASK     (0x3F << NAND_ECC_DIVCKL_RATIO_OFFS)
 
index 06a7715773c92317d910d07afb5cfc284b7d23bb..98c447ce9414d9a188990870b9a7cea5787b066b 100644 (file)
@@ -184,7 +184,7 @@ int hws_pex_config(const struct serdes_map *serdes_map, u8 count)
                DEBUG_INIT_S("PCIe, Idx ");
                DEBUG_INIT_D(pex_idx, 1);
                DEBUG_INIT_S
-                       (": Link upgraded to Gen2 based on client cpabilities\n");
+                       (": Link upgraded to Gen2 based on client capabilities\n");
        }
 
        /* Update pex DEVICE ID */
index 7d671997cb6c693f99fec2f790d295c7591eaf33..820219e68e7869be5af0dba67b333ce47eb8d5b6 100644 (file)
@@ -835,25 +835,26 @@ u32 hws_serdes_topology_verify(enum serdes_type serdes_type, u32 serdes_id,
                }
        } else {
                test_result = SERDES_ALREADY_IN_USE;
-               if (test_result == SERDES_ALREADY_IN_USE) {
-                       printf("%s: Error: serdes lane %d is configured to type %s: type already in use\n",
-                              __func__, serdes_id,
-                              serdes_type_to_string[serdes_type]);
-                       return MV_FAIL;
-               } else if (test_result == WRONG_NUMBER_OF_UNITS) {
-                       printf("%s: Warning: serdes lane %d is set to type %s.\n",
-                              __func__, serdes_id,
-                              serdes_type_to_string[serdes_type]);
-                       printf("%s: Maximum supported lanes are already set to this type (limit = %d)\n",
-                              __func__, serd_max_num);
-                       return MV_FAIL;
-               } else if (test_result == UNIT_NUMBER_VIOLATION) {
-                       printf("%s: Warning: serdes lane %d type is %s: current device support only %d units of this type.\n",
-                              __func__, serdes_id,
-                              serdes_type_to_string[serdes_type],
-                              serd_max_num);
-                       return MV_FAIL;
-               }
+       }
+
+       if (test_result == SERDES_ALREADY_IN_USE) {
+               printf("%s: Error: serdes lane %d is configured to type %s: type already in use\n",
+                      __func__, serdes_id,
+                      serdes_type_to_string[serdes_type]);
+               return MV_FAIL;
+       } else if (test_result == WRONG_NUMBER_OF_UNITS) {
+               printf("%s: Warning: serdes lane %d is set to type %s.\n",
+                      __func__, serdes_id,
+                      serdes_type_to_string[serdes_type]);
+               printf("%s: Maximum supported lanes are already set to this type (limit = %d)\n",
+                      __func__, serd_max_num);
+               return MV_FAIL;
+       } else if (test_result == UNIT_NUMBER_VIOLATION) {
+               printf("%s: Warning: serdes lane %d type is %s: current device support only %d units of this type.\n",
+                      __func__, serdes_id,
+                      serdes_type_to_string[serdes_type],
+                      serd_max_num);
+               return MV_FAIL;
        }
 
        return MV_OK;
index ffaeedbf398e40abb2376557a0e9e109c5c24169..6cbdee2fac68b4542308ae70b69cf75ec76b5737 100644 (file)
 #define CONFIG_SPL_SPI_SUPPORT
 #define CONFIG_SPL_SPI_FLASH_SUPPORT
 #define CONFIG_SPL_SPI_LOAD
-#define CONFIG_SPL_SPI_BUS             0
-#define CONFIG_SPL_SPI_CS              0
 #define CONFIG_SYS_SPI_U_BOOT_OFFS     0x20000
 #define CONFIG_SYS_U_BOOT_OFFS         CONFIG_SYS_SPI_U_BOOT_OFFS
 #endif
index 01c7895f42b50f09109a3857813541a8f27f0ff9..4e008124ad48a50af4996d57641f130cd36a2cc6 100644 (file)
 #define CONFIG_SPL_SPI_SUPPORT
 #define CONFIG_SPL_SPI_FLASH_SUPPORT
 #define CONFIG_SPL_SPI_LOAD
-#define CONFIG_SPL_SPI_BUS             0
-#define CONFIG_SPL_SPI_CS              0
 #define CONFIG_SYS_SPI_U_BOOT_OFFS     0x20000
 #define CONFIG_SYS_U_BOOT_OFFS         CONFIG_SYS_SPI_U_BOOT_OFFS
 
index 3539a62790f75508aeb4652787bf5a156f280681..88614b3f45a8e22241fd5b863a88f4e9c67235f5 100644 (file)
 #define CONFIG_SPL_SPI_SUPPORT
 #define CONFIG_SPL_SPI_FLASH_SUPPORT
 #define CONFIG_SPL_SPI_LOAD
-#define CONFIG_SPL_SPI_BUS             0
-#define CONFIG_SPL_SPI_CS              0
 #define CONFIG_SYS_SPI_U_BOOT_OFFS     0x24000
 #define CONFIG_SYS_U_BOOT_OFFS         CONFIG_SYS_SPI_U_BOOT_OFFS
 #endif
index d6acbbc6eee5014fe3b9e931ec811cb8e8f3d059..5cdfd1c8c324901646d8a6940729b9fed4752673 100644 (file)
 #define CONFIG_SPL_SPI_SUPPORT
 #define CONFIG_SPL_SPI_FLASH_SUPPORT
 #define CONFIG_SPL_SPI_LOAD
-#define CONFIG_SPL_SPI_BUS             0
-#define CONFIG_SPL_SPI_CS              0
 #define CONFIG_SYS_SPI_U_BOOT_OFFS     0x20000
 #define CONFIG_SYS_U_BOOT_OFFS         CONFIG_SYS_SPI_U_BOOT_OFFS
 
index 23373cdb58a194948edc094690248f8af186e43f..ff188e206ff092b573b6ff15fb52599f5d3aeafc 100644 (file)
 #define CONFIG_SPL_SPI_SUPPORT
 #define CONFIG_SPL_SPI_FLASH_SUPPORT
 #define CONFIG_SPL_SPI_LOAD
-#define CONFIG_SPL_SPI_BUS             0
-#define CONFIG_SPL_SPI_CS              0
 #define CONFIG_SYS_SPI_U_BOOT_OFFS     0x24000
 
 /* DS414 bus width is 32bits */
index fed310fb9b77dcd2dd1d6db9e74fd47428582d82..47d2948b3434af9745a550b72a9683b9f4826170 100644 (file)
@@ -93,8 +93,6 @@
 #define CONFIG_SPL_SPI_SUPPORT
 #define CONFIG_SPL_SPI_FLASH_SUPPORT
 #define CONFIG_SPL_SPI_LOAD
-#define CONFIG_SPL_SPI_BUS             0
-#define CONFIG_SPL_SPI_CS              0
 #define CONFIG_SYS_SPI_U_BOOT_OFFS     0x20000
 
 /* Enable DDR support in SPL (DDR3 training from Marvell bin_hdr) */
index 1caa8588560d8d9bb89dbe9889d459d57711594a..8bbf8790ccb499562196e2cfb895c02c12ccaa5b 100644 (file)
 #define CONFIG_SPL_SPI_SUPPORT
 #define CONFIG_SPL_SPI_FLASH_SUPPORT
 #define CONFIG_SPL_SPI_LOAD
-#define CONFIG_SPL_SPI_BUS             0
-#define CONFIG_SPL_SPI_CS              0
 #define CONFIG_SYS_SPI_U_BOOT_OFFS     0x1a000
 #define CONFIG_SYS_U_BOOT_OFFS         CONFIG_SYS_SPI_U_BOOT_OFFS
 
index e00958a4ce593cb9060e84b03dc365311b7acc20..26b394963cd836be1f63ce80145895f06878fb96 100644 (file)
@@ -655,14 +655,6 @@ kwboot_img_patch_hdr(void *img, size_t size)
 
        hdr->blockid = IBR_HDR_UART_ID;
 
-       /*
-        * Subtract mkimage header size from destination address
-        * as this header is not expected by the Marvell BootROM.
-        * This way, the execution address is identical to the
-        * one the image is compiled for (TEXT_BASE).
-        */
-       hdr->destaddr = hdr->destaddr - sizeof(struct image_header);
-
        if (image_ver == 0) {
                struct main_hdr_v0 *hdr_v0 = img;
 
@@ -672,6 +664,14 @@ kwboot_img_patch_hdr(void *img, size_t size)
                hdr_v0->srcaddr = hdr_v0->ext
                        ? sizeof(struct kwb_header)
                        : sizeof(*hdr_v0);
+       } else {
+               /*
+                * Subtract mkimage header size from destination address
+                * as this header is not expected by the Marvell BootROM.
+                * This way, the execution address is identical to the
+                * one the image is compiled for (TEXT_BASE).
+                */
+               hdr->destaddr = hdr->destaddr - sizeof(struct image_header);
        }
 
        hdr->checksum = kwboot_img_csum8(hdr, hdrsz) - csum;