/* callback from the mailbox hardware layer when a full message arrives */
LOCAL void HTCMsgRecvHandler(adf_nbuf_t hdr_buf, adf_nbuf_t buffer, void *context)
{
- A_UINT16 totsz;
HTC_ENDPOINT *pEndpoint;
A_UINT32 eidMask;
int eid;
adf_nbuf_peek_header(tmp_nbuf, &anbdata, &anblen);
pHTCHdr = (HTC_FRAME_HDR *)anbdata;
- totsz = adf_os_ntohs(pHTCHdr->PayloadLen);
-
eid = pHTCHdr->EndpointID;
pEndpoint = &pHTC->Endpoints[eid];
a_int32_t retval;
a_uint32_t cnt = 0;
a_uint16_t frame_len = 0;
- a_uint64_t tsf;
#define PA2DESC(_sc, _pa) \
((struct ath_desc *)((caddr_t)(_sc)->sc_rxdma.dd_desc + \
((_pa) - (_sc)->sc_rxdma.dd_desc_paddr)))
- tsf = ah->ah_getTsf64(ah);
bf = asf_tailq_first(&sc->sc_rxbuf);
ds = asf_tailq_first(&sc->sc_rxdesc);
struct ath_tx_buf *bf;
a_uint8_t vap_index, *anbdata;
ath_beacon_hdr_t *bhdr;
- struct ieee80211vap_target *vap;
a_uint32_t anblen;
- struct ieee80211_frame *wh;
if (!bc_hdr) {
adf_nbuf_peek_header(nbuf, &anbdata, &anblen);
vap_index = bhdr->vap_index;
adf_os_assert(vap_index < TARGET_VAP_MAX);
- vap = &sc->sc_vap[vap_index].av_vap;
- wh = (struct ieee80211_frame *)adf_nbuf_pull_head(nbuf,
- sizeof(ath_beacon_hdr_t));
+ adf_nbuf_pull_head(nbuf, sizeof(ath_beacon_hdr_t));
bf = sc->sc_vap[vap_index].av_bcbuf;
adf_os_assert(bf);
ath_bufhead *head, a_int32_t dir)
{
struct ath_buf *bf;
- struct ieee80211_node_target *ni;
asf_tailq_foreach(bf, head, bf_list) {
if (adf_nbuf_queue_len(&bf->bf_skbhead) != 0) {
adf_nbuf_dmamap_destroy(sc->sc_dev, bf->bf_dmamap);
- ni = bf->bf_node;
bf->bf_node = NULL;
}
static void ath_dma_unmap(struct ath_softc_tgt *sc, struct ath_tx_buf *bf)
{
- adf_nbuf_t skb = bf->bf_skb;
-
- skb = adf_nbuf_queue_first(&bf->bf_skbhead);
+ adf_nbuf_queue_first(&bf->bf_skbhead);
adf_nbuf_unmap( sc->sc_dev, bf->bf_dmamap, ADF_OS_DMA_TO_DEVICE);
}
{
struct ath_hal *ah = sc->sc_ah;
struct ath_txq *txq;
- HAL_STATUS status;
volatile a_int32_t txe_val;
adf_os_assert(bf);
txq = bf->bf_txq;
- status = ah->ah_procTxDesc(ah, bf->bf_lastds);
+ ah->ah_procTxDesc(ah, bf->bf_lastds);
ATH_TXQ_INSERT_TAIL(txq, bf, bf_list);
struct ath_tx_desc lastds;
struct ath_tx_desc *ds = &lastds;
struct ath_rc_series rcs[4];
- u_int16_t seq_st;
- u_int32_t *ba;
- int ba_index;
int nbad = 0;
int nframes = bf->bf_nframes;
struct ath_tx_buf *bf_next;
- int tx_ok = 1;
adf_os_mem_copy(ds, bf->bf_lastds, sizeof (struct ath_tx_desc));
adf_os_mem_copy(rcs, bf->bf_rcs, sizeof(rcs));
- seq_st = ATH_DS_BA_SEQ(ds);
- ba = ATH_DS_BA_BITMAP(ds);
- tx_ok = (ATH_DS_TX_STATUS(ds) == HAL_OK);
-
if (!bf->bf_isaggr) {
ath_update_stats(sc, bf);
}
while (bf) {
- ba_index = ATH_BA_INDEX(seq_st, SEQNO_FROM_BF_SEQNO(bf->bf_seqno));
bf_next = bf->bf_next;
ath_tx_status_update_aggr(sc, bf, ds, rcs, 0);
{
struct ath_tx_buf *bf;
struct ath_tx_buf *bf_next;
- struct ath_txq *txq;
-
- txq = TID_TO_ACTXQ(tid->tidno);
bf = asf_tailq_first(&tid->buf_q);
struct ath_tx_desc *ds = bf->bf_lastds;
struct ath_node_target *an;
ath_atx_tid_t *tid;
- struct ath_txq *txq;
an = (struct ath_node_target *)bf->bf_node;
tid = &an->tid[bf->bf_tidno];
- txq = TID_TO_ACTXQ(tid->tidno);
if (ATH_DS_TX_STATUS(ds) & HAL_TXERR_XRETRY) {
ath_bar_retry(sc, bf);
struct ath_hal *ah = sc->sc_ah;
HAL_11N_RATE_SERIES series[4];
int i = 0;
- adf_nbuf_queue_t skbhead;
a_uint8_t *anbdata;
a_uint32_t anblen;
| HAL_TXDESC_CLRDMASK
, 0, 0);
- skbhead = bf->bf_skbhead;
bf->bf_isaggr = 0;
bf->bf_next = NULL;