patches
series
+# gdb files
+.gdb_history
+
# cscope files
cscope.*
#!/bin/sh
-: ${JOBS:=}
+# Determine number of CPU cores if no default was set
+: ${BUILD_NCPUS:="`getconf _NPROCESSORS_ONLN`"}
+
+if [ "$BUILD_NCPUS" -gt 1 ]
+then
+ JOBS=-j`expr "$BUILD_NCPUS" + 1`
+else
+ JOBS=""
+fi
+
if [ "${CROSS_COMPILE}" ] ; then
MAKE="make CROSS_COMPILE=${CROSS_COMPILE}"
else
U_BOOT_VERSION = $(VERSION).$(PATCHLEVEL)$(EXTRAVERSION)
endif
+TIMESTAMP_FILE = $(obj)include/timestamp_autogenerated.h
VERSION_FILE = $(obj)include/version_autogenerated.h
HOSTARCH := $(shell uname -m | \
HOSTOS := $(shell uname -s | tr '[:upper:]' '[:lower:]' | \
sed -e 's/\(cygwin\).*/cygwin/')
-export HOSTARCH HOSTOS
+# Set shell to bash if possible, otherwise fall back to sh
+SHELL := $(shell if [ -x "$$BASH" ]; then echo $$BASH; \
+ else if [ -x /bin/bash ]; then echo /bin/bash; \
+ else echo sh; fi; fi)
+
+export HOSTARCH HOSTOS SHELL
# Deal with colliding definitions from tcsh etc.
VENDOR=
LIBS += drivers/bios_emulator/libatibiosemu.a
LIBS += drivers/block/libblock.a
LIBS += drivers/dma/libdma.a
+LIBS += drivers/fpga/libfpga.a
LIBS += drivers/hwmon/libhwmon.a
LIBS += drivers/i2c/libi2c.a
LIBS += drivers/input/libinput.a
LIBS += post/libpost.a
LIBS := $(addprefix $(obj),$(LIBS))
-.PHONY : $(LIBS) $(VERSION_FILE)
+.PHONY : $(LIBS) $(TIMESTAMP_FILE) $(VERSION_FILE)
LIBBOARD = board/$(BOARDDIR)/lib$(BOARD).a
LIBBOARD := $(addprefix $(obj),$(LIBBOARD))
$(LDSCRIPT): depend $(obj)include/autoconf.mk
$(MAKE) -C $(dir $@) $(notdir $@)
-$(NAND_SPL): $(VERSION_FILE) $(obj)include/autoconf.mk
+$(NAND_SPL): $(TIMESTAMP_FILE) $(VERSION_FILE) $(obj)include/autoconf.mk
$(MAKE) -C nand_spl/board/$(BOARDDIR) all
$(U_BOOT_NAND): $(NAND_SPL) $(obj)u-boot.bin $(obj)include/autoconf.mk
cat $(obj)nand_spl/u-boot-spl-16k.bin $(obj)u-boot.bin > $(obj)u-boot-nand.bin
-$(ONENAND_IPL): $(VERSION_FILE) $(obj)include/autoconf.mk
+$(ONENAND_IPL): $(TIMESTAMP_FILE) $(VERSION_FILE) $(obj)include/autoconf.mk
$(MAKE) -C onenand_ipl/board/$(BOARDDIR) all
$(U_BOOT_ONENAND): $(ONENAND_IPL) $(obj)u-boot.bin $(obj)include/autoconf.mk
$(VERSION_FILE):
@( printf '#define U_BOOT_VERSION "U-Boot %s%s"\n' "$(U_BOOT_VERSION)" \
- '$(shell $(CONFIG_SHELL) $(TOPDIR)/tools/setlocalversion $(TOPDIR))' \
- ) > $@.tmp
+ '$(shell $(TOPDIR)/tools/setlocalversion $(TOPDIR))' ) > $@.tmp
@cmp -s $@ $@.tmp && rm -f $@.tmp || mv -f $@.tmp $@
+$(TIMESTAMP_FILE):
+ @date +'#define U_BOOT_DATE "%b %d %C%y"' > $@
+ @date +'#define U_BOOT_TIME "%T"' >> $@
+
gdbtools:
$(MAKE) -C tools/gdb all || exit 1
env:
$(MAKE) -C tools/env all MTD_VERSION=${MTD_VERSION} || exit 1
-depend dep: $(VERSION_FILE)
+depend dep: $(TIMESTAMP_FILE) $(VERSION_FILE)
for dir in $(SUBDIRS) ; do $(MAKE) -C $$dir _depend ; done
TAG_SUBDIRS += include
else # !config.mk
all $(obj)u-boot.hex $(obj)u-boot.srec $(obj)u-boot.bin \
$(obj)u-boot.img $(obj)u-boot.dis $(obj)u-boot \
-$(SUBDIRS) $(VERSION_FILE) gdbtools updater env depend \
+$(SUBDIRS) $(TIMESTAMP_FILE) $(VERSION_FILE) gdbtools updater env depend \
dep tags ctags etags cscope $(obj)System.map:
@echo "System not configured - see README" >&2
@ exit 1
@rm -f $(obj)include/bmp_logo.h
@rm -f $(obj)nand_spl/{u-boot-spl,u-boot-spl.map,System.map}
@rm -f $(obj)onenand_ipl/onenand-{ipl,ipl.bin,ipl-2k.bin,ipl-4k.bin,ipl.map}
- @rm -f $(obj)api_examples/demo $(VERSION_FILE)
+ @rm -f $(obj)api_examples/demo $(TIMESTAMP_FILE) $(VERSION_FILE)
@find $(OBJTREE) -type f \
\( -name 'core' -o -name '*.bak' -o -name '*~' \
-o -name '*.o' -o -name '*.a' \) -print \
This define fills in the correct boot CPU in the boot
param header, the default value is zero if undefined.
+- vxWorks boot parameters:
+
+ bootvx constructs a valid bootline using the following
+ environments variables: bootfile, ipaddr, serverip, hostname.
+ It loads the vxWorks image pointed bootfile.
+
+ CONFIG_SYS_VXWORKS_BOOT_DEVICE - The vxworks device name
+ CONFIG_SYS_VXWORKS_MAC_PTR - Ethernet 6 byte MA -address
+ CONFIG_SYS_VXWORKS_SERVERNAME - Name of the server
+ CONFIG_SYS_VXWORKS_BOOT_ADDR - Address of boot parameters
+
+ CONFIG_SYS_VXWORKS_ADD_PARAMS
+
+ Add it at the end of the bootline. E.g "u=username pw=secret"
+
+ Note: If a "bootargs" environment is defined, it will overwride
+ the defaults discussed just above.
+
- Serial Ports:
CONFIG_PL010_SERIAL
#include <malloc.h>
#include <devices.h>
#include <net.h>
-#include <version.h>
+#include <timestamp.h>
#include <dtt.h>
#include <mpc824x.h>
#include <asm/processor.h>
char buf[32];
puts ("Board: BMW MPC8245/KAHLUA2 - CHRP (MAP B)\n");
- printf("Built: %s at %s\n", __DATE__ , __TIME__ );
+ printf("Built: %s at %s\n", U_BOOT_DATE, U_BOOT_TIME);
/* printf("MPLD: Revision %d\n", SYS_REVID_GET()); */
printf("Local Bus at %s MHz\n", strmhz(buf, busfreq));
return 0;
#include <pci.h>
#include <ide.h>
#include <netdev.h>
+#include <timestamp.h>
#include "piix_pci.h"
#include "eXalion.h"
char buf[32];
printf ("Board: eXalion MPC824x - CHRP (MAP B)\n");
- printf ("Built: %s at %s\n", __DATE__, __TIME__);
+ printf ("Built: %s at %s\n", U_BOOT_DATE, U_BOOT_TIME);
printf ("Local Bus: %s MHz\n", strmhz (buf, busfreq));
return 0;
--- /dev/null
+/*
+ * (C) Copyright 2008
+ * Gary Jennejohn, DENX Software Engineering GmbH, garyj@denx.de.
+ *
+ * Based in part on cpu/mpc8260/ether_scc.c.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <malloc.h>
+#include <net.h>
+
+#ifdef CONFIG_KEYMILE_HDLC_ENET
+#ifdef TEST_IT
+#include <command.h>
+#endif
+
+#include "keymile_hdlc_enet.h"
+
+extern char keymile_slot; /* our slot number in the backplane */
+
+/* Allow up to about 50 ms for sending */
+#define TOUT_LOOP 50000
+
+/*
+ * Since, except during initialization, ethact is always HDLC ETHERNET
+ * while we're in the driver, just use serial_printf() everywhere for
+ * output. This avoids possible conflicts when netconsole is being
+ * used.
+ */
+#define dprintf(fmt, args...) serial_printf(fmt, ##args)
+
+/* Cannot use the storage from net.c because we allocate larger buffers */
+static volatile uchar MyPktBuf[HDLC_PKTBUFSRX * PKT_MAXBLR_SIZE + PKTALIGN];
+static volatile uchar *MyRxPackets[HDLC_PKTBUFSRX]; /* Receive packet */
+
+static unsigned int keymile_rxIdx; /* index of the current RX buffer */
+
+static IPaddr_t cachedNumbers[CACHEDNUMBERS]; /* 4 bytes per entry */
+void initCachedNumbers(int);
+
+/*
+ * SCC Ethernet Tx and Rx buffer descriptors allocated at the
+ * immr->udata_bd address on Dual-Port RAM
+ * Provide for Double Buffering
+ */
+typedef volatile struct CommonBufferDescriptor {
+ cbd_t txbd; /* Tx BD */
+ cbd_t rxbd[HDLC_PKTBUFSRX]; /* Rx BD */
+} RTXBD;
+
+/*
+ * This must be extern because it is allocated in DPRAM using CPM-sepcific
+ * code.
+ */
+static RTXBD *rtx;
+
+static int keymile_hdlc_enet_send(struct eth_device *, volatile void *, int);
+static int keymile_hdlc_enet_recv(struct eth_device *);
+void keymile_hdlc_enet_init_bds(RTXBD *);
+extern int keymile_hdlc_enet_init(struct eth_device *, bd_t *);
+extern void keymile_hdlc_enet_halt(struct eth_device *);
+
+/* flags in the buffer descriptor not defined anywhere else */
+#define BD_SC_CT BD_SC_CD
+#define BD_SC_CR 0x04
+#define BD_SC_DE 0x80
+#ifndef BD_SC_TC
+#define BD_SC_TC ((ushort)0x0400) /* Transmit CRC */
+#endif
+#define BD_SC_FIRST BD_SC_TC
+#define BD_SC_STATS (BD_SC_BR | BD_SC_FR | BD_SC_PR | BD_SC_CR | BD_SC_CD \
+ | BD_SC_OV | BD_SC_DE)
+
+#if defined(TEST_RX) || defined(TEST_TX) || defined(TEST_IT)
+static void hexdump(unsigned char *buf, int len)
+{
+ int i;
+ const int bytesPerLine = 32;
+
+ if (len > 4 * bytesPerLine)
+ len = 4 * bytesPerLine;
+ dprintf("\t address: %08x\n", (unsigned int)buf);
+ for (i = 0; i < len; i++) {
+ if (i % bytesPerLine == 0)
+ dprintf("%04x: ", (unsigned short)i);
+ dprintf("%02x ", buf[i]);
+ if ((i + 1) % bytesPerLine == 0) {
+ dprintf("\n");
+ continue;
+ }
+ if ((i + 1) % 8 == 0)
+ printf(" ");
+ }
+ if (len % bytesPerLine)
+ dprintf("\n");
+}
+#endif
+
+int keymile_hdlc_enet_initialize(bd_t *bis)
+{
+ struct eth_device *dev;
+
+ dev = (struct eth_device *) malloc(sizeof *dev);
+ memset(dev, 0, sizeof *dev);
+#ifdef TEST_IT
+ seth = dev;
+#endif
+
+ sprintf(dev->name, "HDLC ETHERNET");
+ dev->init = keymile_hdlc_enet_init;
+ dev->halt = keymile_hdlc_enet_halt;
+ dev->send = keymile_hdlc_enet_send;
+ dev->recv = keymile_hdlc_enet_recv;
+
+ eth_register(dev);
+
+ return 1;
+}
+
+/*
+ * This is called from the board-specific driver after rtx is allocated.
+ */
+void keymile_hdlc_enet_init_bds(RTXBD *board_rtx)
+{
+ volatile cbd_t *bdp;
+ int i;
+
+ rtx = board_rtx;
+ keymile_rxIdx = 0;
+ /*
+ * Initialize the buffer descriptors.
+ */
+ bdp = &rtx->txbd;
+ bdp->cbd_sc = 0;
+ bdp->cbd_bufaddr = 0;
+ bdp->cbd_sc = BD_SC_WRAP;
+
+ /*
+ * Setup RX packet buffers, aligned correctly.
+ * Borrowed from net/net.c.
+ */
+ MyRxPackets[0] = &MyPktBuf[0] + (PKTALIGN - 1);
+ MyRxPackets[0] -= (ulong)MyRxPackets[0] % PKTALIGN;
+ for (i = 1; i < HDLC_PKTBUFSRX; i++)
+ MyRxPackets[i] = MyRxPackets[0] + i * PKT_MAXBLR_SIZE;
+
+ bdp = &rtx->rxbd[0];
+ for (i = 0; i < HDLC_PKTBUFSRX; i++) {
+ bdp->cbd_sc = BD_SC_EMPTY;
+ /* Leave space at the start for INET header. */
+ bdp->cbd_bufaddr = (unsigned int)(MyRxPackets[i] +
+ INET_HDR_ALIGN);
+ bdp++;
+ }
+ bdp--;
+ bdp->cbd_sc |= BD_SC_WRAP;
+}
+
+/*
+ * This returns the current port number for NETCONSOLE. If nc_port
+ * in netconsole.c weren't declared static we wouldn't need this.
+ */
+static short get_netcons_port(void)
+{
+ char *p;
+ short nc_port;
+
+ nc_port = 6666; /* default */
+
+ p = getenv("ncip");
+ if (p != NULL) {
+ p = strchr(p, ':');
+ if (p != NULL)
+ nc_port = simple_strtoul(p + 1, NULL, 10);
+ }
+
+ return htons(nc_port);
+}
+
+/*
+ * Read the port numbers from the variables
+ */
+void initCachedNumbers(int verbose)
+{
+ char *str;
+ ushort port;
+
+ /* already in network order */
+ cachedNumbers[IP_ADDR] = getenv_IPaddr("ipaddr");
+ /* already in network order */
+ cachedNumbers[IP_SERVER] = getenv_IPaddr("serverip");
+ str = getenv("tftpsrcp");
+ if (str != NULL) {
+ /* avoid doing htons() again and again */
+ port = htons((ushort)simple_strtol(str, NULL, 10));
+ cachedNumbers[TFTP_SRC_PORT] = port;
+ } else
+ /* this can never be a valid port number */
+ cachedNumbers[TFTP_SRC_PORT] = (ulong)-1;
+ str = getenv("tftpdstp");
+ if (str != NULL) {
+ /* avoid doing htons() again and again */
+ port = htons((ushort)simple_strtol(str, NULL, 10));
+ cachedNumbers[TFTP_DST_PORT] = port;
+ } else
+ /* this is the default value */
+ cachedNumbers[TFTP_DST_PORT] = htons(WELL_KNOWN_PORT);
+ /* already in network order */
+ cachedNumbers[NETCONS_PORT] = get_netcons_port();
+ if (verbose) {
+ dprintf("\nIP Number Initialization:\n");
+ dprintf(" ip address %08lx\n", cachedNumbers[IP_ADDR]);
+ dprintf(" server ip address %08lx\n",
+ cachedNumbers[IP_SERVER]);
+ dprintf(" tftp client port %ld\n",
+ cachedNumbers[TFTP_SRC_PORT]);
+ dprintf(" tftp server port %ld\n",
+ cachedNumbers[TFTP_DST_PORT]);
+ dprintf(" netcons port %ld\n",
+ cachedNumbers[NETCONS_PORT]);
+ dprintf(" slot number (hex) %02x\n", keymile_slot);
+ }
+}
+
+static void keymile_hdlc_enet_doarp(volatile void *packet, int len)
+{
+ ARP_t *arp;
+ IPaddr_t src_ip; /* U-Boot's IP */
+ IPaddr_t dest_ip; /* the mgcoge's IP */
+ unsigned char *packet_copy = malloc(len);
+
+ /*
+ * Handling an ARP request means that a new transfer has started.
+ * Update our cached parameters now.
+ */
+ initCachedNumbers(0); /* may reinit port numbers */
+
+ /* special handling required for ARP */
+ arp = (ARP_t *)(packet + ETHER_HDR_SIZE);
+ /*
+ * XXXX
+ * This is pretty dirty! NetReceive only uses
+ * a few fields when handling an ARP reply, so
+ * we only modify those here. This could
+ * result in catastrophic failure at a later
+ * time if the handler is modified!
+ */
+ arp->ar_op = htons(ARPOP_REPLY);
+ /* save his/our IP */
+ src_ip = NetReadIP(&arp->ar_data[6]);
+ dest_ip = NetReadIP(&arp->ar_data[16]);
+ /* copy target IP to source IP */
+ NetCopyIP(&arp->ar_data[6], &dest_ip);
+ /* copy our IP to the right place */
+ NetCopyIP(&arp->ar_data[16], &src_ip);
+ /* always use 0x7f as the MAC for the coge */
+ arp->ar_data[0] = HDLC_UACUA;
+ /*
+ * copy the packet
+ * if NetReceive wants to write to stdout, it may overwrite packet
+ * especially if stdout is set to nc!
+ *
+ * However, if the malloc() above fails then we can still try the
+ * original packet, rather than causing the transfer to fail.
+ */
+ if (packet_copy != NULL) {
+ memcpy(packet_copy, (char *)packet, len);
+ NetReceive(packet_copy, len);
+ free(packet_copy);
+ } else
+ NetReceive(packet, len);
+}
+
+/*
+ * NOTE all callers ignore the returned value!
+ * At the moment this only handles ARP Requests, TFTP and NETCONSOLE.
+ */
+static int keymile_hdlc_enet_send(struct eth_device *dev, volatile void *packet,
+ int len)
+{
+ int j;
+ uint data_addr;
+ int data_len;
+ struct icn_hdr header;
+ struct icn_frame *frame;
+ Ethernet_t *et;
+ ARP_t *arp;
+ IP_t *ip;
+
+ if (len > (MAX_FRAME_LENGTH - sizeof(header)))
+ return -1;
+
+ frame = NULL;
+ et = NULL;
+ arp = NULL;
+ ip = NULL;
+
+ j = 0;
+ while ((rtx->txbd.cbd_sc & BD_SC_READY) && (j < TOUT_LOOP)) {
+ /* will also trigger Wd if needed, but maybe too often */
+ udelay(1);
+ j++;
+ }
+ if (j >= TOUT_LOOP) {
+ dprintf("TX not ready sc %x\n", rtx->txbd.cbd_sc);
+ return -1;
+ }
+
+ /*
+ * First check for an ARP Request since this requires special handling.
+ */
+ if (len >= (ARP_HDR_SIZE + ETHER_HDR_SIZE)) {
+ et = (Ethernet_t *)packet;
+ arp = (ARP_t *)(((char *)et) + ETHER_HDR_SIZE);
+ /* ARP and REQUEST? */
+ if (et->et_protlen == PROT_ARP &&
+ arp->ar_op == htons(ARPOP_REQUEST)) {
+ /* just short-circuit the request on the U-Boot side */
+ keymile_hdlc_enet_doarp(packet, len);
+ return 0;
+ }
+ }
+
+ /*
+ * GJ - I suppose the assumption here that len will always be
+ * > INET_HDR_SIZE is alright as long as the network stack
+ * isn't changed.
+ * Do not send INET header.
+ */
+ data_len = len + sizeof(header) - INET_HDR_SIZE;
+ frame = (struct icn_frame *) (((char *)packet) + INET_HDR_SIZE -
+ sizeof(header));
+
+#ifdef TEST_TX
+ printf("frame: %08x, ", frame);
+ hexdump((unsigned char *)packet, data_len + INET_HDR_SIZE);
+#endif
+
+ data_addr = (uint)frame;
+ if (len >= (IP_HDR_SIZE + ETHER_HDR_SIZE))
+ ip = (IP_t *)(packet + ETHER_HDR_SIZE);
+ /* Is it TFTP? TFTP always uses UDP and the cached dport */
+ if (ip != NULL && ip->ip_p == IPPROTO_UDP && ip->udp_dst ==
+ (ushort)cachedNumbers[TFTP_DST_PORT]) {
+ /* just in case the port wasn't set in the environment */
+ if (cachedNumbers[TFTP_SRC_PORT] == (ulong)-1)
+ cachedNumbers[TFTP_SRC_PORT] = ip->udp_src;
+ frame->hdr.application = MGS_TFTP;
+ }
+ /*
+ * Is it NETCONSOLE? NETCONSOLE always uses UDP.
+ */
+ else if (ip != NULL && ip->ip_p == IPPROTO_UDP
+ && ip->udp_dst == (ushort)cachedNumbers[NETCONS_PORT]) {
+ frame->hdr.application = MGS_NETCONS;
+ } else {
+ /* reject unknown packets */
+ /* may do some check on frame->hdr.application */
+ dprintf("Unknown packet type in %s, rejected\n",
+ __func__);
+ return -1;
+ }
+ /*
+ * Could extract the target's slot ID from its MAC here,
+ * but u-boot only wants to talk to the active server.
+ *
+ * avoid setting new source address when moving to another slot
+ */
+ frame->hdr.src_addr = keymile_slot;
+ frame->hdr.dest_addr = HDLC_UACUA;
+#ifdef TEST_TX
+ {
+ dprintf("TX: ");
+ hexdump((unsigned char *)data_addr, data_len);
+ }
+#endif
+
+ flush_cache(data_addr, data_len);
+ rtx->txbd.cbd_bufaddr = data_addr;
+ rtx->txbd.cbd_datlen = data_len;
+ rtx->txbd.cbd_sc |= (BD_SC_READY | BD_SC_TC | BD_SC_LAST | BD_SC_WRAP);
+
+ while ((rtx->txbd.cbd_sc & BD_SC_READY) && (j < TOUT_LOOP)) {
+ /* will also trigger Wd if needed, but maybe too often */
+ udelay(1);
+ j++;
+ }
+ if (j >= TOUT_LOOP)
+ dprintf("TX timeout\n");
+#ifdef ET_DEBUG
+ dprintf("cycles: %d status: %x\n", j, rtx->txbd.cbd_sc);
+#endif
+ j = (rtx->txbd.cbd_sc & BD_SC_STATS); /* return only status bits */
+ return j;
+}
+
+/*
+ * During a receive, the RxIdx points to the current incoming buffer.
+ * When we update through the ring, if the next incoming buffer has
+ * not been given to the system, we just set the empty indicator,
+ * effectively tossing the packet.
+ */
+static int keymile_hdlc_enet_recv(struct eth_device *dev)
+{
+ int length;
+ unsigned char app;
+ struct icn_frame *fp;
+ Ethernet_t *ep;
+ IP_t *ip;
+
+ for (;;) {
+ if (rtx->rxbd[keymile_rxIdx].cbd_sc & BD_SC_EMPTY) {
+ length = -1;
+ break; /* nothing received - leave for() loop */
+ }
+
+ length = rtx->rxbd[keymile_rxIdx].cbd_datlen;
+#ifdef TEST_RX
+ dprintf("packet %d bytes long\n", length);
+#endif
+
+ /*
+ * BD_SC_BR -> LG bit
+ * BD_SC_FR -> NO bit
+ * BD_SC_PR -> AB bit
+ * BD_SC_NAK -> CR bit
+ * 0x80 -> DE bit
+ */
+ if (rtx->rxbd[keymile_rxIdx].cbd_sc & BD_SC_STATS) {
+#ifdef ET_DEBUG
+ dprintf("err: %x\n", rtx->rxbd[keymile_rxIdx].cbd_sc);
+#endif
+ } else if (length > MAX_FRAME_LENGTH) { /* can't happen */
+#ifdef ET_DEBUG
+ dprintf("err: packet too big\n");
+#endif
+ } else {
+ fp = (struct icn_frame *)(MyRxPackets[keymile_rxIdx] +
+ INET_HDR_ALIGN - INET_HDR_SIZE);
+#ifdef TEST_RX
+ dprintf("RX %d: ", keymile_rxIdx);
+ hexdump((unsigned char *)MyRxPackets[keymile_rxIdx],
+ INET_HDR_ALIGN + INET_HDR_SIZE + 4);
+#endif
+ /* copy icn header to the beginning */
+ memcpy(fp, ((char *)fp + INET_HDR_SIZE),
+ sizeof(struct icn_hdr));
+ app = fp->hdr.application;
+ if (app == MGS_NETCONS || app == MGS_TFTP) {
+ struct icn_hdr *ih = &fp->hdr;
+ unsigned char icn_src_addr = ih->src_addr;
+ unsigned char icn_dest_addr = ih->dest_addr;
+
+ /*
+ * expand header by INET_HDR_SIZE
+ */
+ length += INET_HDR_SIZE;
+ /* initalize header */
+ memset((char *)fp->data, 0x00, INET_HDR_SIZE);
+ ep = (Ethernet_t *)fp->data;
+ /* set MACs */
+ ep->et_dest[0] = icn_dest_addr;
+ ep->et_src[0] = icn_src_addr;
+ ep->et_protlen = htons(PROT_IP);
+ /* set ip stuff */
+ ip = (IP_t *)(fp->data + ETHER_HDR_SIZE);
+ /* set ip addresses */
+ ip->ip_src = cachedNumbers[IP_SERVER];
+ ip->ip_dst = cachedNumbers[IP_ADDR];
+ /* ip length */
+ ip->ip_len = htons(length - ETHER_HDR_SIZE -
+ REMOVE);
+ /* ip proto */
+ ip->ip_p = IPPROTO_UDP;
+ switch (app) {
+ case MGS_TFTP:
+ /* swap src/dst port numbers */
+ ip->udp_src = (ushort)
+ cachedNumbers[TFTP_DST_PORT];
+ ip->udp_dst = (ushort)
+ cachedNumbers[TFTP_SRC_PORT];
+ ip->udp_len = ip->ip_len -
+ IP_HDR_SIZE_NO_UDP;
+ ip->udp_xsum = 0;
+ break;
+ case MGS_NETCONS:
+ ip->udp_src = (ushort)
+ cachedNumbers[NETCONS_PORT];
+ /*
+ * in drivers/net/netconsole.c src port
+ * equals dest port
+ */
+ ip->udp_dst = ip->udp_src;
+ ip->udp_len = ip->ip_len -
+ IP_HDR_SIZE_NO_UDP;
+ ip->udp_xsum = 0;
+ break;
+ }
+ /* ip version */
+ ip->ip_hl_v = (0x40) | (0x0f &
+ (IP_HDR_SIZE_NO_UDP / 4));
+ ip->ip_tos = 0;
+ ip->ip_id = 0;
+ /* flags, fragment offset */
+ ip->ip_off = htons(0x4000);
+ ip->ip_ttl = 255; /* time to live */
+ /* have to fixup the checksum */
+ ip->ip_sum = ~NetCksum((uchar *)ip,
+ IP_HDR_SIZE_NO_UDP / 2);
+ /*
+ * Pass the packet up to the protocol layers
+ * but remove dest_addr, src_addr, application
+ * and the CRC.
+ */
+#ifdef TEST_RX
+ hexdump((unsigned char *)fp->data,
+ INET_HDR_SIZE + 4);
+#endif
+ NetReceive(fp->data, length - REMOVE);
+ } else {
+ /*
+ * the other application types are not yet
+ * supported by u-boot.
+ */
+ /* normally drop it */
+#ifdef TEST_NO
+ /* send it anyway */
+ fp = (struct icn_frame *)
+ (MyRxPackets[keymile_rxIdx] +
+ INET_HDR_ALIGN);
+ NetReceive(fp->data, length - REMOVE);
+#endif
+ }
+ }
+
+ /* Give the buffer back to the SCC. */
+ rtx->rxbd[keymile_rxIdx].cbd_datlen = 0;
+
+ /* wrap around buffer index when necessary */
+ if ((keymile_rxIdx + 1) >= HDLC_PKTBUFSRX) {
+ rtx->rxbd[HDLC_PKTBUFSRX - 1].cbd_sc =
+ (BD_SC_WRAP | BD_SC_EMPTY);
+ keymile_rxIdx = 0;
+ } else {
+ rtx->rxbd[keymile_rxIdx].cbd_sc = BD_SC_EMPTY;
+ keymile_rxIdx++;
+ }
+ }
+ return length;
+}
+
+#ifdef TEST_IT
+/* simple send test routine */
+int hdlc_enet_stest(struct cmd_tbl_s *a, int b, int c, char **d)
+{
+ unsigned char pkt[2];
+ int ret;
+
+ dprintf("enter stest\n");
+ /* may have to initialize things */
+ if (seth->state != ETH_STATE_ACTIVE) {
+ /* the bd_t* is not used */
+ if (seth->init(seth, NULL) >= 0)
+ seth->state = ETH_STATE_ACTIVE;
+ }
+ pkt[0] = 0xea;
+ pkt[1] = 0xae;
+ ret = keymile_hdlc_enet_send(seth, pkt, 2);
+ dprintf("return from send %x\n", ret);
+ dprintf("exit stest\n");
+ return ret;
+}
+U_BOOT_CMD(
+ stest, 1, 1, hdlc_enet_stest,
+ "stest - simple send test for hdlc_enet\n",
+ "no arguments\n"
+);
+/* simple receive test routine */
+int hdlc_enet_rtest(struct cmd_tbl_s *a, int b, int c, char **d)
+{
+ int ret;
+
+ dprintf("enter rtest\n");
+ /* may have to initialize things */
+ if (seth->state != ETH_STATE_ACTIVE) {
+ /* the bd_t* is not used */
+ if (seth->init(seth, NULL) >= 0)
+ seth->state = ETH_STATE_ACTIVE;
+ }
+ ret = keymile_hdlc_enet_recv(seth);
+ dprintf("return from recv %x\n", ret);
+ dprintf("exit rtest\n");
+ return ret;
+}
+U_BOOT_CMD(
+ rtest, 1, 1, hdlc_enet_rtest,
+ "rtest - simple receive test for hdlc_enet\n",
+ "no arguments\n"
+);
+#endif
+
+#endif /* CONFIG_KEYMILE_HDLC_ENET */
--- /dev/null
+/*
+ * (C) Copyright 2008
+ * Gary Jennejohn, DENX Software Engineering GmbH, garyj@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef _KEYMILE_HDLC_ENET_H_
+#define _KEYMILE_HDLC_ENET_H_
+
+/* Unfortuantely, we have do this to get the flag defines in the cbd_t */
+#ifdef CONFIG_MGSUVD
+#include <commproc.h>
+#endif
+#ifdef CONFIG_MGCOGE
+#include <mpc8260.h>
+#include <asm/cpm_8260.h>
+#endif
+
+/*
+ * Defines for the ICN protocol used for communication over HDLC
+ * on the backplane between MGSUVDs and MGCOGEs.
+ */
+
+/*
+ * MAC which is reserved for communication (0x00 - 0xff in the last byte,
+ * which is the slot number)
+ */
+
+/*
+ * A DLL frame looks like this:
+ * 8 bit | 8 bit | 8 bit | 8 bit | n * 8 bit| 16 bit| 8 bit
+ * opening| destination| source | application| data | FCS | closing
+ * flag | address | address| | | | flag
+ * (HW) (APP) (APP) (APP) (APP) (HW) (HW)
+ */
+
+/*
+ * The opening flag, the FCS and the closing flag are set by the hardware so
+ * they are not reflected in this struct.
+ */
+struct icn_hdr {
+ unsigned char dest_addr;
+ unsigned char src_addr;
+ unsigned char application;
+} __attribute__((packed));
+
+#define ICNHDR_LEN (sizeof(struct icn_hdr))
+#define CRC_LEN (sizeof(short))
+/* bytes to remove from packet before sending it upstream */
+#define REMOVE (ICNHDR_LEN + CRC_LEN)
+
+struct icn_frame {
+ struct icn_hdr hdr;
+ unsigned char data[0]; /* a place holder */
+} __attribute__((packed));
+
+/* Address field */
+#define HDLC_UUA 0x00 /* Unicast Unit Address */
+#define HDLC_UUA_MASK 0x3f /* the last 6 bits contain the slot number */
+#define SET_HDLC_UUA(x) ((HDLC_UUA | ((x) & HDLC_UUA_MASK)))
+#define HDLC_UACUA 0x7f /* Unicast Active Control Unit Address */
+#define HDLC_BCAST 0xff /* broadcast */
+
+/* Application field */
+#define MGS_UUSP 0x00
+#define MGS_UREP 0x01
+#define MGS_IUP 0x02
+#define MGS_UTA 0x03
+#define MGS_MDS 0x04
+#define MGS_ITIME 0x05
+/* added by DENX */
+#define MGS_NETCONS 0x06 /* netconsole */
+#define MGS_TFTP 0x07
+
+/* Useful defines for buffer sizes, etc. */
+#define HDLC_PKTBUFSRX 32
+#define MAX_FRAME_LENGTH 1500 /* ethernet frame size */
+ /* 14 + 28 */
+#define INET_HDR_SIZE (ETHER_HDR_SIZE + IP_HDR_SIZE)
+#define INET_HDR_ALIGN (((INET_HDR_SIZE + PKTALIGN - 1) / PKTALIGN) * PKTALIGN)
+/* INET_HDR_SIZE is stripped off */
+#define PKT_MAXBLR_SIZE (MAX_FRAME_LENGTH + INET_HDR_ALIGN)
+
+/*
+ * It is too slow to read always the port numbers and IP addresses from the
+ * string variables.
+ * cachedNumbers is meant to cache it.
+ * THIS IS ONLY A SPEED IMPROVEMENT!
+ */
+enum {
+ IP_ADDR = 0, /* getenv_IPaddr("serverip"); */
+ IP_SERVER, /* getenv_IPaddr("ipaddr"); */
+ TFTP_SRC_PORT, /* simple_strtol(getenv("tftpsrcp"), NULL, 10); */
+ TFTP_DST_PORT, /* simple_strtol(getenv("tftpdstp"), NULL, 10); */
+ NETCONS_PORT, /* simple_strtol(getenv("ncip"), NULL, 10); */
+ CACHEDNUMBERS
+};
+
+#define WELL_KNOWN_PORT 69 /* Well known TFTP port # */
+
+/* define this to create a test commend (htest) */
+#undef TEST_IT
+#ifdef TEST_IT
+/* have to save a copy of the eth_device for the test command's use */
+struct eth_device *seth;
+#endif
+/* define this for outputting of received packets */
+#undef TEST_RX
+/* define this for outputting of packets being sent */
+#undef TEST_TX
+
+#endif /* _KEYMILE_HDLC_ENET_H_ */
LIB = $(obj)lib$(BOARD).a
-COBJS := $(BOARD).o ../common/common.o
+COBJS := $(BOARD).o ../common/common.o ../common/keymile_hdlc_enet.o \
+ mgcoge_hdlc_enet.o
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS))
--- /dev/null
+/*
+ * (C) Copyright 2008
+ * Gary Jennejohn, DENX Software Engineering GmbH, garyj@denx.de.
+ *
+ * Based in part on cpu/mpc8260/ether_scc.c.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <malloc.h>
+#include <net.h>
+
+#ifdef CONFIG_KEYMILE_HDLC_ENET
+
+#include "../common/keymile_hdlc_enet.h"
+
+char keymile_slot; /* our slot number in the backplane */
+
+/*
+ * Since, except during initialization, ethact is always HDLC ETHERNET
+ * while we're in the driver, just use serial_printf() everywhere for
+ * output. This avoids possible conflicts when netconsole is being
+ * used.
+ */
+#define dprintf(fmt, args...) serial_printf(fmt, ##args)
+
+static int already_inited;
+
+/*
+ * SCC Ethernet Tx and Rx buffer descriptors allocated at the
+ * immr->udata_bd address on Dual-Port RAM
+ * Provide for Double Buffering
+ */
+typedef volatile struct CommonBufferDescriptor {
+ cbd_t txbd; /* Tx BD */
+ cbd_t rxbd[HDLC_PKTBUFSRX]; /* Rx BD */
+} RTXBD;
+
+static RTXBD *rtx;
+
+int keymile_hdlc_enet_init(struct eth_device *, bd_t *);
+void keymile_hdlc_enet_halt(struct eth_device *);
+extern void keymile_hdlc_enet_init_bds(RTXBD *);
+extern void initCachedNumbers(int);
+
+/* Use SCC1 */
+#define CPM_CR_SCC_PAGE CPM_CR_SCC1_PAGE
+#define CPM_CR_SCC_SBLOCK CPM_CR_SCC1_SBLOCK
+#define CMXSCR_MASK (CMXSCR_GR1|CMXSCR_SC1|\
+ CMXSCR_RS1CS_MSK|CMXSCR_TS1CS_MSK)
+#define CMXSCR_VALUE (CMXSCR_RS1CS_CLK11|CMXSCR_TS1CS_CLK11)
+#define MGC_PROFF_HDLC PROFF_SCC1
+#define MGC_SCC_HDLC 0 /* Index, not number! */
+
+int keymile_hdlc_enet_init(struct eth_device *dev, bd_t *bis)
+{
+ /* int i; */
+ uint dpr;
+ /* volatile cbd_t *bdp; */
+ volatile immap_t *im = (immap_t *)CONFIG_SYS_IMMR;
+ volatile cpm8260_t *cp = &(im->im_cpm);
+ volatile scc_t *sccp;
+ volatile scc_hdlc_t *hpr;
+ volatile iop8260_t *iop;
+
+ if (already_inited)
+ return 0;
+
+ hpr = (scc_hdlc_t *)(&im->im_dprambase[MGC_PROFF_HDLC]);
+ sccp = (scc_t *)(&im->im_scc[MGC_SCC_HDLC]);
+ iop = &im->im_ioport;
+
+ /*
+ * Disable receive and transmit just in case.
+ */
+ sccp->scc_gsmrl &= ~(SCC_GSMRL_ENR | SCC_GSMRL_ENT);
+
+ /*
+ * Avoid exhausting DPRAM, which would cause a panic.
+ */
+ if (rtx == NULL) {
+ /* dpr is an offset into dpram */
+ dpr = m8260_cpm_dpalloc(sizeof(RTXBD), 8);
+ rtx = (RTXBD *)&im->im_dprambase[dpr];
+ }
+
+ /* We need the slot number for addressing. */
+ keymile_slot = *(char *)(CONFIG_SYS_SLOT_ID_BASE +
+ CONFIG_SYS_SLOT_ID_OFF) & CONFIG_SYS_SLOT_ID_MASK;
+ /*
+ * Be consistent with the Linux driver and set
+ * only enetaddr[0].
+ *
+ * Always add 1 to the slot number so that
+ * there are no problems with an ethaddr which
+ * is all 0s. This should be acceptable because
+ * a board should never have a slot number of 255,
+ * which is the broadcast address. The HDLC addressing
+ * uses only the slot number.
+ */
+ dev->enetaddr[0] = keymile_slot + 1;
+#ifdef TEST_IT
+ dprintf("slot %d\n", keymile_slot);
+#endif
+
+ /* use pd30, pd31 pins for TXD1, RXD1 respectively */
+ iop->iop_ppard |= (0x80000000 >> 30) | (0x80000000 >> 31);
+ iop->iop_pdird |= (0x80000000 >> 30);
+ iop->iop_psord |= (0x80000000 >> 30);
+
+ /* use pc21 as CLK11 */
+ iop->iop_pparc |= (0x80000000 >> 21);
+ iop->iop_pdirc &= ~(0x80000000 >> 21);
+ iop->iop_psorc &= ~(0x80000000 >> 21);
+
+ /* use pc15 as CTS1 */
+ iop->iop_pparc |= (0x80000000 >> 15);
+ iop->iop_pdirc &= ~(0x80000000 >> 15);
+ iop->iop_psorc &= ~(0x80000000 >> 15);
+
+ /*
+ * SI clock routing
+ * use CLK11
+ * this also connects SCC1 to NMSI
+ */
+ im->im_cpmux.cmx_scr = (im->im_cpmux.cmx_scr & ~CMXSCR_MASK) |
+ CMXSCR_VALUE;
+
+ /* keymile_rxIdx = 0; */
+
+ /*
+ * Initialize function code registers for big-endian.
+ */
+ hpr->sh_genscc.scc_rfcr = CPMFCR_EB;
+ hpr->sh_genscc.scc_tfcr = CPMFCR_EB;
+
+ /*
+ * Set maximum bytes per receive buffer.
+ */
+ hpr->sh_genscc.scc_mrblr = MAX_FRAME_LENGTH;
+
+ /* Setup CRC generator values for HDLC */
+ hpr->sh_cmask = 0x0000F0B8;
+ hpr->sh_cpres = 0x0000FFFF;
+
+ /* Initialize all error counters to 0 */
+ hpr->sh_disfc = 0;
+ hpr->sh_crcec = 0;
+ hpr->sh_abtsc = 0;
+ hpr->sh_nmarc = 0;
+ hpr->sh_retrc = 0;
+
+ /* Set maximum frame length size */
+ hpr->sh_mflr = MAX_FRAME_LENGTH;
+
+ /* set to 1 for per frame processing change later if needed */
+ hpr->sh_rfthr = 1;
+
+ hpr->sh_hmask = 0xff;
+
+ hpr->sh_haddr2 = SET_HDLC_UUA(keymile_slot);
+ hpr->sh_haddr3 = hpr->sh_haddr2;
+ hpr->sh_haddr4 = hpr->sh_haddr2;
+ /* broadcast */
+ hpr->sh_haddr1 = HDLC_BCAST;
+
+ hpr->sh_genscc.scc_rbase = (unsigned int) &rtx->rxbd[0];
+ hpr->sh_genscc.scc_tbase = (unsigned int) &rtx->txbd;
+
+#if 0
+ /*
+ * Initialize the buffer descriptors.
+ */
+ bdp = &rtx->txbd;
+ bdp->cbd_sc = 0;
+ bdp->cbd_bufaddr = 0;
+ bdp->cbd_sc = BD_SC_WRAP;
+
+ /*
+ * Setup RX packet buffers, aligned correctly.
+ * Borrowed from net/net.c.
+ */
+ MyRxPackets[0] = &MyPktBuf[0] + (PKTALIGN - 1);
+ MyRxPackets[0] -= (ulong)MyRxPackets[0] % PKTALIGN;
+ for (i = 1; i < HDLC_PKTBUFSRX; i++)
+ MyRxPackets[i] = MyRxPackets[0] + i * PKT_MAXBLR_SIZE;
+
+ bdp = &rtx->rxbd[0];
+ for (i = 0; i < HDLC_PKTBUFSRX; i++) {
+ bdp->cbd_sc = BD_SC_EMPTY;
+ /* Leave space at the start for INET header. */
+ bdp->cbd_bufaddr = (unsigned int)(MyRxPackets[i] +
+ INET_HDR_ALIGN);
+ bdp++;
+ }
+ bdp--;
+ bdp->cbd_sc |= BD_SC_WRAP;
+#else
+ keymile_hdlc_enet_init_bds(rtx);
+#endif
+
+ /* Let's re-initialize the channel now. We have to do it later
+ * than the manual describes because we have just now finished
+ * the BD initialization.
+ */
+ cp->cp_cpcr = mk_cr_cmd(CPM_CR_SCC_PAGE, CPM_CR_SCC_SBLOCK,
+ 0, CPM_CR_INIT_TRX) | CPM_CR_FLG;
+ while (cp->cp_cpcr & CPM_CR_FLG);
+
+ sccp->scc_gsmrl = SCC_GSMRL_MODE_HDLC;
+ /* CTSS=1 */
+ sccp->scc_gsmrh = SCC_GSMRH_CTSS;
+ /* NOF=0, RTE=1, DRT=0, BUS=1 */
+ sccp->scc_psmr = ((0x8000 >> 6) | (0x8000 >> 10));
+
+/* loopback for local testing */
+#ifdef GJTEST
+ dprintf("LOOPBACK!\n");
+ sccp->scc_gsmrl |= SCC_GSMRL_DIAG_LOOP;
+#endif
+
+ /*
+ * Disable all interrupts and clear all pending
+ * events.
+ */
+ sccp->scc_sccm = 0;
+ sccp->scc_scce = 0xffff;
+
+ /*
+ * And last, enable the transmit and receive processing.
+ */
+ sccp->scc_gsmrl |= (SCC_GSMRL_ENR | SCC_GSMRL_ENT);
+
+ dprintf("%s: HDLC ENET Version 0.3 on SCC%d\n", dev->name,
+ MGC_SCC_HDLC + 1);
+
+ /*
+ * We may not get an ARP packet because ARP was already done on
+ * a different interface, so initialize the cached values now.
+ */
+ initCachedNumbers(1);
+
+ already_inited = 1;
+
+ return 0;
+}
+
+void keymile_hdlc_enet_halt(struct eth_device *dev)
+{
+#if 0 /* just return, but keep this for reference */
+ volatile immap_t *immr = (immap_t *) CONFIG_SYS_IMMR;
+
+ /* maybe should do a graceful stop here? */
+ immr->im_scc[MGC_SCC_HDLC].scc_gsmrl &=
+ ~(SCC_GSMRL_ENR | SCC_GSMRL_ENT);
+#endif
+}
+
+#endif /* CONFIG_MGCOGE_HDLC_ENET */
LIB = $(obj)lib$(BOARD).a
-COBJS = $(BOARD).o ../common/common.o
+COBJS = $(BOARD).o ../common/common.o ../common/keymile_hdlc_enet.o \
+ mgsuvd_hdlc_enet.o
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS))
--- /dev/null
+/*
+ * (C) Copyright 2008
+ * Gary Jennejohn, DENX Software Engineering GmbH, garyj@denx.de.
+ *
+ * Based in part on cpu/mpc8xx/scc.c.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h> /* commproc.h is included here */
+#include <malloc.h>
+#include <net.h>
+
+#ifdef CONFIG_KEYMILE_HDLC_ENET
+
+#include "../common/keymile_hdlc_enet.h"
+
+char keymile_slot; /* our slot number in the backplane */
+
+/*
+ * Since, except during initialization, ethact is always HDLC ETHERNET
+ * while we're in the driver, just use serial_printf() everywhere for
+ * output. This avoids possible conflicts when netconsole is being
+ * used.
+ */
+#define dprintf(fmt, args...) serial_printf(fmt, ##args)
+
+static int already_inited;
+
+/*
+ * SCC Ethernet Tx and Rx buffer descriptors allocated at the
+ * immr->udata_bd address on Dual-Port RAM
+ * Provide for Double Buffering
+ */
+typedef volatile struct CommonBufferDescriptor {
+ cbd_t txbd; /* Tx BD */
+ cbd_t rxbd[HDLC_PKTBUFSRX]; /* Rx BD */
+} RTXBD;
+
+static RTXBD *rtx;
+
+int keymile_hdlc_enet_init(struct eth_device *, bd_t *);
+void keymile_hdlc_enet_halt(struct eth_device *);
+extern void keymile_hdlc_enet_init_bds(RTXBD *);
+extern void initCachedNumbers(int);
+
+/* Use SCC4 */
+#define MGS_CPM_CR_HDLC CPM_CR_CH_SCC4
+#define MGS_PROFF_HDLC PROFF_SCC4
+#define MGS_SCC_HDLC 3 /* Index, not number! */
+
+int keymile_hdlc_enet_init(struct eth_device *dev, bd_t *bis)
+{
+ /* int i; */
+ /* volatile cbd_t *bdp; */
+ volatile cpm8xx_t *cp;
+ volatile scc_t *sccp;
+ volatile hdlc_pram_t *hpr;
+ volatile iop8xx_t *iop;
+
+ if (already_inited)
+ return 0;
+
+ cp = (cpm8xx_t *)&(((volatile immap_t *)CONFIG_SYS_IMMR)->im_cpm);
+ hpr = (hdlc_pram_t *)(&cp->cp_dparam[MGS_PROFF_HDLC]);
+ sccp = (volatile scc_t *)(&cp->cp_scc[MGS_SCC_HDLC]);
+ iop = (iop8xx_t *)&(((volatile immap_t *)CONFIG_SYS_IMMR)->im_ioport);
+
+ /*
+ * Disable receive and transmit just in case.
+ */
+ sccp->scc_gsmrl &= ~(SCC_GSMRL_ENR | SCC_GSMRL_ENT);
+
+#ifndef CONFIG_SYS_ALLOC_DPRAM
+#error "CONFIG_SYS_ALLOC_DPRAM must be defined"
+#else
+ /*
+ * Avoid exhausting DPRAM, which would cause a panic.
+ * Actually this isn't really necessary, but leave it here
+ * for safety's sake.
+ */
+ if (rtx == NULL) {
+ rtx = (RTXBD *) (cp->cp_dpmem +
+ dpram_alloc_align(sizeof(RTXBD), 8));
+ if (rtx == (RTXBD *)CPM_DP_NOSPACE)
+ return -1;
+ memset((void *)rtx, 0, sizeof(RTXBD));
+ }
+#endif /* !CONFIG_SYS_ALLOC_DPRAM */
+
+ /* We need the slot number for addressing. */
+ keymile_slot = *(char *)(CONFIG_SYS_SLOT_ID_BASE +
+ CONFIG_SYS_SLOT_ID_OFF) & CONFIG_SYS_SLOT_ID_MASK;
+ /*
+ * Be consistent with the Linux driver and set
+ * only enetaddr[0].
+ *
+ * Always add 1 to the slot number so that
+ * there are no problems with an ethaddr which
+ * is all 0s. This should be acceptable because
+ * a board should never have a slot number of 255,
+ * which is the broadcast address. The HDLC addressing
+ * uses only the slot number.
+ */
+ dev->enetaddr[0] = keymile_slot + 1;
+
+#ifdef TEST_IT
+ dprintf("slot %d\n", keymile_slot);
+#endif
+
+ /* use pa8, pa9 pins for TXD4, RXD4 respectively */
+ iop->iop_papar |= ((0x8000 >> 8) | (0x8000 >> 9));
+ iop->iop_padir &= ~((0x8000 >> 8) | (0x8000 >> 9));
+ iop->iop_paodr &= ~((0x8000 >> 8) | (0x8000 >> 9));
+
+ /* also use pa0 as CLK8 */
+ iop->iop_papar |= 0x8000;
+ iop->iop_padir &= ~0x8000;
+ iop->iop_paodr &= ~0x8000;
+
+ /* use pc5 as CTS4 */
+ iop->iop_pcpar &= ~(0x8000 >> 5);
+ iop->iop_pcdir &= ~(0x8000 >> 5);
+ iop->iop_pcso |= (0x8000 >> 5);
+
+ /*
+ * SI clock routing
+ * use CLK8
+ * this also connects SCC4 to NMSI
+ */
+ cp->cp_sicr = (cp->cp_sicr & ~0xff000000) | 0x3f000000;
+
+ /* keymile_rxIdx = 0; */
+
+ /*
+ * Initialize function code registers for big-endian.
+ */
+ hpr->rfcr = SCC_EB;
+ hpr->tfcr = SCC_EB;
+
+ /*
+ * Set maximum bytes per receive buffer.
+ */
+ hpr->mrblr = MAX_FRAME_LENGTH;
+
+ /* Setup CRC generator values for HDLC */
+ hpr->c_mask = 0x0000F0B8;
+ hpr->c_pres = 0x0000FFFF;
+
+ /* Initialize all error counters to 0 */
+ hpr->disfc = 0;
+ hpr->crcec = 0;
+ hpr->abtsc = 0;
+ hpr->nmarc = 0;
+ hpr->retrc = 0;
+
+ /* Set maximum frame length size */
+ hpr->mflr = MAX_FRAME_LENGTH;
+
+ /* set to 1 for per frame processing change later if needed */
+ hpr->rfthr = 1;
+
+ hpr->hmask = 0xff;
+
+ hpr->haddr2 = SET_HDLC_UUA(keymile_slot);
+ hpr->haddr3 = hpr->haddr2;
+ hpr->haddr4 = hpr->haddr2;
+ /* broadcast */
+ hpr->haddr1 = HDLC_BCAST;
+
+ hpr->rbase = (unsigned int) &rtx->rxbd[0];
+ hpr->tbase = (unsigned int) &rtx->txbd;
+
+#if 0
+ /*
+ * Initialize the buffer descriptors.
+ */
+ bdp = &rtx->txbd;
+ bdp->cbd_sc = 0;
+ bdp->cbd_bufaddr = 0;
+ bdp->cbd_sc = BD_SC_WRAP;
+
+ /*
+ * Setup RX packet buffers, aligned correctly.
+ * Borrowed from net/net.c.
+ */
+ MyRxPackets[0] = &MyPktBuf[0] + (PKTALIGN - 1);
+ MyRxPackets[0] -= (ulong)MyRxPackets[0] % PKTALIGN;
+ for (i = 1; i < HDLC_PKTBUFSRX; i++)
+ MyRxPackets[i] = MyRxPackets[0] + i * PKT_MAXBLR_SIZE;
+
+ bdp = &rtx->rxbd[0];
+ for (i = 0; i < HDLC_PKTBUFSRX; i++) {
+ bdp->cbd_sc = BD_SC_EMPTY;
+ /* Leave space at the start for INET header. */
+ bdp->cbd_bufaddr = (unsigned int)(MyRxPackets[i] +
+ INET_HDR_ALIGN);
+ bdp++;
+ }
+ bdp--;
+ bdp->cbd_sc |= BD_SC_WRAP;
+#else
+ keymile_hdlc_enet_init_bds(rtx);
+#endif
+
+ /* Let's re-initialize the channel now. We have to do it later
+ * than the manual describes because we have just now finished
+ * the BD initialization.
+ */
+ cp->cp_cpcr = mk_cr_cmd(MGS_CPM_CR_HDLC, CPM_CR_INIT_TRX) | CPM_CR_FLG;
+ while (cp->cp_cpcr & CPM_CR_FLG);
+
+ sccp->scc_gsmrl = SCC_GSMRL_MODE_HDLC;
+ /* CTSS=1 */
+ sccp->scc_gsmrh = SCC_GSMRH_CTSS;
+ /* NOF=0, RTE=1, DRT=0, BUS=1 */
+ sccp->scc_psmr = ((0x8000 >> 6) | (0x8000 >> 10));
+
+/* loopback for local testing */
+#ifdef GJTEST
+ dprintf("LOOPBACK!\n");
+ sccp->scc_gsmrl |= SCC_GSMRL_DIAG_LOOP;
+#endif
+
+ /*
+ * Disable all interrupts and clear all pending
+ * events.
+ */
+ sccp->scc_sccm = 0;
+ sccp->scc_scce = 0xffff;
+
+ /*
+ * And last, enable the transmit and receive processing.
+ */
+ sccp->scc_gsmrl |= (SCC_GSMRL_ENR | SCC_GSMRL_ENT);
+
+ dprintf("%s: HDLC ENET Version 0.3 on SCC%d\n", dev->name,
+ MGS_SCC_HDLC + 1);
+
+ /*
+ * We may not get an ARP packet because ARP was already done on
+ * a different interface, so initialize the cached values now.
+ */
+ initCachedNumbers(1);
+
+ already_inited = 1;
+
+ return 0;
+}
+
+void keymile_hdlc_enet_halt(struct eth_device *dev)
+{
+#if 0 /* just return, but keep this for reference */
+ volatile immap_t *immr = (immap_t *) CONFIG_SYS_IMMR;
+
+ /* maybe should do a graceful stop here? */
+ immr->im_cpm.cp_scc[MGS_SCC_HDLC].scc_gsmrl &=
+ ~(SCC_GSMRL_ENR | SCC_GSMRL_ENT);
+#endif
+}
+
+#endif /* CONFIG_KEYMILE_HDLC_ENET */
#ifdef CONFIG_LCD_INFO
#include <lcd.h>
#include <version.h>
+#include <timestamp.h>
void lcd_show_board_info(void)
{
char temp[32];
- lcd_printf ("%s (%s - %s)\n", U_BOOT_VERSION, __DATE__, __TIME__);
+ lcd_printf ("%s (%s - %s)\n", U_BOOT_VERSION, U_BOOT_DATE, U_BOOT_TIME);
lcd_printf ("(C) 2008 DENX Software Engineering GmbH\n");
lcd_printf (" Wolfgang DENK, wd@denx.de\n");
#ifdef CONFIG_LCD_INFO_BELOW_LOGO
lcd_printf ("MPC823 CPU at %s MHz\n",
strmhz(temp, gd->cpu_clk));
- lcd_drawchars (LCD_INFO_X, LCD_INFO_Y + VIDEO_FONT_HEIGHT * 3,
- info, strlen(info));
lcd_printf (" %ld MB RAM, %ld MB Flash\n",
gd->ram_size >> 20,
gd->bd->bi_flashsize >> 20 );
#include <mpc824x.h>
#include <netdev.h>
#include <asm/processor.h>
+#include <timestamp.h>
#include "mousse.h"
#include "m48t59y.h"
char buf[32];
puts ("Board: MOUSSE MPC8240/KAHLUA - CHRP (MAP B)\n");
- printf ("Built: %s at %s\n", __DATE__, __TIME__);
+ printf ("Built: %s at %s\n", U_BOOT_DATE, U_BOOT_TIME);
printf ("MPLD: Revision %d\n", SYS_REVID_GET ());
printf ("Local Bus: %s MHz\n", strmhz (buf, busfreq));
#include <common.h>
#include <exports.h>
+#include <timestamp.h>
#include "../drivers/net/smc91111.h"
#define SMC_BASE_ADDRESS CONFIG_SMC91111_BASE
/* Print help message */
if (argv[1][1] == 'h') {
printf("VoiceBlue EEPROM writer\n");
- printf("Built: %s at %s\n", __DATE__ , __TIME__ );
+ printf("Built: %s at %s\n", U_BOOT_DATE, U_BOOT_TIME);
printf("Usage:\n\t<mac_address> [<element_1>] [<...>]\n");
return 0;
}
#include <command.h>
#include "karef.h"
#include "karef_version.h"
+#include <timestamp.h>
#include <asm/processor.h>
#include <asm/io.h>
#include <spd_sdram.h>
"Serial Number: %d\n", sernum);
printf ("%s\n", KAREF_U_BOOT_REL_STR);
- printf ("Built %s %s by %s\n", __DATE__, __TIME__, BUILDUSER);
+ printf ("Built %s %s by %s\n", U_BOOT_DATE, U_BOOT_TIME, BUILDUSER);
if (sbcommon_get_master()) {
printf("Slot 0 - Master\nSlave board");
if (sbcommon_secondary_present())
setenv("ubrelver", KAREF_U_BOOT_REL_STR);
memset(envstr, 0, 255);
- sprintf (envstr, "Built %s %s by %s", __DATE__, __TIME__, BUILDUSER);
+ sprintf (envstr, "Built %s %s by %s",
+ U_BOOT_DATE, U_BOOT_TIME, BUILDUSER);
setenv("bldstr", envstr);
saveenv();
#include <command.h>
#include "metrobox.h"
#include "metrobox_version.h"
+#include <timestamp.h>
#include <asm/processor.h>
#include <asm/io.h>
#include <spd_sdram.h>
printf ("Board: Sandburst Corporation MetroBox Serial Number: %d\n", sernum);
printf ("%s\n", METROBOX_U_BOOT_REL_STR);
- printf ("Built %s %s by %s\n", __DATE__, __TIME__, BUILDUSER);
+ printf ("Built %s %s by %s\n", U_BOOT_DATE, U_BOOT_TIME, BUILDUSER);
if (sbcommon_get_master()) {
printf("Slot 0 - Master\nSlave board");
if (sbcommon_secondary_present())
setenv("ubrelver", METROBOX_U_BOOT_REL_STR);
memset(envstr, 0, 255);
- sprintf (envstr, "Built %s %s by %s", __DATE__, __TIME__, BUILDUSER);
+ sprintf (envstr, "Built %s %s by %s",
+ U_BOOT_DATE, U_BOOT_TIME, BUILDUSER);
setenv("bldstr", envstr);
saveenv();
#ifdef CONFIG_LCD_INFO
#include <lcd.h>
+#include <version.h>
+#include <timestamp.h>
void lcd_show_board_info(void)
{
- lcd_printf ("%s (%s - %s)\n", U_BOOT_VERSION, __DATE__, __TIME__);
+ char temp[32];
+
+ lcd_printf ("%s (%s - %s)\n", U_BOOT_VERSION, U_BOOT_DATE, U_BOOT_TIME);
lcd_printf ("(C) 2008 DENX Software Engineering GmbH\n");
lcd_printf (" Wolfgang DENK, wd@denx.de\n");
#ifdef CONFIG_LCD_INFO_BELOW_LOGO
lcd_printf ("MPC823 CPU at %s MHz\n",
strmhz(temp, gd->cpu_clk));
- lcd_drawchars (LCD_INFO_X, LCD_INFO_Y + VIDEO_FONT_HEIGHT * 3,
- info, strlen(info));
lcd_printf (" %ld MB RAM, %ld MB Flash\n",
gd->ram_size >> 20,
gd->bd->bi_flashsize >> 20 );
#include <common.h>
#include <exports.h>
+#include <timestamp.h>
#include <s3c2400.h>
#include "tsc2000.h"
#include "rs485.h"
int do_info (void)
{
printf ("Stand-alone application for TRAB board function test\n");
- printf ("Built: %s at %s\n", __DATE__ , __TIME__ );
+ printf ("Built: %s at %s\n", U_BOOT_DATE, U_BOOT_TIME);
return 0;
}
#include <common.h>
#include <exports.h>
+#include <timestamp.h>
#include "../drivers/net/smc91111.h"
#define SMC_BASE_ADDRESS CONFIG_SMC91111_BASE
/* Print help message */
if (argv[1][1] == 'h') {
printf("VoiceBlue EEPROM writer\n");
- printf("Built: %s at %s\n", __DATE__ , __TIME__ );
+ printf("Built: %s at %s\n", U_BOOT_DATE, U_BOOT_TIME);
printf("Usage:\n\t<mac_address> [<element_1>] [<...>]\n");
return 0;
}
+++ /dev/null
-/*
- * (C) Copyright 2003
- * Steven Scholz, imc Measurement & Control, steven.scholz@imc-berlin.de
- *
- * (C) Copyright 2002
- * Rich Ireland, Enterasys Networks, rireland@enterasys.com.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- *
- */
-
-#include <common.h> /* core U-Boot definitions */
-#include <ACEX1K.h> /* ACEX device family */
-
-/* Define FPGA_DEBUG to get debug printf's */
-#ifdef FPGA_DEBUG
-#define PRINTF(fmt,args...) printf (fmt ,##args)
-#else
-#define PRINTF(fmt,args...)
-#endif
-
-/* Note: The assumption is that we cannot possibly run fast enough to
- * overrun the device (the Slave Parallel mode can free run at 50MHz).
- * If there is a need to operate slower, define CONFIG_FPGA_DELAY in
- * the board config file to slow things down.
- */
-#ifndef CONFIG_FPGA_DELAY
-#define CONFIG_FPGA_DELAY()
-#endif
-
-#ifndef CONFIG_SYS_FPGA_WAIT
-#define CONFIG_SYS_FPGA_WAIT CONFIG_SYS_HZ/10 /* 100 ms */
-#endif
-
-static int ACEX1K_ps_load( Altera_desc *desc, void *buf, size_t bsize );
-static int ACEX1K_ps_dump( Altera_desc *desc, void *buf, size_t bsize );
-/* static int ACEX1K_ps_info( Altera_desc *desc ); */
-static int ACEX1K_ps_reloc( Altera_desc *desc, ulong reloc_offset );
-
-/* ------------------------------------------------------------------------- */
-/* ACEX1K Generic Implementation */
-int ACEX1K_load (Altera_desc * desc, void *buf, size_t bsize)
-{
- int ret_val = FPGA_FAIL;
-
- switch (desc->iface) {
- case passive_serial:
- PRINTF ("%s: Launching Passive Serial Loader\n", __FUNCTION__);
- ret_val = ACEX1K_ps_load (desc, buf, bsize);
- break;
-
- /* Add new interface types here */
-
- default:
- printf ("%s: Unsupported interface type, %d\n",
- __FUNCTION__, desc->iface);
- }
-
- return ret_val;
-}
-
-int ACEX1K_dump (Altera_desc * desc, void *buf, size_t bsize)
-{
- int ret_val = FPGA_FAIL;
-
- switch (desc->iface) {
- case passive_serial:
- PRINTF ("%s: Launching Passive Serial Dump\n", __FUNCTION__);
- ret_val = ACEX1K_ps_dump (desc, buf, bsize);
- break;
-
- /* Add new interface types here */
-
- default:
- printf ("%s: Unsupported interface type, %d\n",
- __FUNCTION__, desc->iface);
- }
-
- return ret_val;
-}
-
-int ACEX1K_info( Altera_desc *desc )
-{
- return FPGA_SUCCESS;
-}
-
-
-int ACEX1K_reloc (Altera_desc * desc, ulong reloc_offset)
-{
- int ret_val = FPGA_FAIL; /* assume a failure */
-
- if (desc->family != Altera_ACEX1K) {
- printf ("%s: Unsupported family type, %d\n",
- __FUNCTION__, desc->family);
- return FPGA_FAIL;
- } else
- switch (desc->iface) {
- case passive_serial:
- ret_val = ACEX1K_ps_reloc (desc, reloc_offset);
- break;
-
- /* Add new interface types here */
-
- default:
- printf ("%s: Unsupported interface type, %d\n",
- __FUNCTION__, desc->iface);
- }
-
- return ret_val;
-}
-
-
-/* ------------------------------------------------------------------------- */
-/* ACEX1K Passive Serial Generic Implementation */
-
-static int ACEX1K_ps_load (Altera_desc * desc, void *buf, size_t bsize)
-{
- int ret_val = FPGA_FAIL; /* assume the worst */
- Altera_ACEX1K_Passive_Serial_fns *fn = desc->iface_fns;
- int i;
-
- PRINTF ("%s: start with interface functions @ 0x%p\n",
- __FUNCTION__, fn);
-
- if (fn) {
- size_t bytecount = 0;
- unsigned char *data = (unsigned char *) buf;
- int cookie = desc->cookie; /* make a local copy */
- unsigned long ts; /* timestamp */
-
- PRINTF ("%s: Function Table:\n"
- "ptr:\t0x%p\n"
- "struct: 0x%p\n"
- "config:\t0x%p\n"
- "status:\t0x%p\n"
- "clk:\t0x%p\n"
- "data:\t0x%p\n"
- "done:\t0x%p\n\n",
- __FUNCTION__, &fn, fn, fn->config, fn->status,
- fn->clk, fn->data, fn->done);
-#ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK
- printf ("Loading FPGA Device %d...", cookie);
-#endif
-
- /*
- * Run the pre configuration function if there is one.
- */
- if (*fn->pre) {
- (*fn->pre) (cookie);
- }
-
- /* Establish the initial state */
- (*fn->config) (TRUE, TRUE, cookie); /* Assert nCONFIG */
-
- udelay(2); /* T_cfg > 2us */
-
- /* nSTATUS should be asserted now */
- (*fn->done) (cookie);
- if ( !(*fn->status) (cookie) ) {
- puts ("** nSTATUS is not asserted.\n");
- (*fn->abort) (cookie);
- return FPGA_FAIL;
- }
-
- (*fn->config) (FALSE, TRUE, cookie); /* Deassert nCONFIG */
- udelay(2); /* T_cf2st1 < 4us */
-
- /* Wait for nSTATUS to be released (i.e. deasserted) */
- ts = get_timer (0); /* get current time */
- do {
- CONFIG_FPGA_DELAY ();
- if (get_timer (ts) > CONFIG_SYS_FPGA_WAIT) { /* check the time */
- puts ("** Timeout waiting for STATUS to go high.\n");
- (*fn->abort) (cookie);
- return FPGA_FAIL;
- }
- (*fn->done) (cookie);
- } while ((*fn->status) (cookie));
-
- /* Get ready for the burn */
- CONFIG_FPGA_DELAY ();
-
- /* Load the data */
- while (bytecount < bsize) {
- unsigned char val=0;
-#ifdef CONFIG_SYS_FPGA_CHECK_CTRLC
- if (ctrlc ()) {
- (*fn->abort) (cookie);
- return FPGA_FAIL;
- }
-#endif
- /* Altera detects an error if INIT goes low (active)
- while DONE is low (inactive) */
-#if 0 /* not yet implemented */
- if ((*fn->done) (cookie) == 0 && (*fn->init) (cookie)) {
- puts ("** CRC error during FPGA load.\n");
- (*fn->abort) (cookie);
- return (FPGA_FAIL);
- }
-#endif
- val = data [bytecount ++ ];
- i = 8;
- do {
- /* Deassert the clock */
- (*fn->clk) (FALSE, TRUE, cookie);
- CONFIG_FPGA_DELAY ();
- /* Write data */
- (*fn->data) ( (val & 0x01), TRUE, cookie);
- CONFIG_FPGA_DELAY ();
- /* Assert the clock */
- (*fn->clk) (TRUE, TRUE, cookie);
- CONFIG_FPGA_DELAY ();
- val >>= 1;
- i --;
- } while (i > 0);
-
-#ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK
- if (bytecount % (bsize / 40) == 0)
- putc ('.'); /* let them know we are alive */
-#endif
- }
-
- CONFIG_FPGA_DELAY ();
-
-#ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK
- putc (' '); /* terminate the dotted line */
-#endif
-
- /*
- * Checking FPGA's CONF_DONE signal - correctly booted ?
- */
-
- if ( ! (*fn->done) (cookie) ) {
- puts ("** Booting failed! CONF_DONE is still deasserted.\n");
- (*fn->abort) (cookie);
- return (FPGA_FAIL);
- }
-
- /*
- * "DCLK must be clocked an additional 10 times fpr ACEX 1K..."
- */
-
- for (i = 0; i < 12; i++) {
- CONFIG_FPGA_DELAY ();
- (*fn->clk) (TRUE, TRUE, cookie); /* Assert the clock pin */
- CONFIG_FPGA_DELAY ();
- (*fn->clk) (FALSE, TRUE, cookie); /* Deassert the clock pin */
- }
-
- ret_val = FPGA_SUCCESS;
-
-#ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK
- if (ret_val == FPGA_SUCCESS) {
- puts ("Done.\n");
- }
- else {
- puts ("Fail.\n");
- }
-#endif
- (*fn->post) (cookie);
-
- } else {
- printf ("%s: NULL Interface function table!\n", __FUNCTION__);
- }
-
- return ret_val;
-}
-
-static int ACEX1K_ps_dump (Altera_desc * desc, void *buf, size_t bsize)
-{
- /* Readback is only available through the Slave Parallel and */
- /* boundary-scan interfaces. */
- printf ("%s: Passive Serial Dumping is unavailable\n",
- __FUNCTION__);
- return FPGA_FAIL;
-}
-
-static int ACEX1K_ps_reloc (Altera_desc * desc, ulong reloc_offset)
-{
- int ret_val = FPGA_FAIL; /* assume the worst */
- Altera_ACEX1K_Passive_Serial_fns *fn_r, *fn =
- (Altera_ACEX1K_Passive_Serial_fns *) (desc->iface_fns);
-
- if (fn) {
- ulong addr;
-
- /* Get the relocated table address */
- addr = (ulong) fn + reloc_offset;
- fn_r = (Altera_ACEX1K_Passive_Serial_fns *) addr;
-
- if (!fn_r->relocated) {
-
- if (memcmp (fn_r, fn,
- sizeof (Altera_ACEX1K_Passive_Serial_fns))
- == 0) {
- /* good copy of the table, fix the descriptor pointer */
- desc->iface_fns = fn_r;
- } else {
- PRINTF ("%s: Invalid function table at 0x%p\n",
- __FUNCTION__, fn_r);
- return FPGA_FAIL;
- }
-
- PRINTF ("%s: Relocating descriptor at 0x%p\n", __FUNCTION__,
- desc);
-
- addr = (ulong) (fn->pre) + reloc_offset;
- fn_r->pre = (Altera_pre_fn) addr;
-
- addr = (ulong) (fn->config) + reloc_offset;
- fn_r->config = (Altera_config_fn) addr;
-
- addr = (ulong) (fn->status) + reloc_offset;
- fn_r->status = (Altera_status_fn) addr;
-
- addr = (ulong) (fn->done) + reloc_offset;
- fn_r->done = (Altera_done_fn) addr;
-
- addr = (ulong) (fn->clk) + reloc_offset;
- fn_r->clk = (Altera_clk_fn) addr;
-
- addr = (ulong) (fn->data) + reloc_offset;
- fn_r->data = (Altera_data_fn) addr;
-
- addr = (ulong) (fn->abort) + reloc_offset;
- fn_r->abort = (Altera_abort_fn) addr;
-
- addr = (ulong) (fn->post) + reloc_offset;
- fn_r->post = (Altera_post_fn) addr;
-
- fn_r->relocated = TRUE;
-
- } else {
- /* this table has already been moved */
- /* XXX - should check to see if the descriptor is correct */
- desc->iface_fns = fn_r;
- }
-
- ret_val = FPGA_SUCCESS;
- } else {
- printf ("%s: NULL Interface function table!\n", __FUNCTION__);
- }
-
- return ret_val;
-
-}
COBJS-$(CONFIG_CMD_FDOS) += cmd_fdos.o
COBJS-$(CONFIG_CMD_FLASH) += cmd_flash.o
ifdef CONFIG_FPGA
-COBJS-y += fpga.o
COBJS-$(CONFIG_CMD_FPGA) += cmd_fpga.o
-COBJS-$(CONFIG_FPGA_SPARTAN2) += spartan2.o
-COBJS-$(CONFIG_FPGA_SPARTAN3) += spartan3.o
-COBJS-$(CONFIG_FPGA_VIRTEX2) += virtex2.o
-COBJS-$(CONFIG_FPGA_XILINX) += xilinx.o
-ifdef CONFIG_FPGA_ALTERA
-COBJS-y += altera.o
-COBJS-$(CONFIG_FPGA_ACEX1K) += ACEX1K.o
-COBJS-$(CONFIG_FPGA_CYCLON2) += cyclon2.o
-COBJS-$(CONFIG_FPGA_STRATIX_II) += stratixII.o
-endif
endif
COBJS-$(CONFIG_CMD_I2C) += cmd_i2c.o
COBJS-$(CONFIG_CMD_IDE) += cmd_ide.o
# others
COBJS-$(CONFIG_DDR_SPD) += ddr_spd.o
COBJS-$(CONFIG_CMD_DOC) += docecc.o
+COBJS-$(CONFIG_CONSOLE_MUX) += iomux.o
COBJS-y += flash.o
COBJS-y += kgdb.o
COBJS-$(CONFIG_LCD) += lcd.o
+++ /dev/null
-/*
- * (C) Copyright 2003
- * Steven Scholz, imc Measurement & Control, steven.scholz@imc-berlin.de
- *
- * (C) Copyright 2002
- * Rich Ireland, Enterasys Networks, rireland@enterasys.com.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- *
- */
-
-/*
- * Altera FPGA support
- */
-#include <common.h>
-#include <ACEX1K.h>
-#include <stratixII.h>
-
-/* Define FPGA_DEBUG to get debug printf's */
-/* #define FPGA_DEBUG */
-
-#ifdef FPGA_DEBUG
-#define PRINTF(fmt,args...) printf (fmt ,##args)
-#else
-#define PRINTF(fmt,args...)
-#endif
-
-/* Local Static Functions */
-static int altera_validate (Altera_desc * desc, const char *fn);
-
-/* ------------------------------------------------------------------------- */
-int altera_load( Altera_desc *desc, void *buf, size_t bsize )
-{
- int ret_val = FPGA_FAIL; /* assume a failure */
-
- if (!altera_validate (desc, (char *)__FUNCTION__)) {
- printf ("%s: Invalid device descriptor\n", __FUNCTION__);
- } else {
- switch (desc->family) {
- case Altera_ACEX1K:
- case Altera_CYC2:
-#if defined(CONFIG_FPGA_ACEX1K)
- PRINTF ("%s: Launching the ACEX1K Loader...\n",
- __FUNCTION__);
- ret_val = ACEX1K_load (desc, buf, bsize);
-#elif defined(CONFIG_FPGA_CYCLON2)
- PRINTF ("%s: Launching the CYCLON II Loader...\n",
- __FUNCTION__);
- ret_val = CYC2_load (desc, buf, bsize);
-#else
- printf ("%s: No support for ACEX1K devices.\n",
- __FUNCTION__);
-#endif
- break;
-
-#if defined(CONFIG_FPGA_STRATIX_II)
- case Altera_StratixII:
- PRINTF ("%s: Launching the Stratix II Loader...\n",
- __FUNCTION__);
- ret_val = StratixII_load (desc, buf, bsize);
- break;
-#endif
- default:
- printf ("%s: Unsupported family type, %d\n",
- __FUNCTION__, desc->family);
- }
- }
-
- return ret_val;
-}
-
-int altera_dump( Altera_desc *desc, void *buf, size_t bsize )
-{
- int ret_val = FPGA_FAIL; /* assume a failure */
-
- if (!altera_validate (desc, (char *)__FUNCTION__)) {
- printf ("%s: Invalid device descriptor\n", __FUNCTION__);
- } else {
- switch (desc->family) {
- case Altera_ACEX1K:
-#if defined(CONFIG_FPGA_ACEX)
- PRINTF ("%s: Launching the ACEX1K Reader...\n",
- __FUNCTION__);
- ret_val = ACEX1K_dump (desc, buf, bsize);
-#else
- printf ("%s: No support for ACEX1K devices.\n",
- __FUNCTION__);
-#endif
- break;
-
-#if defined(CONFIG_FPGA_STRATIX_II)
- case Altera_StratixII:
- PRINTF ("%s: Launching the Stratix II Reader...\n",
- __FUNCTION__);
- ret_val = StratixII_dump (desc, buf, bsize);
- break;
-#endif
- default:
- printf ("%s: Unsupported family type, %d\n",
- __FUNCTION__, desc->family);
- }
- }
-
- return ret_val;
-}
-
-int altera_info( Altera_desc *desc )
-{
- int ret_val = FPGA_FAIL;
-
- if (altera_validate (desc, (char *)__FUNCTION__)) {
- printf ("Family: \t");
- switch (desc->family) {
- case Altera_ACEX1K:
- printf ("ACEX1K\n");
- break;
- case Altera_CYC2:
- printf ("CYCLON II\n");
- break;
- case Altera_StratixII:
- printf ("Stratix II\n");
- break;
- /* Add new family types here */
- default:
- printf ("Unknown family type, %d\n", desc->family);
- }
-
- printf ("Interface type:\t");
- switch (desc->iface) {
- case passive_serial:
- printf ("Passive Serial (PS)\n");
- break;
- case passive_parallel_synchronous:
- printf ("Passive Parallel Synchronous (PPS)\n");
- break;
- case passive_parallel_asynchronous:
- printf ("Passive Parallel Asynchronous (PPA)\n");
- break;
- case passive_serial_asynchronous:
- printf ("Passive Serial Asynchronous (PSA)\n");
- break;
- case altera_jtag_mode: /* Not used */
- printf ("JTAG Mode\n");
- break;
- case fast_passive_parallel:
- printf ("Fast Passive Parallel (FPP)\n");
- break;
- case fast_passive_parallel_security:
- printf
- ("Fast Passive Parallel with Security (FPPS) \n");
- break;
- /* Add new interface types here */
- default:
- printf ("Unsupported interface type, %d\n", desc->iface);
- }
-
- printf ("Device Size: \t%d bytes\n"
- "Cookie: \t0x%x (%d)\n",
- desc->size, desc->cookie, desc->cookie);
-
- if (desc->iface_fns) {
- printf ("Device Function Table @ 0x%p\n", desc->iface_fns);
- switch (desc->family) {
- case Altera_ACEX1K:
- case Altera_CYC2:
-#if defined(CONFIG_FPGA_ACEX1K)
- ACEX1K_info (desc);
-#elif defined(CONFIG_FPGA_CYCLON2)
- CYC2_info (desc);
-#else
- /* just in case */
- printf ("%s: No support for ACEX1K devices.\n",
- __FUNCTION__);
-#endif
- break;
-#if defined(CONFIG_FPGA_STRATIX_II)
- case Altera_StratixII:
- StratixII_info (desc);
- break;
-#endif
- /* Add new family types here */
- default:
- /* we don't need a message here - we give one up above */
- break;
- }
- } else {
- printf ("No Device Function Table.\n");
- }
-
- ret_val = FPGA_SUCCESS;
- } else {
- printf ("%s: Invalid device descriptor\n", __FUNCTION__);
- }
-
- return ret_val;
-}
-
-int altera_reloc( Altera_desc *desc, ulong reloc_offset)
-{
- int ret_val = FPGA_FAIL; /* assume a failure */
-
- if (!altera_validate (desc, (char *)__FUNCTION__)) {
- printf ("%s: Invalid device descriptor\n", __FUNCTION__);
- } else {
- switch (desc->family) {
- case Altera_ACEX1K:
-#if defined(CONFIG_FPGA_ACEX1K)
- ret_val = ACEX1K_reloc (desc, reloc_offset);
-#else
- printf ("%s: No support for ACEX devices.\n",
- __FUNCTION__);
-#endif
- break;
-#if defined(CONFIG_FPGA_STRATIX_II)
- case Altera_StratixII:
- ret_val = StratixII_reloc (desc, reloc_offset);
- break;
-#endif
- case Altera_CYC2:
-#if defined(CONFIG_FPGA_CYCLON2)
- ret_val = CYC2_reloc (desc, reloc_offset);
-#else
- printf ("%s: No support for CYCLON II devices.\n",
- __FUNCTION__);
-#endif
- break;
- /* Add new family types here */
- default:
- printf ("%s: Unsupported family type, %d\n",
- __FUNCTION__, desc->family);
- }
- }
-
- return ret_val;
-}
-
-/* ------------------------------------------------------------------------- */
-
-static int altera_validate (Altera_desc * desc, const char *fn)
-{
- int ret_val = FALSE;
-
- if (desc) {
- if ((desc->family > min_altera_type) &&
- (desc->family < max_altera_type)) {
- if ((desc->iface > min_altera_iface_type) &&
- (desc->iface < max_altera_iface_type)) {
- if (desc->size) {
- ret_val = TRUE;
- } else {
- printf ("%s: NULL part size\n", fn);
- }
- } else {
- printf ("%s: Invalid Interface type, %d\n",
- fn, desc->iface);
- }
- } else {
- printf ("%s: Invalid family type, %d\n", fn, desc->family);
- }
- } else {
- printf ("%s: NULL descriptor!\n", fn);
- }
-
- return ret_val;
-}
-
-/* ------------------------------------------------------------------------- */
#include <linux/ctype.h>
#include <net.h>
#include <elf.h>
+#include <vxworks.h>
#if defined(CONFIG_WALNUT) || defined(CONFIG_SYS_VXWORKS_MAC_PTR)
DECLARE_GLOBAL_DATA_PTR;
unsigned long bootaddr; /* Address to put the bootline */
char *bootline; /* Text of the bootline */
char *tmp; /* Temporary char pointer */
+ char build_buf[128]; /* Buffer for building the bootline */
-#if defined(CONFIG_4xx) || defined(CONFIG_IOP480)
- char build_buf[80]; /* Buffer for building the bootline */
-#endif
- /* -------------------------------------------------- */
-
- /*
+ /* ---------------------------------------------------
+ *
* Check the loadaddr variable.
* If we don't know where the image is then we're done.
*/
if ((argc == 2) && (strcmp (argv[1], "tftp") == 0)) {
if (NetLoop (TFTP) <= 0)
return 1;
- printf ("Automatic boot of VxWorks image at address 0x%08lx ... \n", addr);
+ printf ("Automatic boot of VxWorks image at address 0x%08lx ... \n",
+ addr);
}
#endif
*/
if ((tmp = getenv ("bootaddr")) == NULL)
- bootaddr = 0x4200;
+ bootaddr = CONFIG_SYS_VXWORKS_BOOT_ADDR;
else
bootaddr = simple_strtoul (tmp, NULL, 16);
*/
if ((bootline = getenv ("bootargs")) != NULL) {
- memcpy ((void *) bootaddr, bootline, MAX(strlen(bootline), 255));
- flush_cache (bootaddr, MAX(strlen(bootline), 255));
+ memcpy ((void *) bootaddr, bootline,
+ max (strlen (bootline), 255));
+ flush_cache (bootaddr, max (strlen (bootline), 255));
} else {
-#if defined(CONFIG_4xx)
- sprintf (build_buf, "ibmEmac(0,0)");
- if ((tmp = getenv ("hostname")) != NULL) {
- sprintf (&build_buf[strlen (build_buf - 1)],
- "host:%s ", tmp);
+
+ sprintf (build_buf, CONFIG_SYS_VXWORKS_BOOT_DEVICE);
+ if ((tmp = getenv ("bootfile")) != NULL) {
+ sprintf (&build_buf[strlen (build_buf)],
+ "%s:%s ", CONFIG_SYS_VXWORKS_SERVERNAME, tmp);
} else {
- sprintf (&build_buf[strlen (build_buf - 1)],
- ": ");
+ sprintf (&build_buf[strlen (build_buf)],
+ "%s:file ", CONFIG_SYS_VXWORKS_SERVERNAME);
}
if ((tmp = getenv ("ipaddr")) != NULL) {
- sprintf (&build_buf[strlen (build_buf - 1)],
- "e=%s ", tmp);
+ sprintf (&build_buf[strlen (build_buf)], "e=%s ", tmp);
}
- memcpy ((void *)bootaddr, build_buf, MAX(strlen(build_buf), 255));
- flush_cache (bootaddr, MAX(strlen(build_buf), 255));
-#elif defined(CONFIG_IOP480)
- sprintf (build_buf, "dc(0,0)");
- if ((tmp = getenv ("hostname")) != NULL) {
- sprintf (&build_buf[strlen (build_buf - 1)],
- "host:%s ", tmp);
- } else {
- sprintf (&build_buf[strlen (build_buf - 1)],
- ": ");
+ if ((tmp = getenv ("serverip")) != NULL) {
+ sprintf (&build_buf[strlen (build_buf)], "h=%s ", tmp);
}
- if ((tmp = getenv ("ipaddr")) != NULL) {
- sprintf (&build_buf[strlen (build_buf - 1)],
- "e=%s ", tmp);
+ if ((tmp = getenv ("hostname")) != NULL) {
+ sprintf (&build_buf[strlen (build_buf)], "tn=%s ", tmp);
}
- memcpy ((void *) bootaddr, build_buf, MAX(strlen(build_buf), 255));
- flush_cache (bootaddr, MAX(strlen(build_buf), 255));
-#else
-
- /*
- * I'm not sure what the device should be for other
- * PPC flavors, the hostname and ipaddr should be ok
- * to just copy
- */
-
- puts ("No bootargs defined\n");
- return 1;
+#ifdef CONFIG_SYS_VXWORKS_ADD_PARAMS
+ sprintf (&build_buf[strlen (build_buf)],
+ CONFIG_SYS_VXWORKS_ADD_PARAMS);
#endif
+
+ memcpy ((void *) bootaddr, build_buf,
+ max (strlen (build_buf), 255));
+ flush_cache (bootaddr, max (strlen (build_buf), 255));
}
/*
}
if (ehdr->e_type != ET_EXEC) {
- printf ("## Not a 32-bit elf image at address 0x%08lx\n",
- addr);
+ printf ("## Not a 32-bit elf image at address 0x%08lx\n", addr);
return 0;
}
return 1;
}
-
/* ======================================================================
* A very simple elf loader, assumes the image is valid, returns the
* entry point address.
ident_cpy ((unsigned char*)dev_desc->product, iop->serial_no, sizeof(dev_desc->product));
#ifdef __LITTLE_ENDIAN
/*
- * firmware revision and model number have Big Endian Byte
- * order in Word. Convert both to little endian.
+ * firmware revision, model, and serial number have Big Endian Byte
+ * order in Word. Convert all three to little endian.
*
* See CF+ and CompactFlash Specification Revision 2.0:
- * 6.2.1.6: Identfy Drive, Table 39 for more details
+ * 6.2.1.6: Identify Drive, Table 39 for more details
*/
strswab (dev_desc->revision);
strswab (dev_desc->vendor);
+ strswab (dev_desc->product);
#endif /* __LITTLE_ENDIAN */
if ((iop->config & 0x0080)==0x0080)
*
* @return 0 on success, 1 otherwise
*/
-static int devices_init(void)
+static int jffs2_devices_init(void)
{
last_parts[0] = '\0';
current_dev = NULL;
DEBUGF("\n---parse_mtdparts---\nmtdparts = %s\n\n", p);
/* delete all devices and partitions */
- if (devices_init() != 0) {
+ if (jffs2_devices_init() != 0) {
printf("could not initialise device list\n");
return err;
}
- /* re-read 'mtdparts' variable, devices_init may be updating env */
+ /* re-read 'mtdparts' variable, jffs2_devices_init may be updating env */
p = getenv("mtdparts");
if (strncmp(p, "mtdparts=", 9) != 0) {
ids_changed = 1;
if (parse_mtdids(ids) != 0) {
- devices_init();
+ jffs2_devices_init();
return 1;
}
/* mtdparts variable was reset to NULL, delete all devices/partitions */
if (!parts && (last_parts[0] != '\0'))
- return devices_init();
+ return jffs2_devices_init();
/* do not process current partition if mtdparts variable is null */
if (!parts)
setenv("mtdparts", NULL);
- /* devices_init() calls current_save() */
- return devices_init();
+ /* jffs2_devices_init() calls current_save() */
+ return jffs2_devices_init();
}
}
return 1;
}
+#ifdef CONFIG_CONSOLE_MUX
+ i = iomux_doenv(console, argv[2]);
+ if (i)
+ return i;
+#else
/* Try assigning specified device */
if (console_assign (console, argv[2]) < 0)
return 1;
if (serial_assign (argv[2]) < 0)
return 1;
#endif
+#endif /* CONFIG_CONSOLE_MUX */
}
/*
char *addr = start_addr;
do {
- printf("%s\n", addr);
+ puts(addr);
+ puts("\n");
addr += strlen(addr) + 1;
} while (addr[0] && addr < last_addr);
return error;
}
+#if defined(CONFIG_CONSOLE_MUX)
+/** Console I/O multiplexing *******************************************/
+
+static device_t *tstcdev;
+device_t **console_devices[MAX_FILES];
+int cd_count[MAX_FILES];
+
+/*
+ * This depends on tstc() always being called before getc().
+ * This is guaranteed to be true because this routine is called
+ * only from fgetc() which assures it.
+ * No attempt is made to demultiplex multiple input sources.
+ */
+static int iomux_getc(void)
+{
+ unsigned char ret;
+
+ /* This is never called with testcdev == NULL */
+ ret = tstcdev->getc();
+ tstcdev = NULL;
+ return ret;
+}
+
+static int iomux_tstc(int file)
+{
+ int i, ret;
+ device_t *dev;
+
+ disable_ctrlc(1);
+ for (i = 0; i < cd_count[file]; i++) {
+ dev = console_devices[file][i];
+ if (dev->tstc != NULL) {
+ ret = dev->tstc();
+ if (ret > 0) {
+ tstcdev = dev;
+ disable_ctrlc(0);
+ return ret;
+ }
+ }
+ }
+ disable_ctrlc(0);
+
+ return 0;
+}
+
+static void iomux_putc(int file, const char c)
+{
+ int i;
+ device_t *dev;
+
+ for (i = 0; i < cd_count[file]; i++) {
+ dev = console_devices[file][i];
+ if (dev->putc != NULL)
+ dev->putc(c);
+ }
+}
+
+static void iomux_puts(int file, const char *s)
+{
+ int i;
+ device_t *dev;
+
+ for (i = 0; i < cd_count[file]; i++) {
+ dev = console_devices[file][i];
+ if (dev->puts != NULL)
+ dev->puts(s);
+ }
+}
+#endif /* defined(CONFIG_CONSOLE_MUX) */
+
/** U-Boot INITIAL CONSOLE-NOT COMPATIBLE FUNCTIONS *************************/
void serial_printf (const char *fmt, ...)
int fgetc (int file)
{
- if (file < MAX_FILES)
+ if (file < MAX_FILES) {
+#if defined(CONFIG_CONSOLE_MUX)
+ /*
+ * Effectively poll for input wherever it may be available.
+ */
+ for (;;) {
+ /*
+ * Upper layer may have already called tstc() so
+ * check for that first.
+ */
+ if (tstcdev != NULL)
+ return iomux_getc();
+ iomux_tstc(file);
+#ifdef CONFIG_WATCHDOG
+ /*
+ * If the watchdog must be rate-limited then it should
+ * already be handled in board-specific code.
+ */
+ udelay(1);
+#endif
+ }
+#else
return stdio_devices[file]->getc ();
+#endif
+ }
return -1;
}
int ftstc (int file)
{
if (file < MAX_FILES)
+#if defined(CONFIG_CONSOLE_MUX)
+ return iomux_tstc(file);
+#else
return stdio_devices[file]->tstc ();
+#endif
return -1;
}
void fputc (int file, const char c)
{
if (file < MAX_FILES)
+#if defined(CONFIG_CONSOLE_MUX)
+ iomux_putc(file, c);
+#else
stdio_devices[file]->putc (c);
+#endif
}
void fputs (int file, const char *s)
{
if (file < MAX_FILES)
+#if defined(CONFIG_CONSOLE_MUX)
+ iomux_puts(file, s);
+#else
stdio_devices[file]->puts (s);
+#endif
}
void fprintf (int file, const char *fmt, ...)
#ifdef CONFIG_SYS_CONSOLE_ENV_OVERWRITE
int i;
#endif /* CONFIG_SYS_CONSOLE_ENV_OVERWRITE */
+#ifdef CONFIG_CONSOLE_MUX
+ int iomux_err = 0;
+#endif
/* set default handlers at first */
gd->jt[XF_getc] = serial_getc;
inputdev = search_device (DEV_FLAGS_INPUT, stdinname);
outputdev = search_device (DEV_FLAGS_OUTPUT, stdoutname);
errdev = search_device (DEV_FLAGS_OUTPUT, stderrname);
+#ifdef CONFIG_CONSOLE_MUX
+ iomux_err = iomux_doenv(stdin, stdinname);
+ iomux_err += iomux_doenv(stdout, stdoutname);
+ iomux_err += iomux_doenv(stderr, stderrname);
+ if (!iomux_err)
+ /* Successful, so skip all the code below. */
+ goto done;
+#endif
}
/* if the devices are overwritten or not found, use default device */
if (inputdev == NULL) {
}
/* Initializes output console first */
if (outputdev != NULL) {
+#ifdef CONFIG_CONSOLE_MUX
+ /* need to set a console if not done above. */
+ iomux_doenv(stdout, outputdev->name);
+#else
console_setfile (stdout, outputdev);
+#endif
}
if (errdev != NULL) {
+#ifdef CONFIG_CONSOLE_MUX
+ /* need to set a console if not done above. */
+ iomux_doenv(stderr, errdev->name);
+#else
console_setfile (stderr, errdev);
+#endif
}
if (inputdev != NULL) {
+#ifdef CONFIG_CONSOLE_MUX
+ /* need to set a console if not done above. */
+ iomux_doenv(stdin, inputdev->name);
+#else
console_setfile (stdin, inputdev);
+#endif
}
+#ifdef CONFIG_CONSOLE_MUX
+done:
+#endif
+
gd->flags |= GD_FLG_DEVINIT; /* device initialization completed */
#ifndef CONFIG_SYS_CONSOLE_INFO_QUIET
if (stdio_devices[stdin] == NULL) {
puts ("No input devices available!\n");
} else {
+#ifdef CONFIG_CONSOLE_MUX
+ iomux_printdevs(stdin);
+#else
printf ("%s\n", stdio_devices[stdin]->name);
+#endif
}
puts ("Out: ");
if (stdio_devices[stdout] == NULL) {
puts ("No output devices available!\n");
} else {
+#ifdef CONFIG_CONSOLE_MUX
+ iomux_printdevs(stdout);
+#else
printf ("%s\n", stdio_devices[stdout]->name);
+#endif
}
puts ("Err: ");
if (stdio_devices[stderr] == NULL) {
puts ("No error devices available!\n");
} else {
+#ifdef CONFIG_CONSOLE_MUX
+ iomux_printdevs(stderr);
+#else
printf ("%s\n", stdio_devices[stderr]->name);
+#endif
}
#endif /* CONFIG_SYS_CONSOLE_INFO_QUIET */
if (outputdev != NULL) {
console_setfile (stdout, outputdev);
console_setfile (stderr, outputdev);
+#ifdef CONFIG_CONSOLE_MUX
+ console_devices[stdout][0] = outputdev;
+ console_devices[stderr][0] = outputdev;
+#endif
}
/* Initializes input console */
if (inputdev != NULL) {
console_setfile (stdin, inputdev);
+#ifdef CONFIG_CONSOLE_MUX
+ console_devices[stdin][0] = inputdev;
+#endif
}
gd->flags |= GD_FLG_DEVINIT; /* device initialization completed */
+++ /dev/null
-/*
- * (C) Copyright 2006
- * Heiko Schocher, hs@denx.de
- * Based on ACE1XK.c
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- *
- */
-
-#include <common.h> /* core U-Boot definitions */
-#include <altera.h>
-#include <ACEX1K.h> /* ACEX device family */
-
-/* Define FPGA_DEBUG to get debug printf's */
-#ifdef FPGA_DEBUG
-#define PRINTF(fmt,args...) printf (fmt ,##args)
-#else
-#define PRINTF(fmt,args...)
-#endif
-
-/* Note: The assumption is that we cannot possibly run fast enough to
- * overrun the device (the Slave Parallel mode can free run at 50MHz).
- * If there is a need to operate slower, define CONFIG_FPGA_DELAY in
- * the board config file to slow things down.
- */
-#ifndef CONFIG_FPGA_DELAY
-#define CONFIG_FPGA_DELAY()
-#endif
-
-#ifndef CONFIG_SYS_FPGA_WAIT
-#define CONFIG_SYS_FPGA_WAIT CONFIG_SYS_HZ/10 /* 100 ms */
-#endif
-
-static int CYC2_ps_load( Altera_desc *desc, void *buf, size_t bsize );
-static int CYC2_ps_dump( Altera_desc *desc, void *buf, size_t bsize );
-/* static int CYC2_ps_info( Altera_desc *desc ); */
-static int CYC2_ps_reloc( Altera_desc *desc, ulong reloc_offset );
-
-/* ------------------------------------------------------------------------- */
-/* CYCLON2 Generic Implementation */
-int CYC2_load (Altera_desc * desc, void *buf, size_t bsize)
-{
- int ret_val = FPGA_FAIL;
-
- switch (desc->iface) {
- case passive_serial:
- PRINTF ("%s: Launching Passive Serial Loader\n", __FUNCTION__);
- ret_val = CYC2_ps_load (desc, buf, bsize);
- break;
-
- /* Add new interface types here */
-
- default:
- printf ("%s: Unsupported interface type, %d\n",
- __FUNCTION__, desc->iface);
- }
-
- return ret_val;
-}
-
-int CYC2_dump (Altera_desc * desc, void *buf, size_t bsize)
-{
- int ret_val = FPGA_FAIL;
-
- switch (desc->iface) {
- case passive_serial:
- PRINTF ("%s: Launching Passive Serial Dump\n", __FUNCTION__);
- ret_val = CYC2_ps_dump (desc, buf, bsize);
- break;
-
- /* Add new interface types here */
-
- default:
- printf ("%s: Unsupported interface type, %d\n",
- __FUNCTION__, desc->iface);
- }
-
- return ret_val;
-}
-
-int CYC2_info( Altera_desc *desc )
-{
- return FPGA_SUCCESS;
-}
-
-int CYC2_reloc (Altera_desc * desc, ulong reloc_offset)
-{
- int ret_val = FPGA_FAIL; /* assume a failure */
-
- if (desc->family != Altera_CYC2) {
- printf ("%s: Unsupported family type, %d\n",
- __FUNCTION__, desc->family);
- return FPGA_FAIL;
- } else
- switch (desc->iface) {
- case passive_serial:
- ret_val = CYC2_ps_reloc (desc, reloc_offset);
- break;
-
- /* Add new interface types here */
-
- default:
- printf ("%s: Unsupported interface type, %d\n",
- __FUNCTION__, desc->iface);
- }
-
- return ret_val;
-}
-
-/* ------------------------------------------------------------------------- */
-/* CYCLON2 Passive Serial Generic Implementation */
-static int CYC2_ps_load (Altera_desc * desc, void *buf, size_t bsize)
-{
- int ret_val = FPGA_FAIL; /* assume the worst */
- Altera_CYC2_Passive_Serial_fns *fn = desc->iface_fns;
- int ret = 0;
-
- PRINTF ("%s: start with interface functions @ 0x%p\n",
- __FUNCTION__, fn);
-
- if (fn) {
- int cookie = desc->cookie; /* make a local copy */
- unsigned long ts; /* timestamp */
-
- PRINTF ("%s: Function Table:\n"
- "ptr:\t0x%p\n"
- "struct: 0x%p\n"
- "config:\t0x%p\n"
- "status:\t0x%p\n"
- "write:\t0x%p\n"
- "done:\t0x%p\n\n",
- __FUNCTION__, &fn, fn, fn->config, fn->status,
- fn->write, fn->done);
-#ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK
- printf ("Loading FPGA Device %d...", cookie);
-#endif
-
- /*
- * Run the pre configuration function if there is one.
- */
- if (*fn->pre) {
- (*fn->pre) (cookie);
- }
-
- /* Establish the initial state */
- (*fn->config) (TRUE, TRUE, cookie); /* Assert nCONFIG */
-
- udelay(2); /* T_cfg > 2us */
-
- /* Wait for nSTATUS to be asserted */
- ts = get_timer (0); /* get current time */
- do {
- CONFIG_FPGA_DELAY ();
- if (get_timer (ts) > CONFIG_SYS_FPGA_WAIT) { /* check the time */
- puts ("** Timeout waiting for STATUS to go high.\n");
- (*fn->abort) (cookie);
- return FPGA_FAIL;
- }
- } while (!(*fn->status) (cookie));
-
- /* Get ready for the burn */
- CONFIG_FPGA_DELAY ();
-
- ret = (*fn->write) (buf, bsize, TRUE, cookie);
- if (ret) {
- puts ("** Write failed.\n");
- (*fn->abort) (cookie);
- return FPGA_FAIL;
- }
-#ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK
- puts(" OK? ...");
-#endif
-
- CONFIG_FPGA_DELAY ();
-
-#ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK
- putc (' '); /* terminate the dotted line */
-#endif
-
- /*
- * Checking FPGA's CONF_DONE signal - correctly booted ?
- */
-
- if ( ! (*fn->done) (cookie) ) {
- puts ("** Booting failed! CONF_DONE is still deasserted.\n");
- (*fn->abort) (cookie);
- return (FPGA_FAIL);
- }
-#ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK
- puts(" OK\n");
-#endif
-
- ret_val = FPGA_SUCCESS;
-
-#ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK
- if (ret_val == FPGA_SUCCESS) {
- puts ("Done.\n");
- }
- else {
- puts ("Fail.\n");
- }
-#endif
- (*fn->post) (cookie);
-
- } else {
- printf ("%s: NULL Interface function table!\n", __FUNCTION__);
- }
-
- return ret_val;
-}
-
-static int CYC2_ps_dump (Altera_desc * desc, void *buf, size_t bsize)
-{
- /* Readback is only available through the Slave Parallel and */
- /* boundary-scan interfaces. */
- printf ("%s: Passive Serial Dumping is unavailable\n",
- __FUNCTION__);
- return FPGA_FAIL;
-}
-
-static int CYC2_ps_reloc (Altera_desc * desc, ulong reloc_offset)
-{
- int ret_val = FPGA_FAIL; /* assume the worst */
- Altera_CYC2_Passive_Serial_fns *fn_r, *fn =
- (Altera_CYC2_Passive_Serial_fns *) (desc->iface_fns);
-
- if (fn) {
- ulong addr;
-
- /* Get the relocated table address */
- addr = (ulong) fn + reloc_offset;
- fn_r = (Altera_CYC2_Passive_Serial_fns *) addr;
-
- if (!fn_r->relocated) {
-
- if (memcmp (fn_r, fn,
- sizeof (Altera_CYC2_Passive_Serial_fns))
- == 0) {
- /* good copy of the table, fix the descriptor pointer */
- desc->iface_fns = fn_r;
- } else {
- PRINTF ("%s: Invalid function table at 0x%p\n",
- __FUNCTION__, fn_r);
- return FPGA_FAIL;
- }
-
- PRINTF ("%s: Relocating descriptor at 0x%p\n", __FUNCTION__,
- desc);
-
- addr = (ulong) (fn->pre) + reloc_offset;
- fn_r->pre = (Altera_pre_fn) addr;
-
- addr = (ulong) (fn->config) + reloc_offset;
- fn_r->config = (Altera_config_fn) addr;
-
- addr = (ulong) (fn->status) + reloc_offset;
- fn_r->status = (Altera_status_fn) addr;
-
- addr = (ulong) (fn->done) + reloc_offset;
- fn_r->done = (Altera_done_fn) addr;
-
- addr = (ulong) (fn->write) + reloc_offset;
- fn_r->write = (Altera_write_fn) addr;
-
- addr = (ulong) (fn->abort) + reloc_offset;
- fn_r->abort = (Altera_abort_fn) addr;
-
- addr = (ulong) (fn->post) + reloc_offset;
- fn_r->post = (Altera_post_fn) addr;
-
- fn_r->relocated = TRUE;
-
- } else {
- /* this table has already been moved */
- /* XXX - should check to see if the descriptor is correct */
- desc->iface_fns = fn_r;
- }
-
- ret_val = FPGA_SUCCESS;
- } else {
- printf ("%s: NULL Interface function table!\n", __FUNCTION__);
- }
-
- return ret_val;
-}
+++ /dev/null
-/*
- * (C) Copyright 2002
- * Rich Ireland, Enterasys Networks, rireland@enterasys.com.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- *
- */
-
-/*
- * Generic FPGA support
- */
-#include <common.h> /* core U-Boot definitions */
-#include <xilinx.h> /* xilinx specific definitions */
-#include <altera.h> /* altera specific definitions */
-
-#if 0
-#define FPGA_DEBUG /* define FPGA_DEBUG to get debug messages */
-#endif
-
-/* Local definitions */
-#ifndef CONFIG_MAX_FPGA_DEVICES
-#define CONFIG_MAX_FPGA_DEVICES 5
-#endif
-
-/* Enable/Disable debug console messages */
-#ifdef FPGA_DEBUG
-#define PRINTF(fmt,args...) printf (fmt ,##args)
-#else
-#define PRINTF(fmt,args...)
-#endif
-
-/* Local static data */
-static ulong relocation_offset = 0;
-static int next_desc = FPGA_INVALID_DEVICE;
-static fpga_desc desc_table[CONFIG_MAX_FPGA_DEVICES];
-
-/* Local static functions */
-static __attribute__((__const__)) fpga_desc * __attribute__((__const__)) fpga_get_desc( int devnum );
-static __attribute__((__const__)) fpga_desc * __attribute__((__const__)) fpga_validate( int devnum, void *buf,
- size_t bsize, char *fn );
-static int fpga_dev_info( int devnum );
-
-
-/* ------------------------------------------------------------------------- */
-
-/* fpga_no_sup
- * 'no support' message function
- */
-static void fpga_no_sup( char *fn, char *msg )
-{
- if ( fn && msg ) {
- printf( "%s: No support for %s.\n", fn, msg);
- } else if ( msg ) {
- printf( "No support for %s.\n", msg);
- } else {
- printf( "No FPGA suport!\n");
- }
-}
-
-
-/* fpga_get_desc
- * map a device number to a descriptor
- */
-static __attribute__((__const__)) fpga_desc * __attribute__((__const__)) fpga_get_desc( int devnum )
-{
- fpga_desc *desc = (fpga_desc * )NULL;
-
- if (( devnum >= 0 ) && (devnum < next_desc )) {
- desc = &desc_table[devnum];
- PRINTF( "%s: found fpga descriptor #%d @ 0x%p\n",
- __FUNCTION__, devnum, desc );
- }
-
- return desc;
-}
-
-
-/* fpga_validate
- * generic parameter checking code
- */
-static __attribute__((__const__)) fpga_desc * __attribute__((__const__)) fpga_validate( int devnum, void *buf,
- size_t bsize, char *fn )
-{
- fpga_desc * desc = fpga_get_desc( devnum );
-
- if ( !desc ) {
- printf( "%s: Invalid device number %d\n", fn, devnum );
- }
-
- if ( !buf ) {
- printf( "%s: Null buffer.\n", fn );
- return (fpga_desc * const)NULL;
- }
- return desc;
-}
-
-
-/* fpga_dev_info
- * generic multiplexing code
- */
-static int fpga_dev_info( int devnum )
-{
- int ret_val = FPGA_FAIL; /* assume failure */
- const fpga_desc * const desc = fpga_get_desc( devnum );
-
- if ( desc ) {
- PRINTF( "%s: Device Descriptor @ 0x%p\n",
- __FUNCTION__, desc->devdesc );
-
- switch ( desc->devtype ) {
- case fpga_xilinx:
-#if defined(CONFIG_FPGA_XILINX)
- printf( "Xilinx Device\nDescriptor @ 0x%p\n", desc );
- ret_val = xilinx_info( desc->devdesc );
-#else
- fpga_no_sup( (char *)__FUNCTION__, "Xilinx devices" );
-#endif
- break;
- case fpga_altera:
-#if defined(CONFIG_FPGA_ALTERA)
- printf( "Altera Device\nDescriptor @ 0x%p\n", desc );
- ret_val = altera_info( desc->devdesc );
-#else
- fpga_no_sup( (char *)__FUNCTION__, "Altera devices" );
-#endif
- break;
- default:
- printf( "%s: Invalid or unsupported device type %d\n",
- __FUNCTION__, desc->devtype );
- }
- } else {
- printf( "%s: Invalid device number %d\n",
- __FUNCTION__, devnum );
- }
-
- return ret_val;
-}
-
-
-/* fpga_reloc
- * generic multiplexing code
- */
-int fpga_reloc( fpga_type devtype, void *desc, ulong reloc_off )
-{
- int ret_val = FPGA_FAIL;
-
- PRINTF( "%s: Relocating Device of type %d @ 0x%p with offset %lx\n",
- __FUNCTION__, devtype, desc, reloc_off );
-
- switch ( devtype ) {
- case fpga_xilinx:
-#if defined(CONFIG_FPGA_XILINX)
- ret_val = xilinx_reloc( desc, reloc_off );
-#else
- fpga_no_sup( (char *)__FUNCTION__, "Xilinx devices" );
-#endif
- break;
- case fpga_altera:
-#if defined(CONFIG_FPGA_ALTERA)
- ret_val = altera_reloc( desc, reloc_off );
-#else
- fpga_no_sup( (char *)__FUNCTION__, "Altera devices" );
-#endif
- break;
- default:
- printf( "%s: Invalid or unsupported device type %d\n",
- __FUNCTION__, devtype );
- }
-
- return ret_val;
-}
-
-/* ------------------------------------------------------------------------- */
-/* fgpa_init is usually called from misc_init_r() and MUST be called
- * before any of the other fpga functions are used.
- */
-void fpga_init( ulong reloc_off )
-{
- relocation_offset = reloc_off;
- next_desc = 0;
- memset( desc_table, 0, sizeof(desc_table));
-
- PRINTF( "%s: CONFIG_FPGA = 0x%x\n", __FUNCTION__, CONFIG_FPGA );
-}
-
-/* fpga_count
- * Basic interface function to get the current number of devices available.
- */
-int fpga_count( void )
-{
- return next_desc;
-}
-
-/* fpga_add
- * Attempts to relocate the device/board specific interface code
- * to the proper RAM locations and adds the device descriptor to
- * the device table.
- */
-int fpga_add( fpga_type devtype, void *desc )
-{
- int devnum = FPGA_INVALID_DEVICE;
-
- if ( next_desc < 0 ) {
- printf( "%s: FPGA support not initialized!\n", __FUNCTION__ );
- } else if (( devtype > fpga_min_type ) && ( devtype < fpga_undefined )) {
- if ( desc ) {
- if ( next_desc < CONFIG_MAX_FPGA_DEVICES ) {
- if ( fpga_reloc( devtype, desc, relocation_offset )
- == FPGA_SUCCESS ) {
- devnum = next_desc;
- desc_table[next_desc].devtype = devtype;
- desc_table[next_desc++].devdesc = desc;
- } else {
- printf( "%s: Unable to relocate device interface table!\n",
- __FUNCTION__ );
- }
- } else {
- printf( "%s: Exceeded Max FPGA device count\n", __FUNCTION__ );
- }
- } else {
- printf( "%s: NULL device descriptor\n", __FUNCTION__ );
- }
- } else {
- printf( "%s: Unsupported FPGA type %d\n", __FUNCTION__, devtype );
- }
-
- return devnum;
-}
-
-/*
- * Generic multiplexing code
- */
-int fpga_load( int devnum, void *buf, size_t bsize )
-{
- int ret_val = FPGA_FAIL; /* assume failure */
- fpga_desc * desc = fpga_validate( devnum, buf, bsize, (char *)__FUNCTION__ );
-
- if ( desc ) {
- switch ( desc->devtype ) {
- case fpga_xilinx:
-#if defined(CONFIG_FPGA_XILINX)
- ret_val = xilinx_load( desc->devdesc, buf, bsize );
-#else
- fpga_no_sup( (char *)__FUNCTION__, "Xilinx devices" );
-#endif
- break;
- case fpga_altera:
-#if defined(CONFIG_FPGA_ALTERA)
- ret_val = altera_load( desc->devdesc, buf, bsize );
-#else
- fpga_no_sup( (char *)__FUNCTION__, "Altera devices" );
-#endif
- break;
- default:
- printf( "%s: Invalid or unsupported device type %d\n",
- __FUNCTION__, desc->devtype );
- }
- }
-
- return ret_val;
-}
-
-/* fpga_dump
- * generic multiplexing code
- */
-int fpga_dump( int devnum, void *buf, size_t bsize )
-{
- int ret_val = FPGA_FAIL; /* assume failure */
- fpga_desc * desc = fpga_validate( devnum, buf, bsize, (char *)__FUNCTION__ );
-
- if ( desc ) {
- switch ( desc->devtype ) {
- case fpga_xilinx:
-#if defined(CONFIG_FPGA_XILINX)
- ret_val = xilinx_dump( desc->devdesc, buf, bsize );
-#else
- fpga_no_sup( (char *)__FUNCTION__, "Xilinx devices" );
-#endif
- break;
- case fpga_altera:
-#if defined(CONFIG_FPGA_ALTERA)
- ret_val = altera_dump( desc->devdesc, buf, bsize );
-#else
- fpga_no_sup( (char *)__FUNCTION__, "Altera devices" );
-#endif
- break;
- default:
- printf( "%s: Invalid or unsupported device type %d\n",
- __FUNCTION__, desc->devtype );
- }
- }
-
- return ret_val;
-}
-
-
-/* fpga_info
- * front end to fpga_dev_info. If devnum is invalid, report on all
- * available devices.
- */
-int fpga_info( int devnum )
-{
- if ( devnum == FPGA_INVALID_DEVICE ) {
- if ( next_desc > 0 ) {
- int dev;
-
- for ( dev = 0; dev < next_desc; dev++ ) {
- fpga_dev_info( dev );
- }
- return FPGA_SUCCESS;
- } else {
- printf( "%s: No FPGA devices available.\n", __FUNCTION__ );
- return FPGA_FAIL;
- }
- }
- else return fpga_dev_info( devnum );
-}
-
-/* ------------------------------------------------------------------------- */
--- /dev/null
+/*
+ * (C) Copyright 2008
+ * Gary Jennejohn, DENX Software Engineering GmbH, garyj@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <serial.h>
+#include <malloc.h>
+
+#ifdef CONFIG_CONSOLE_MUX
+void iomux_printdevs(const int console)
+{
+ int i;
+ device_t *dev;
+
+ for (i = 0; i < cd_count[console]; i++) {
+ dev = console_devices[console][i];
+ printf("%s ", dev->name);
+ }
+ printf("\n");
+}
+
+/* This tries to preserve the old list if an error occurs. */
+int iomux_doenv(const int console, const char *arg)
+{
+ char *console_args, *temp, **start;
+ int i, j, k, io_flag, cs_idx, repeat;
+ device_t *dev;
+ device_t **cons_set;
+
+ console_args = strdup(arg);
+ if (console_args == NULL)
+ return 1;
+ /*
+ * Check whether a comma separated list of devices was
+ * entered and count how many devices were entered.
+ * The array start[] has pointers to the beginning of
+ * each device name (up to MAX_CONSARGS devices).
+ *
+ * Have to do this twice - once to count the number of
+ * commas and then again to populate start.
+ */
+ i = 0;
+ temp = console_args;
+ for (;;) {
+ temp = strchr(temp, ',');
+ if (temp != NULL) {
+ i++;
+ temp++;
+ continue;
+ }
+ /* There's always one entry more than the number of commas. */
+ i++;
+ break;
+ }
+ start = (char **)malloc(i * sizeof(char *));
+ if (start == NULL) {
+ free(console_args);
+ return 1;
+ }
+ i = 0;
+ start[0] = console_args;
+ for (;;) {
+ temp = strchr(start[i++], ',');
+ if (temp == NULL)
+ break;
+ *temp = '\0';
+ start[i] = temp + 1;
+ }
+ cons_set = (device_t **)calloc(i, sizeof(device_t *));
+ if (cons_set == NULL) {
+ free(start);
+ free(console_args);
+ return 1;
+ }
+
+ switch (console) {
+ case stdin:
+ io_flag = DEV_FLAGS_INPUT;
+ break;
+ case stdout:
+ case stderr:
+ io_flag = DEV_FLAGS_OUTPUT;
+ break;
+ default:
+ free(start);
+ free(console_args);
+ free(cons_set);
+ return 1;
+ }
+
+ cs_idx = 0;
+ for (j = 0; j < i; j++) {
+ /*
+ * Check whether the device exists and is valid.
+ * console_assign() also calls search_device(),
+ * but I need the pointer to the device.
+ */
+ dev = search_device(io_flag, start[j]);
+ if (dev == NULL)
+ continue;
+ /*
+ * Prevent multiple entries for a device.
+ */
+ repeat = 0;
+ for (k = 0; k < cs_idx; k++) {
+ if (dev == cons_set[k]) {
+ repeat++;
+ break;
+ }
+ }
+ if (repeat)
+ continue;
+ /*
+ * Try assigning the specified device.
+ * This could screw up the console settings for apps.
+ */
+ if (console_assign(console, start[j]) < 0)
+ continue;
+#ifdef CONFIG_SERIAL_MULTI
+ /*
+ * This was taken from common/cmd_nvedit.c.
+ * This will never work because serial_assign() returns
+ * 1 upon error, not -1.
+ * This would almost always return an error anyway because
+ * serial_assign() expects the name of a serial device, like
+ * serial_smc, but the user generally only wants to set serial.
+ */
+ if (serial_assign(start[j]) < 0)
+ continue;
+#endif
+ cons_set[cs_idx++] = dev;
+ }
+ free(console_args);
+ free(start);
+ /* failed to set any console */
+ if (cs_idx == 0) {
+ free(cons_set);
+ return 1;
+ } else {
+ /* Works even if console_devices[console] is NULL. */
+ console_devices[console] =
+ (device_t **)realloc(console_devices[console],
+ cs_idx * sizeof(device_t *));
+ if (console_devices[console] == NULL) {
+ free(cons_set);
+ return 1;
+ }
+ memcpy(console_devices[console], cons_set, cs_idx *
+ sizeof(device_t *));
+
+ cd_count[console] = cs_idx;
+ }
+ free(cons_set);
+ return 0;
+}
+#endif /* CONFIG_CONSOLE_MUX */
#include <config.h>
#include <common.h>
#include <command.h>
-#include <version.h>
#include <stdarg.h>
#include <linux/types.h>
#include <devices.h>
+++ /dev/null
-/*
- * (C) Copyright 2002
- * Rich Ireland, Enterasys Networks, rireland@enterasys.com.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- *
- */
-
-#include <common.h> /* core U-Boot definitions */
-#include <spartan2.h> /* Spartan-II device family */
-
-/* Define FPGA_DEBUG to get debug printf's */
-#ifdef FPGA_DEBUG
-#define PRINTF(fmt,args...) printf (fmt ,##args)
-#else
-#define PRINTF(fmt,args...)
-#endif
-
-#undef CONFIG_SYS_FPGA_CHECK_BUSY
-#undef CONFIG_SYS_FPGA_PROG_FEEDBACK
-
-/* Note: The assumption is that we cannot possibly run fast enough to
- * overrun the device (the Slave Parallel mode can free run at 50MHz).
- * If there is a need to operate slower, define CONFIG_FPGA_DELAY in
- * the board config file to slow things down.
- */
-#ifndef CONFIG_FPGA_DELAY
-#define CONFIG_FPGA_DELAY()
-#endif
-
-#ifndef CONFIG_SYS_FPGA_WAIT
-#define CONFIG_SYS_FPGA_WAIT CONFIG_SYS_HZ/100 /* 10 ms */
-#endif
-
-static int Spartan2_sp_load( Xilinx_desc *desc, void *buf, size_t bsize );
-static int Spartan2_sp_dump( Xilinx_desc *desc, void *buf, size_t bsize );
-/* static int Spartan2_sp_info( Xilinx_desc *desc ); */
-static int Spartan2_sp_reloc( Xilinx_desc *desc, ulong reloc_offset );
-
-static int Spartan2_ss_load( Xilinx_desc *desc, void *buf, size_t bsize );
-static int Spartan2_ss_dump( Xilinx_desc *desc, void *buf, size_t bsize );
-/* static int Spartan2_ss_info( Xilinx_desc *desc ); */
-static int Spartan2_ss_reloc( Xilinx_desc *desc, ulong reloc_offset );
-
-/* ------------------------------------------------------------------------- */
-/* Spartan-II Generic Implementation */
-int Spartan2_load (Xilinx_desc * desc, void *buf, size_t bsize)
-{
- int ret_val = FPGA_FAIL;
-
- switch (desc->iface) {
- case slave_serial:
- PRINTF ("%s: Launching Slave Serial Load\n", __FUNCTION__);
- ret_val = Spartan2_ss_load (desc, buf, bsize);
- break;
-
- case slave_parallel:
- PRINTF ("%s: Launching Slave Parallel Load\n", __FUNCTION__);
- ret_val = Spartan2_sp_load (desc, buf, bsize);
- break;
-
- default:
- printf ("%s: Unsupported interface type, %d\n",
- __FUNCTION__, desc->iface);
- }
-
- return ret_val;
-}
-
-int Spartan2_dump (Xilinx_desc * desc, void *buf, size_t bsize)
-{
- int ret_val = FPGA_FAIL;
-
- switch (desc->iface) {
- case slave_serial:
- PRINTF ("%s: Launching Slave Serial Dump\n", __FUNCTION__);
- ret_val = Spartan2_ss_dump (desc, buf, bsize);
- break;
-
- case slave_parallel:
- PRINTF ("%s: Launching Slave Parallel Dump\n", __FUNCTION__);
- ret_val = Spartan2_sp_dump (desc, buf, bsize);
- break;
-
- default:
- printf ("%s: Unsupported interface type, %d\n",
- __FUNCTION__, desc->iface);
- }
-
- return ret_val;
-}
-
-int Spartan2_info( Xilinx_desc *desc )
-{
- return FPGA_SUCCESS;
-}
-
-
-int Spartan2_reloc (Xilinx_desc * desc, ulong reloc_offset)
-{
- int ret_val = FPGA_FAIL; /* assume a failure */
-
- if (desc->family != Xilinx_Spartan2) {
- printf ("%s: Unsupported family type, %d\n",
- __FUNCTION__, desc->family);
- return FPGA_FAIL;
- } else
- switch (desc->iface) {
- case slave_serial:
- ret_val = Spartan2_ss_reloc (desc, reloc_offset);
- break;
-
- case slave_parallel:
- ret_val = Spartan2_sp_reloc (desc, reloc_offset);
- break;
-
- default:
- printf ("%s: Unsupported interface type, %d\n",
- __FUNCTION__, desc->iface);
- }
-
- return ret_val;
-}
-
-
-/* ------------------------------------------------------------------------- */
-/* Spartan-II Slave Parallel Generic Implementation */
-
-static int Spartan2_sp_load (Xilinx_desc * desc, void *buf, size_t bsize)
-{
- int ret_val = FPGA_FAIL; /* assume the worst */
- Xilinx_Spartan2_Slave_Parallel_fns *fn = desc->iface_fns;
-
- PRINTF ("%s: start with interface functions @ 0x%p\n",
- __FUNCTION__, fn);
-
- if (fn) {
- size_t bytecount = 0;
- unsigned char *data = (unsigned char *) buf;
- int cookie = desc->cookie; /* make a local copy */
- unsigned long ts; /* timestamp */
-
- PRINTF ("%s: Function Table:\n"
- "ptr:\t0x%p\n"
- "struct: 0x%p\n"
- "pre: 0x%p\n"
- "pgm:\t0x%p\n"
- "init:\t0x%p\n"
- "err:\t0x%p\n"
- "clk:\t0x%p\n"
- "cs:\t0x%p\n"
- "wr:\t0x%p\n"
- "read data:\t0x%p\n"
- "write data:\t0x%p\n"
- "busy:\t0x%p\n"
- "abort:\t0x%p\n",
- "post:\t0x%p\n\n",
- __FUNCTION__, &fn, fn, fn->pre, fn->pgm, fn->init, fn->err,
- fn->clk, fn->cs, fn->wr, fn->rdata, fn->wdata, fn->busy,
- fn->abort, fn->post);
-
- /*
- * This code is designed to emulate the "Express Style"
- * Continuous Data Loading in Slave Parallel Mode for
- * the Spartan-II Family.
- */
-#ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK
- printf ("Loading FPGA Device %d...\n", cookie);
-#endif
- /*
- * Run the pre configuration function if there is one.
- */
- if (*fn->pre) {
- (*fn->pre) (cookie);
- }
-
- /* Establish the initial state */
- (*fn->pgm) (TRUE, TRUE, cookie); /* Assert the program, commit */
-
- /* Get ready for the burn */
- CONFIG_FPGA_DELAY ();
- (*fn->pgm) (FALSE, TRUE, cookie); /* Deassert the program, commit */
-
- ts = get_timer (0); /* get current time */
- /* Now wait for INIT and BUSY to go high */
- do {
- CONFIG_FPGA_DELAY ();
- if (get_timer (ts) > CONFIG_SYS_FPGA_WAIT) { /* check the time */
- puts ("** Timeout waiting for INIT to clear.\n");
- (*fn->abort) (cookie); /* abort the burn */
- return FPGA_FAIL;
- }
- } while ((*fn->init) (cookie) && (*fn->busy) (cookie));
-
- (*fn->wr) (TRUE, TRUE, cookie); /* Assert write, commit */
- (*fn->cs) (TRUE, TRUE, cookie); /* Assert chip select, commit */
- (*fn->clk) (TRUE, TRUE, cookie); /* Assert the clock pin */
-
- /* Load the data */
- while (bytecount < bsize) {
- /* XXX - do we check for an Ctrl-C press in here ??? */
- /* XXX - Check the error bit? */
-
- (*fn->wdata) (data[bytecount++], TRUE, cookie); /* write the data */
- CONFIG_FPGA_DELAY ();
- (*fn->clk) (FALSE, TRUE, cookie); /* Deassert the clock pin */
- CONFIG_FPGA_DELAY ();
- (*fn->clk) (TRUE, TRUE, cookie); /* Assert the clock pin */
-
-#ifdef CONFIG_SYS_FPGA_CHECK_BUSY
- ts = get_timer (0); /* get current time */
- while ((*fn->busy) (cookie)) {
- /* XXX - we should have a check in here somewhere to
- * make sure we aren't busy forever... */
-
- CONFIG_FPGA_DELAY ();
- (*fn->clk) (FALSE, TRUE, cookie); /* Deassert the clock pin */
- CONFIG_FPGA_DELAY ();
- (*fn->clk) (TRUE, TRUE, cookie); /* Assert the clock pin */
-
- if (get_timer (ts) > CONFIG_SYS_FPGA_WAIT) { /* check the time */
- puts ("** Timeout waiting for BUSY to clear.\n");
- (*fn->abort) (cookie); /* abort the burn */
- return FPGA_FAIL;
- }
- }
-#endif
-
-#ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK
- if (bytecount % (bsize / 40) == 0)
- putc ('.'); /* let them know we are alive */
-#endif
- }
-
- CONFIG_FPGA_DELAY ();
- (*fn->cs) (FALSE, TRUE, cookie); /* Deassert the chip select */
- (*fn->wr) (FALSE, TRUE, cookie); /* Deassert the write pin */
-
-#ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK
- putc ('\n'); /* terminate the dotted line */
-#endif
-
- /* now check for done signal */
- ts = get_timer (0); /* get current time */
- ret_val = FPGA_SUCCESS;
- while ((*fn->done) (cookie) == FPGA_FAIL) {
- /* XXX - we should have a check in here somewhere to
- * make sure we aren't busy forever... */
-
- CONFIG_FPGA_DELAY ();
- (*fn->clk) (FALSE, TRUE, cookie); /* Deassert the clock pin */
- CONFIG_FPGA_DELAY ();
- (*fn->clk) (TRUE, TRUE, cookie); /* Assert the clock pin */
-
- if (get_timer (ts) > CONFIG_SYS_FPGA_WAIT) { /* check the time */
- puts ("** Timeout waiting for DONE to clear.\n");
- (*fn->abort) (cookie); /* abort the burn */
- ret_val = FPGA_FAIL;
- break;
- }
- }
-
- if (ret_val == FPGA_SUCCESS) {
-#ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK
- puts ("Done.\n");
-#endif
- }
- /*
- * Run the post configuration function if there is one.
- */
- if (*fn->post) {
- (*fn->post) (cookie);
- }
-
- else {
-#ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK
- puts ("Fail.\n");
-#endif
- }
-
- } else {
- printf ("%s: NULL Interface function table!\n", __FUNCTION__);
- }
-
- return ret_val;
-}
-
-static int Spartan2_sp_dump (Xilinx_desc * desc, void *buf, size_t bsize)
-{
- int ret_val = FPGA_FAIL; /* assume the worst */
- Xilinx_Spartan2_Slave_Parallel_fns *fn = desc->iface_fns;
-
- if (fn) {
- unsigned char *data = (unsigned char *) buf;
- size_t bytecount = 0;
- int cookie = desc->cookie; /* make a local copy */
-
- printf ("Starting Dump of FPGA Device %d...\n", cookie);
-
- (*fn->cs) (TRUE, TRUE, cookie); /* Assert chip select, commit */
- (*fn->clk) (TRUE, TRUE, cookie); /* Assert the clock pin */
-
- /* dump the data */
- while (bytecount < bsize) {
- /* XXX - do we check for an Ctrl-C press in here ??? */
-
- (*fn->clk) (FALSE, TRUE, cookie); /* Deassert the clock pin */
- (*fn->clk) (TRUE, TRUE, cookie); /* Assert the clock pin */
- (*fn->rdata) (&(data[bytecount++]), cookie); /* read the data */
-#ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK
- if (bytecount % (bsize / 40) == 0)
- putc ('.'); /* let them know we are alive */
-#endif
- }
-
- (*fn->cs) (FALSE, FALSE, cookie); /* Deassert the chip select */
- (*fn->clk) (FALSE, TRUE, cookie); /* Deassert the clock pin */
- (*fn->clk) (TRUE, TRUE, cookie); /* Assert the clock pin */
-
-#ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK
- putc ('\n'); /* terminate the dotted line */
-#endif
- puts ("Done.\n");
-
- /* XXX - checksum the data? */
- } else {
- printf ("%s: NULL Interface function table!\n", __FUNCTION__);
- }
-
- return ret_val;
-}
-
-
-static int Spartan2_sp_reloc (Xilinx_desc * desc, ulong reloc_offset)
-{
- int ret_val = FPGA_FAIL; /* assume the worst */
- Xilinx_Spartan2_Slave_Parallel_fns *fn_r, *fn =
- (Xilinx_Spartan2_Slave_Parallel_fns *) (desc->iface_fns);
-
- if (fn) {
- ulong addr;
-
- /* Get the relocated table address */
- addr = (ulong) fn + reloc_offset;
- fn_r = (Xilinx_Spartan2_Slave_Parallel_fns *) addr;
-
- if (!fn_r->relocated) {
-
- if (memcmp (fn_r, fn,
- sizeof (Xilinx_Spartan2_Slave_Parallel_fns))
- == 0) {
- /* good copy of the table, fix the descriptor pointer */
- desc->iface_fns = fn_r;
- } else {
- PRINTF ("%s: Invalid function table at 0x%p\n",
- __FUNCTION__, fn_r);
- return FPGA_FAIL;
- }
-
- PRINTF ("%s: Relocating descriptor at 0x%p\n", __FUNCTION__,
- desc);
-
- addr = (ulong) (fn->pre) + reloc_offset;
- fn_r->pre = (Xilinx_pre_fn) addr;
-
- addr = (ulong) (fn->pgm) + reloc_offset;
- fn_r->pgm = (Xilinx_pgm_fn) addr;
-
- addr = (ulong) (fn->init) + reloc_offset;
- fn_r->init = (Xilinx_init_fn) addr;
-
- addr = (ulong) (fn->done) + reloc_offset;
- fn_r->done = (Xilinx_done_fn) addr;
-
- addr = (ulong) (fn->clk) + reloc_offset;
- fn_r->clk = (Xilinx_clk_fn) addr;
-
- addr = (ulong) (fn->err) + reloc_offset;
- fn_r->err = (Xilinx_err_fn) addr;
-
- addr = (ulong) (fn->cs) + reloc_offset;
- fn_r->cs = (Xilinx_cs_fn) addr;
-
- addr = (ulong) (fn->wr) + reloc_offset;
- fn_r->wr = (Xilinx_wr_fn) addr;
-
- addr = (ulong) (fn->rdata) + reloc_offset;
- fn_r->rdata = (Xilinx_rdata_fn) addr;
-
- addr = (ulong) (fn->wdata) + reloc_offset;
- fn_r->wdata = (Xilinx_wdata_fn) addr;
-
- addr = (ulong) (fn->busy) + reloc_offset;
- fn_r->busy = (Xilinx_busy_fn) addr;
-
- addr = (ulong) (fn->abort) + reloc_offset;
- fn_r->abort = (Xilinx_abort_fn) addr;
-
- addr = (ulong) (fn->post) + reloc_offset;
- fn_r->post = (Xilinx_post_fn) addr;
-
- fn_r->relocated = TRUE;
-
- } else {
- /* this table has already been moved */
- /* XXX - should check to see if the descriptor is correct */
- desc->iface_fns = fn_r;
- }
-
- ret_val = FPGA_SUCCESS;
- } else {
- printf ("%s: NULL Interface function table!\n", __FUNCTION__);
- }
-
- return ret_val;
-
-}
-
-/* ------------------------------------------------------------------------- */
-
-static int Spartan2_ss_load (Xilinx_desc * desc, void *buf, size_t bsize)
-{
- int ret_val = FPGA_FAIL; /* assume the worst */
- Xilinx_Spartan2_Slave_Serial_fns *fn = desc->iface_fns;
- int i;
- unsigned char val;
-
- PRINTF ("%s: start with interface functions @ 0x%p\n",
- __FUNCTION__, fn);
-
- if (fn) {
- size_t bytecount = 0;
- unsigned char *data = (unsigned char *) buf;
- int cookie = desc->cookie; /* make a local copy */
- unsigned long ts; /* timestamp */
-
- PRINTF ("%s: Function Table:\n"
- "ptr:\t0x%p\n"
- "struct: 0x%p\n"
- "pgm:\t0x%p\n"
- "init:\t0x%p\n"
- "clk:\t0x%p\n"
- "wr:\t0x%p\n"
- "done:\t0x%p\n\n",
- __FUNCTION__, &fn, fn, fn->pgm, fn->init,
- fn->clk, fn->wr, fn->done);
-#ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK
- printf ("Loading FPGA Device %d...\n", cookie);
-#endif
-
- /*
- * Run the pre configuration function if there is one.
- */
- if (*fn->pre) {
- (*fn->pre) (cookie);
- }
-
- /* Establish the initial state */
- (*fn->pgm) (TRUE, TRUE, cookie); /* Assert the program, commit */
-
- /* Wait for INIT state (init low) */
- ts = get_timer (0); /* get current time */
- do {
- CONFIG_FPGA_DELAY ();
- if (get_timer (ts) > CONFIG_SYS_FPGA_WAIT) { /* check the time */
- puts ("** Timeout waiting for INIT to start.\n");
- return FPGA_FAIL;
- }
- } while (!(*fn->init) (cookie));
-
- /* Get ready for the burn */
- CONFIG_FPGA_DELAY ();
- (*fn->pgm) (FALSE, TRUE, cookie); /* Deassert the program, commit */
-
- ts = get_timer (0); /* get current time */
- /* Now wait for INIT to go high */
- do {
- CONFIG_FPGA_DELAY ();
- if (get_timer (ts) > CONFIG_SYS_FPGA_WAIT) { /* check the time */
- puts ("** Timeout waiting for INIT to clear.\n");
- return FPGA_FAIL;
- }
- } while ((*fn->init) (cookie));
-
- /* Load the data */
- while (bytecount < bsize) {
-
- /* Xilinx detects an error if INIT goes low (active)
- while DONE is low (inactive) */
- if ((*fn->done) (cookie) == 0 && (*fn->init) (cookie)) {
- puts ("** CRC error during FPGA load.\n");
- return (FPGA_FAIL);
- }
- val = data [bytecount ++];
- i = 8;
- do {
- /* Deassert the clock */
- (*fn->clk) (FALSE, TRUE, cookie);
- CONFIG_FPGA_DELAY ();
- /* Write data */
- (*fn->wr) ((val & 0x80), TRUE, cookie);
- CONFIG_FPGA_DELAY ();
- /* Assert the clock */
- (*fn->clk) (TRUE, TRUE, cookie);
- CONFIG_FPGA_DELAY ();
- val <<= 1;
- i --;
- } while (i > 0);
-
-#ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK
- if (bytecount % (bsize / 40) == 0)
- putc ('.'); /* let them know we are alive */
-#endif
- }
-
- CONFIG_FPGA_DELAY ();
-
-#ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK
- putc ('\n'); /* terminate the dotted line */
-#endif
-
- /* now check for done signal */
- ts = get_timer (0); /* get current time */
- ret_val = FPGA_SUCCESS;
- (*fn->wr) (TRUE, TRUE, cookie);
-
- while (! (*fn->done) (cookie)) {
- /* XXX - we should have a check in here somewhere to
- * make sure we aren't busy forever... */
-
- CONFIG_FPGA_DELAY ();
- (*fn->clk) (FALSE, TRUE, cookie); /* Deassert the clock pin */
- CONFIG_FPGA_DELAY ();
- (*fn->clk) (TRUE, TRUE, cookie); /* Assert the clock pin */
-
- putc ('*');
-
- if (get_timer (ts) > CONFIG_SYS_FPGA_WAIT) { /* check the time */
- puts ("** Timeout waiting for DONE to clear.\n");
- ret_val = FPGA_FAIL;
- break;
- }
- }
- putc ('\n'); /* terminate the dotted line */
-
- /*
- * Run the post configuration function if there is one.
- */
- if (*fn->post) {
- (*fn->post) (cookie);
- }
-
-#ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK
- if (ret_val == FPGA_SUCCESS) {
- puts ("Done.\n");
- }
- else {
- puts ("Fail.\n");
- }
-#endif
-
- } else {
- printf ("%s: NULL Interface function table!\n", __FUNCTION__);
- }
-
- return ret_val;
-}
-
-static int Spartan2_ss_dump (Xilinx_desc * desc, void *buf, size_t bsize)
-{
- /* Readback is only available through the Slave Parallel and */
- /* boundary-scan interfaces. */
- printf ("%s: Slave Serial Dumping is unavailable\n",
- __FUNCTION__);
- return FPGA_FAIL;
-}
-
-static int Spartan2_ss_reloc (Xilinx_desc * desc, ulong reloc_offset)
-{
- int ret_val = FPGA_FAIL; /* assume the worst */
- Xilinx_Spartan2_Slave_Serial_fns *fn_r, *fn =
- (Xilinx_Spartan2_Slave_Serial_fns *) (desc->iface_fns);
-
- if (fn) {
- ulong addr;
-
- /* Get the relocated table address */
- addr = (ulong) fn + reloc_offset;
- fn_r = (Xilinx_Spartan2_Slave_Serial_fns *) addr;
-
- if (!fn_r->relocated) {
-
- if (memcmp (fn_r, fn,
- sizeof (Xilinx_Spartan2_Slave_Serial_fns))
- == 0) {
- /* good copy of the table, fix the descriptor pointer */
- desc->iface_fns = fn_r;
- } else {
- PRINTF ("%s: Invalid function table at 0x%p\n",
- __FUNCTION__, fn_r);
- return FPGA_FAIL;
- }
-
- PRINTF ("%s: Relocating descriptor at 0x%p\n", __FUNCTION__,
- desc);
-
- if (fn->pre) {
- addr = (ulong) (fn->pre) + reloc_offset;
- fn_r->pre = (Xilinx_pre_fn) addr;
- }
-
- addr = (ulong) (fn->pgm) + reloc_offset;
- fn_r->pgm = (Xilinx_pgm_fn) addr;
-
- addr = (ulong) (fn->init) + reloc_offset;
- fn_r->init = (Xilinx_init_fn) addr;
-
- addr = (ulong) (fn->done) + reloc_offset;
- fn_r->done = (Xilinx_done_fn) addr;
-
- addr = (ulong) (fn->clk) + reloc_offset;
- fn_r->clk = (Xilinx_clk_fn) addr;
-
- addr = (ulong) (fn->wr) + reloc_offset;
- fn_r->wr = (Xilinx_wr_fn) addr;
-
- if (fn->post) {
- addr = (ulong) (fn->post) + reloc_offset;
- fn_r->post = (Xilinx_post_fn) addr;
- }
-
- fn_r->relocated = TRUE;
-
- } else {
- /* this table has already been moved */
- /* XXX - should check to see if the descriptor is correct */
- desc->iface_fns = fn_r;
- }
-
- ret_val = FPGA_SUCCESS;
- } else {
- printf ("%s: NULL Interface function table!\n", __FUNCTION__);
- }
-
- return ret_val;
-
-}
+++ /dev/null
-/*
- * (C) Copyright 2002
- * Rich Ireland, Enterasys Networks, rireland@enterasys.com.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- *
- */
-
-/*
- * Configuration support for Xilinx Spartan3 devices. Based
- * on spartan2.c (Rich Ireland, rireland@enterasys.com).
- */
-
-#include <common.h> /* core U-Boot definitions */
-#include <spartan3.h> /* Spartan-II device family */
-
-/* Define FPGA_DEBUG to get debug printf's */
-#ifdef FPGA_DEBUG
-#define PRINTF(fmt,args...) printf (fmt ,##args)
-#else
-#define PRINTF(fmt,args...)
-#endif
-
-#undef CONFIG_SYS_FPGA_CHECK_BUSY
-#undef CONFIG_SYS_FPGA_PROG_FEEDBACK
-
-/* Note: The assumption is that we cannot possibly run fast enough to
- * overrun the device (the Slave Parallel mode can free run at 50MHz).
- * If there is a need to operate slower, define CONFIG_FPGA_DELAY in
- * the board config file to slow things down.
- */
-#ifndef CONFIG_FPGA_DELAY
-#define CONFIG_FPGA_DELAY()
-#endif
-
-#ifndef CONFIG_SYS_FPGA_WAIT
-#define CONFIG_SYS_FPGA_WAIT CONFIG_SYS_HZ/100 /* 10 ms */
-#endif
-
-static int Spartan3_sp_load( Xilinx_desc *desc, void *buf, size_t bsize );
-static int Spartan3_sp_dump( Xilinx_desc *desc, void *buf, size_t bsize );
-/* static int Spartan3_sp_info( Xilinx_desc *desc ); */
-static int Spartan3_sp_reloc( Xilinx_desc *desc, ulong reloc_offset );
-
-static int Spartan3_ss_load( Xilinx_desc *desc, void *buf, size_t bsize );
-static int Spartan3_ss_dump( Xilinx_desc *desc, void *buf, size_t bsize );
-/* static int Spartan3_ss_info( Xilinx_desc *desc ); */
-static int Spartan3_ss_reloc( Xilinx_desc *desc, ulong reloc_offset );
-
-/* ------------------------------------------------------------------------- */
-/* Spartan-II Generic Implementation */
-int Spartan3_load (Xilinx_desc * desc, void *buf, size_t bsize)
-{
- int ret_val = FPGA_FAIL;
-
- switch (desc->iface) {
- case slave_serial:
- PRINTF ("%s: Launching Slave Serial Load\n", __FUNCTION__);
- ret_val = Spartan3_ss_load (desc, buf, bsize);
- break;
-
- case slave_parallel:
- PRINTF ("%s: Launching Slave Parallel Load\n", __FUNCTION__);
- ret_val = Spartan3_sp_load (desc, buf, bsize);
- break;
-
- default:
- printf ("%s: Unsupported interface type, %d\n",
- __FUNCTION__, desc->iface);
- }
-
- return ret_val;
-}
-
-int Spartan3_dump (Xilinx_desc * desc, void *buf, size_t bsize)
-{
- int ret_val = FPGA_FAIL;
-
- switch (desc->iface) {
- case slave_serial:
- PRINTF ("%s: Launching Slave Serial Dump\n", __FUNCTION__);
- ret_val = Spartan3_ss_dump (desc, buf, bsize);
- break;
-
- case slave_parallel:
- PRINTF ("%s: Launching Slave Parallel Dump\n", __FUNCTION__);
- ret_val = Spartan3_sp_dump (desc, buf, bsize);
- break;
-
- default:
- printf ("%s: Unsupported interface type, %d\n",
- __FUNCTION__, desc->iface);
- }
-
- return ret_val;
-}
-
-int Spartan3_info( Xilinx_desc *desc )
-{
- return FPGA_SUCCESS;
-}
-
-
-int Spartan3_reloc (Xilinx_desc * desc, ulong reloc_offset)
-{
- int ret_val = FPGA_FAIL; /* assume a failure */
-
- if (desc->family != Xilinx_Spartan3) {
- printf ("%s: Unsupported family type, %d\n",
- __FUNCTION__, desc->family);
- return FPGA_FAIL;
- } else
- switch (desc->iface) {
- case slave_serial:
- ret_val = Spartan3_ss_reloc (desc, reloc_offset);
- break;
-
- case slave_parallel:
- ret_val = Spartan3_sp_reloc (desc, reloc_offset);
- break;
-
- default:
- printf ("%s: Unsupported interface type, %d\n",
- __FUNCTION__, desc->iface);
- }
-
- return ret_val;
-}
-
-
-/* ------------------------------------------------------------------------- */
-/* Spartan-II Slave Parallel Generic Implementation */
-
-static int Spartan3_sp_load (Xilinx_desc * desc, void *buf, size_t bsize)
-{
- int ret_val = FPGA_FAIL; /* assume the worst */
- Xilinx_Spartan3_Slave_Parallel_fns *fn = desc->iface_fns;
-
- PRINTF ("%s: start with interface functions @ 0x%p\n",
- __FUNCTION__, fn);
-
- if (fn) {
- size_t bytecount = 0;
- unsigned char *data = (unsigned char *) buf;
- int cookie = desc->cookie; /* make a local copy */
- unsigned long ts; /* timestamp */
-
- PRINTF ("%s: Function Table:\n"
- "ptr:\t0x%p\n"
- "struct: 0x%p\n"
- "pre: 0x%p\n"
- "pgm:\t0x%p\n"
- "init:\t0x%p\n"
- "err:\t0x%p\n"
- "clk:\t0x%p\n"
- "cs:\t0x%p\n"
- "wr:\t0x%p\n"
- "read data:\t0x%p\n"
- "write data:\t0x%p\n"
- "busy:\t0x%p\n"
- "abort:\t0x%p\n",
- "post:\t0x%p\n\n",
- __FUNCTION__, &fn, fn, fn->pre, fn->pgm, fn->init, fn->err,
- fn->clk, fn->cs, fn->wr, fn->rdata, fn->wdata, fn->busy,
- fn->abort, fn->post);
-
- /*
- * This code is designed to emulate the "Express Style"
- * Continuous Data Loading in Slave Parallel Mode for
- * the Spartan-II Family.
- */
-#ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK
- printf ("Loading FPGA Device %d...\n", cookie);
-#endif
- /*
- * Run the pre configuration function if there is one.
- */
- if (*fn->pre) {
- (*fn->pre) (cookie);
- }
-
- /* Establish the initial state */
- (*fn->pgm) (TRUE, TRUE, cookie); /* Assert the program, commit */
-
- /* Get ready for the burn */
- CONFIG_FPGA_DELAY ();
- (*fn->pgm) (FALSE, TRUE, cookie); /* Deassert the program, commit */
-
- ts = get_timer (0); /* get current time */
- /* Now wait for INIT and BUSY to go high */
- do {
- CONFIG_FPGA_DELAY ();
- if (get_timer (ts) > CONFIG_SYS_FPGA_WAIT) { /* check the time */
- puts ("** Timeout waiting for INIT to clear.\n");
- (*fn->abort) (cookie); /* abort the burn */
- return FPGA_FAIL;
- }
- } while ((*fn->init) (cookie) && (*fn->busy) (cookie));
-
- (*fn->wr) (TRUE, TRUE, cookie); /* Assert write, commit */
- (*fn->cs) (TRUE, TRUE, cookie); /* Assert chip select, commit */
- (*fn->clk) (TRUE, TRUE, cookie); /* Assert the clock pin */
-
- /* Load the data */
- while (bytecount < bsize) {
- /* XXX - do we check for an Ctrl-C press in here ??? */
- /* XXX - Check the error bit? */
-
- (*fn->wdata) (data[bytecount++], TRUE, cookie); /* write the data */
- CONFIG_FPGA_DELAY ();
- (*fn->clk) (FALSE, TRUE, cookie); /* Deassert the clock pin */
- CONFIG_FPGA_DELAY ();
- (*fn->clk) (TRUE, TRUE, cookie); /* Assert the clock pin */
-
-#ifdef CONFIG_SYS_FPGA_CHECK_BUSY
- ts = get_timer (0); /* get current time */
- while ((*fn->busy) (cookie)) {
- /* XXX - we should have a check in here somewhere to
- * make sure we aren't busy forever... */
-
- CONFIG_FPGA_DELAY ();
- (*fn->clk) (FALSE, TRUE, cookie); /* Deassert the clock pin */
- CONFIG_FPGA_DELAY ();
- (*fn->clk) (TRUE, TRUE, cookie); /* Assert the clock pin */
-
- if (get_timer (ts) > CONFIG_SYS_FPGA_WAIT) { /* check the time */
- puts ("** Timeout waiting for BUSY to clear.\n");
- (*fn->abort) (cookie); /* abort the burn */
- return FPGA_FAIL;
- }
- }
-#endif
-
-#ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK
- if (bytecount % (bsize / 40) == 0)
- putc ('.'); /* let them know we are alive */
-#endif
- }
-
- CONFIG_FPGA_DELAY ();
- (*fn->cs) (FALSE, TRUE, cookie); /* Deassert the chip select */
- (*fn->wr) (FALSE, TRUE, cookie); /* Deassert the write pin */
-
-#ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK
- putc ('\n'); /* terminate the dotted line */
-#endif
-
- /* now check for done signal */
- ts = get_timer (0); /* get current time */
- ret_val = FPGA_SUCCESS;
- while ((*fn->done) (cookie) == FPGA_FAIL) {
- /* XXX - we should have a check in here somewhere to
- * make sure we aren't busy forever... */
-
- CONFIG_FPGA_DELAY ();
- (*fn->clk) (FALSE, TRUE, cookie); /* Deassert the clock pin */
- CONFIG_FPGA_DELAY ();
- (*fn->clk) (TRUE, TRUE, cookie); /* Assert the clock pin */
-
- if (get_timer (ts) > CONFIG_SYS_FPGA_WAIT) { /* check the time */
- puts ("** Timeout waiting for DONE to clear.\n");
- (*fn->abort) (cookie); /* abort the burn */
- ret_val = FPGA_FAIL;
- break;
- }
- }
-
- if (ret_val == FPGA_SUCCESS) {
-#ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK
- puts ("Done.\n");
-#endif
- }
- /*
- * Run the post configuration function if there is one.
- */
- if (*fn->post) {
- (*fn->post) (cookie);
- }
-
- else {
-#ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK
- puts ("Fail.\n");
-#endif
- }
-
- } else {
- printf ("%s: NULL Interface function table!\n", __FUNCTION__);
- }
-
- return ret_val;
-}
-
-static int Spartan3_sp_dump (Xilinx_desc * desc, void *buf, size_t bsize)
-{
- int ret_val = FPGA_FAIL; /* assume the worst */
- Xilinx_Spartan3_Slave_Parallel_fns *fn = desc->iface_fns;
-
- if (fn) {
- unsigned char *data = (unsigned char *) buf;
- size_t bytecount = 0;
- int cookie = desc->cookie; /* make a local copy */
-
- printf ("Starting Dump of FPGA Device %d...\n", cookie);
-
- (*fn->cs) (TRUE, TRUE, cookie); /* Assert chip select, commit */
- (*fn->clk) (TRUE, TRUE, cookie); /* Assert the clock pin */
-
- /* dump the data */
- while (bytecount < bsize) {
- /* XXX - do we check for an Ctrl-C press in here ??? */
-
- (*fn->clk) (FALSE, TRUE, cookie); /* Deassert the clock pin */
- (*fn->clk) (TRUE, TRUE, cookie); /* Assert the clock pin */
- (*fn->rdata) (&(data[bytecount++]), cookie); /* read the data */
-#ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK
- if (bytecount % (bsize / 40) == 0)
- putc ('.'); /* let them know we are alive */
-#endif
- }
-
- (*fn->cs) (FALSE, FALSE, cookie); /* Deassert the chip select */
- (*fn->clk) (FALSE, TRUE, cookie); /* Deassert the clock pin */
- (*fn->clk) (TRUE, TRUE, cookie); /* Assert the clock pin */
-
-#ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK
- putc ('\n'); /* terminate the dotted line */
-#endif
- puts ("Done.\n");
-
- /* XXX - checksum the data? */
- } else {
- printf ("%s: NULL Interface function table!\n", __FUNCTION__);
- }
-
- return ret_val;
-}
-
-
-static int Spartan3_sp_reloc (Xilinx_desc * desc, ulong reloc_offset)
-{
- int ret_val = FPGA_FAIL; /* assume the worst */
- Xilinx_Spartan3_Slave_Parallel_fns *fn_r, *fn =
- (Xilinx_Spartan3_Slave_Parallel_fns *) (desc->iface_fns);
-
- if (fn) {
- ulong addr;
-
- /* Get the relocated table address */
- addr = (ulong) fn + reloc_offset;
- fn_r = (Xilinx_Spartan3_Slave_Parallel_fns *) addr;
-
- if (!fn_r->relocated) {
-
- if (memcmp (fn_r, fn,
- sizeof (Xilinx_Spartan3_Slave_Parallel_fns))
- == 0) {
- /* good copy of the table, fix the descriptor pointer */
- desc->iface_fns = fn_r;
- } else {
- PRINTF ("%s: Invalid function table at 0x%p\n",
- __FUNCTION__, fn_r);
- return FPGA_FAIL;
- }
-
- PRINTF ("%s: Relocating descriptor at 0x%p\n", __FUNCTION__,
- desc);
-
- addr = (ulong) (fn->pre) + reloc_offset;
- fn_r->pre = (Xilinx_pre_fn) addr;
-
- addr = (ulong) (fn->pgm) + reloc_offset;
- fn_r->pgm = (Xilinx_pgm_fn) addr;
-
- addr = (ulong) (fn->init) + reloc_offset;
- fn_r->init = (Xilinx_init_fn) addr;
-
- addr = (ulong) (fn->done) + reloc_offset;
- fn_r->done = (Xilinx_done_fn) addr;
-
- addr = (ulong) (fn->clk) + reloc_offset;
- fn_r->clk = (Xilinx_clk_fn) addr;
-
- addr = (ulong) (fn->err) + reloc_offset;
- fn_r->err = (Xilinx_err_fn) addr;
-
- addr = (ulong) (fn->cs) + reloc_offset;
- fn_r->cs = (Xilinx_cs_fn) addr;
-
- addr = (ulong) (fn->wr) + reloc_offset;
- fn_r->wr = (Xilinx_wr_fn) addr;
-
- addr = (ulong) (fn->rdata) + reloc_offset;
- fn_r->rdata = (Xilinx_rdata_fn) addr;
-
- addr = (ulong) (fn->wdata) + reloc_offset;
- fn_r->wdata = (Xilinx_wdata_fn) addr;
-
- addr = (ulong) (fn->busy) + reloc_offset;
- fn_r->busy = (Xilinx_busy_fn) addr;
-
- addr = (ulong) (fn->abort) + reloc_offset;
- fn_r->abort = (Xilinx_abort_fn) addr;
-
- addr = (ulong) (fn->post) + reloc_offset;
- fn_r->post = (Xilinx_post_fn) addr;
-
- fn_r->relocated = TRUE;
-
- } else {
- /* this table has already been moved */
- /* XXX - should check to see if the descriptor is correct */
- desc->iface_fns = fn_r;
- }
-
- ret_val = FPGA_SUCCESS;
- } else {
- printf ("%s: NULL Interface function table!\n", __FUNCTION__);
- }
-
- return ret_val;
-
-}
-
-/* ------------------------------------------------------------------------- */
-
-static int Spartan3_ss_load (Xilinx_desc * desc, void *buf, size_t bsize)
-{
- int ret_val = FPGA_FAIL; /* assume the worst */
- Xilinx_Spartan3_Slave_Serial_fns *fn = desc->iface_fns;
- int i;
- unsigned char val;
-
- PRINTF ("%s: start with interface functions @ 0x%p\n",
- __FUNCTION__, fn);
-
- if (fn) {
- size_t bytecount = 0;
- unsigned char *data = (unsigned char *) buf;
- int cookie = desc->cookie; /* make a local copy */
- unsigned long ts; /* timestamp */
-
- PRINTF ("%s: Function Table:\n"
- "ptr:\t0x%p\n"
- "struct: 0x%p\n"
- "pgm:\t0x%p\n"
- "init:\t0x%p\n"
- "clk:\t0x%p\n"
- "wr:\t0x%p\n"
- "done:\t0x%p\n\n",
- __FUNCTION__, &fn, fn, fn->pgm, fn->init,
- fn->clk, fn->wr, fn->done);
-#ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK
- printf ("Loading FPGA Device %d...\n", cookie);
-#endif
-
- /*
- * Run the pre configuration function if there is one.
- */
- if (*fn->pre) {
- (*fn->pre) (cookie);
- }
-
- /* Establish the initial state */
- (*fn->pgm) (TRUE, TRUE, cookie); /* Assert the program, commit */
-
- /* Wait for INIT state (init low) */
- ts = get_timer (0); /* get current time */
- do {
- CONFIG_FPGA_DELAY ();
- if (get_timer (ts) > CONFIG_SYS_FPGA_WAIT) { /* check the time */
- puts ("** Timeout waiting for INIT to start.\n");
- return FPGA_FAIL;
- }
- } while (!(*fn->init) (cookie));
-
- /* Get ready for the burn */
- CONFIG_FPGA_DELAY ();
- (*fn->pgm) (FALSE, TRUE, cookie); /* Deassert the program, commit */
-
- ts = get_timer (0); /* get current time */
- /* Now wait for INIT to go high */
- do {
- CONFIG_FPGA_DELAY ();
- if (get_timer (ts) > CONFIG_SYS_FPGA_WAIT) { /* check the time */
- puts ("** Timeout waiting for INIT to clear.\n");
- return FPGA_FAIL;
- }
- } while ((*fn->init) (cookie));
-
- /* Load the data */
- while (bytecount < bsize) {
-
- /* Xilinx detects an error if INIT goes low (active)
- while DONE is low (inactive) */
- if ((*fn->done) (cookie) == 0 && (*fn->init) (cookie)) {
- puts ("** CRC error during FPGA load.\n");
- return (FPGA_FAIL);
- }
- val = data [bytecount ++];
- i = 8;
- do {
- /* Deassert the clock */
- (*fn->clk) (FALSE, TRUE, cookie);
- CONFIG_FPGA_DELAY ();
- /* Write data */
- (*fn->wr) ((val & 0x80), TRUE, cookie);
- CONFIG_FPGA_DELAY ();
- /* Assert the clock */
- (*fn->clk) (TRUE, TRUE, cookie);
- CONFIG_FPGA_DELAY ();
- val <<= 1;
- i --;
- } while (i > 0);
-
-#ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK
- if (bytecount % (bsize / 40) == 0)
- putc ('.'); /* let them know we are alive */
-#endif
- }
-
- CONFIG_FPGA_DELAY ();
-
-#ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK
- putc ('\n'); /* terminate the dotted line */
-#endif
-
- /* now check for done signal */
- ts = get_timer (0); /* get current time */
- ret_val = FPGA_SUCCESS;
- (*fn->wr) (TRUE, TRUE, cookie);
-
- while (! (*fn->done) (cookie)) {
- /* XXX - we should have a check in here somewhere to
- * make sure we aren't busy forever... */
-
- CONFIG_FPGA_DELAY ();
- (*fn->clk) (FALSE, TRUE, cookie); /* Deassert the clock pin */
- CONFIG_FPGA_DELAY ();
- (*fn->clk) (TRUE, TRUE, cookie); /* Assert the clock pin */
-
- putc ('*');
-
- if (get_timer (ts) > CONFIG_SYS_FPGA_WAIT) { /* check the time */
- puts ("** Timeout waiting for DONE to clear.\n");
- ret_val = FPGA_FAIL;
- break;
- }
- }
- putc ('\n'); /* terminate the dotted line */
-
- /*
- * Run the post configuration function if there is one.
- */
- if (*fn->post) {
- (*fn->post) (cookie);
- }
-
-#ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK
- if (ret_val == FPGA_SUCCESS) {
- puts ("Done.\n");
- }
- else {
- puts ("Fail.\n");
- }
-#endif
-
- } else {
- printf ("%s: NULL Interface function table!\n", __FUNCTION__);
- }
-
- return ret_val;
-}
-
-static int Spartan3_ss_dump (Xilinx_desc * desc, void *buf, size_t bsize)
-{
- /* Readback is only available through the Slave Parallel and */
- /* boundary-scan interfaces. */
- printf ("%s: Slave Serial Dumping is unavailable\n",
- __FUNCTION__);
- return FPGA_FAIL;
-}
-
-static int Spartan3_ss_reloc (Xilinx_desc * desc, ulong reloc_offset)
-{
- int ret_val = FPGA_FAIL; /* assume the worst */
- Xilinx_Spartan3_Slave_Serial_fns *fn_r, *fn =
- (Xilinx_Spartan3_Slave_Serial_fns *) (desc->iface_fns);
-
- if (fn) {
- ulong addr;
-
- /* Get the relocated table address */
- addr = (ulong) fn + reloc_offset;
- fn_r = (Xilinx_Spartan3_Slave_Serial_fns *) addr;
-
- if (!fn_r->relocated) {
-
- if (memcmp (fn_r, fn,
- sizeof (Xilinx_Spartan3_Slave_Serial_fns))
- == 0) {
- /* good copy of the table, fix the descriptor pointer */
- desc->iface_fns = fn_r;
- } else {
- PRINTF ("%s: Invalid function table at 0x%p\n",
- __FUNCTION__, fn_r);
- return FPGA_FAIL;
- }
-
- PRINTF ("%s: Relocating descriptor at 0x%p\n", __FUNCTION__,
- desc);
-
- if (fn->pre) {
- addr = (ulong) (fn->pre) + reloc_offset;
- fn_r->pre = (Xilinx_pre_fn) addr;
- }
-
- addr = (ulong) (fn->pgm) + reloc_offset;
- fn_r->pgm = (Xilinx_pgm_fn) addr;
-
- addr = (ulong) (fn->init) + reloc_offset;
- fn_r->init = (Xilinx_init_fn) addr;
-
- addr = (ulong) (fn->done) + reloc_offset;
- fn_r->done = (Xilinx_done_fn) addr;
-
- addr = (ulong) (fn->clk) + reloc_offset;
- fn_r->clk = (Xilinx_clk_fn) addr;
-
- addr = (ulong) (fn->wr) + reloc_offset;
- fn_r->wr = (Xilinx_wr_fn) addr;
-
- if (fn->post) {
- addr = (ulong) (fn->post) + reloc_offset;
- fn_r->post = (Xilinx_post_fn) addr;
- }
-
- fn_r->relocated = TRUE;
-
- } else {
- /* this table has already been moved */
- /* XXX - should check to see if the descriptor is correct */
- desc->iface_fns = fn_r;
- }
-
- ret_val = FPGA_SUCCESS;
- } else {
- printf ("%s: NULL Interface function table!\n", __FUNCTION__);
- }
-
- return ret_val;
-
-}
+++ /dev/null
-/*
- * (C) Copyright 2007
- * Eran Liberty, Extricom , eran.liberty@gmail.com
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- *
- */
-
-#include <common.h> /* core U-Boot definitions */
-#include <altera.h>
-
-int StratixII_ps_fpp_load (Altera_desc * desc, void *buf, size_t bsize,
- int isSerial, int isSecure);
-int StratixII_ps_fpp_dump (Altera_desc * desc, void *buf, size_t bsize);
-
-/****************************************************************/
-/* Stratix II Generic Implementation */
-int StratixII_load (Altera_desc * desc, void *buf, size_t bsize)
-{
- int ret_val = FPGA_FAIL;
-
- switch (desc->iface) {
- case passive_serial:
- ret_val = StratixII_ps_fpp_load (desc, buf, bsize, 1, 0);
- break;
- case fast_passive_parallel:
- ret_val = StratixII_ps_fpp_load (desc, buf, bsize, 0, 0);
- break;
- case fast_passive_parallel_security:
- ret_val = StratixII_ps_fpp_load (desc, buf, bsize, 0, 1);
- break;
-
- /* Add new interface types here */
- default:
- printf ("%s: Unsupported interface type, %d\n", __FUNCTION__,
- desc->iface);
- }
- return ret_val;
-}
-
-int StratixII_dump (Altera_desc * desc, void *buf, size_t bsize)
-{
- int ret_val = FPGA_FAIL;
-
- switch (desc->iface) {
- case passive_serial:
- case fast_passive_parallel:
- case fast_passive_parallel_security:
- ret_val = StratixII_ps_fpp_dump (desc, buf, bsize);
- break;
- /* Add new interface types here */
- default:
- printf ("%s: Unsupported interface type, %d\n", __FUNCTION__,
- desc->iface);
- }
- return ret_val;
-}
-
-int StratixII_info (Altera_desc * desc)
-{
- return FPGA_SUCCESS;
-}
-
-int StratixII_reloc (Altera_desc * desc, ulong reloc_offset)
-{
- int i;
- uint32_t dest = (uint32_t) desc & 0xff000000;
-
- /* we assume a relocated code and non relocated code has different upper 8 bits */
- if (dest != ((uint32_t) desc->iface_fns & 0xff000000)) {
- desc->iface_fns =
- (void *)((uint32_t) (desc->iface_fns) + reloc_offset);
- }
- for (i = 0; i < sizeof (altera_board_specific_func) / sizeof (void *);
- i++) {
- if (dest !=
- ((uint32_t) (((void **)(desc->iface_fns))[i]) & 0xff000000))
- {
- ((void **)(desc->iface_fns))[i] =
- (void
- *)(((uint32_t) (((void **)(desc->iface_fns))[i])) +
- reloc_offset);
- }
- }
- return FPGA_SUCCESS;
-}
-
-int StratixII_ps_fpp_dump (Altera_desc * desc, void *buf, size_t bsize)
-{
- printf ("Stratix II Fast Passive Parallel dump is not implemented\n");
- return FPGA_FAIL;
-}
-
-int StratixII_ps_fpp_load (Altera_desc * desc, void *buf, size_t bsize,
- int isSerial, int isSecure)
-{
- altera_board_specific_func *fns;
- int cookie;
- int ret_val = FPGA_FAIL;
- int bytecount;
- char *buff = buf;
- int i;
-
- if (!desc) {
- printf ("%s(%d) Altera_desc missing\n", __FUNCTION__, __LINE__);
- return FPGA_FAIL;
- }
- if (!buff) {
- printf ("%s(%d) buffer is missing\n", __FUNCTION__, __LINE__);
- return FPGA_FAIL;
- }
- if (!bsize) {
- printf ("%s(%d) size is zero\n", __FUNCTION__, __LINE__);
- return FPGA_FAIL;
- }
- if (!desc->iface_fns) {
- printf
- ("%s(%d) Altera_desc function interface table is missing\n",
- __FUNCTION__, __LINE__);
- return FPGA_FAIL;
- }
- fns = (altera_board_specific_func *) (desc->iface_fns);
- cookie = desc->cookie;
-
- if (!
- (fns->config && fns->status && fns->done && fns->data
- && fns->abort)) {
- printf
- ("%s(%d) Missing some function in the function interface table\n",
- __FUNCTION__, __LINE__);
- return FPGA_FAIL;
- }
-
- /* 1. give board specific a chance to do anything before we start */
- if (fns->pre) {
- if ((ret_val = fns->pre (cookie)) < 0) {
- return ret_val;
- }
- }
-
- /* from this point on we must fail gracfully by calling lower layer abort */
-
- /* 2. Strat burn cycle by deasserting config for t_CFG and waiting t_CF2CK after reaserted */
- fns->config (0, 1, cookie);
- udelay (5); /* nCONFIG low pulse width 2usec */
- fns->config (1, 1, cookie);
- udelay (100); /* nCONFIG high to first rising edge on DCLK */
-
- /* 3. Start the Data cycle with clk deasserted */
- bytecount = 0;
- fns->clk (0, 1, cookie);
-
- printf ("loading to fpga ");
- while (bytecount < bsize) {
- /* 3.1 check stratix has not signaled us an error */
- if (fns->status (cookie) != 1) {
- printf
- ("\n%s(%d) Stratix failed (byte transfered till failure 0x%x)\n",
- __FUNCTION__, __LINE__, bytecount);
- fns->abort (cookie);
- return FPGA_FAIL;
- }
- if (isSerial) {
- int i;
- uint8_t data = buff[bytecount++];
- for (i = 0; i < 8; i++) {
- /* 3.2(ps) put data on the bus */
- fns->data ((data >> i) & 1, 1, cookie);
-
- /* 3.3(ps) clock once */
- fns->clk (1, 1, cookie);
- fns->clk (0, 1, cookie);
- }
- } else {
- /* 3.2(fpp) put data on the bus */
- fns->data (buff[bytecount++], 1, cookie);
-
- /* 3.3(fpp) clock once */
- fns->clk (1, 1, cookie);
- fns->clk (0, 1, cookie);
-
- /* 3.4(fpp) for secure cycle push 3 more clocks */
- for (i = 0; isSecure && i < 3; i++) {
- fns->clk (1, 1, cookie);
- fns->clk (0, 1, cookie);
- }
- }
-
- /* 3.5 while clk is deasserted it is safe to print some progress indication */
- if ((bytecount % (bsize / 100)) == 0) {
- printf ("\b\b\b%02d\%", bytecount * 100 / bsize);
- }
- }
-
- /* 4. Set one last clock and check conf done signal */
- fns->clk (1, 1, cookie);
- udelay (100);
- if (!fns->done (cookie)) {
- printf (" error!.\n");
- fns->abort (cookie);
- return FPGA_FAIL;
- } else {
- printf ("\b\b\b done.\n");
- }
-
- /* 5. call lower layer post configuration */
- if (fns->post) {
- if ((ret_val = fns->post (cookie)) < 0) {
- fns->abort (cookie);
- return ret_val;
- }
- }
-
- return FPGA_SUCCESS;
-}
+++ /dev/null
-/*
- * (C) Copyright 2002
- * Rich Ireland, Enterasys Networks, rireland@enterasys.com.
- * Keith Outwater, keith_outwater@mvis.com
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- *
- */
-
-/*
- * Configuration support for Xilinx Virtex2 devices. Based
- * on spartan2.c (Rich Ireland, rireland@enterasys.com).
- */
-
-#include <common.h>
-#include <virtex2.h>
-
-#if 0
-#define FPGA_DEBUG
-#endif
-
-#ifdef FPGA_DEBUG
-#define PRINTF(fmt,args...) printf (fmt ,##args)
-#else
-#define PRINTF(fmt,args...)
-#endif
-
-/*
- * If the SelectMap interface can be overrun by the processor, define
- * CONFIG_SYS_FPGA_CHECK_BUSY and/or CONFIG_FPGA_DELAY in the board configuration
- * file and add board-specific support for checking BUSY status. By default,
- * assume that the SelectMap interface cannot be overrun.
- */
-#ifndef CONFIG_SYS_FPGA_CHECK_BUSY
-#undef CONFIG_SYS_FPGA_CHECK_BUSY
-#endif
-
-#ifndef CONFIG_FPGA_DELAY
-#define CONFIG_FPGA_DELAY()
-#endif
-
-#ifndef CONFIG_SYS_FPGA_PROG_FEEDBACK
-#define CONFIG_SYS_FPGA_PROG_FEEDBACK
-#endif
-
-/*
- * Don't allow config cycle to be interrupted
- */
-#ifndef CONFIG_SYS_FPGA_CHECK_CTRLC
-#undef CONFIG_SYS_FPGA_CHECK_CTRLC
-#endif
-
-/*
- * Check for errors during configuration by default
- */
-#ifndef CONFIG_SYS_FPGA_CHECK_ERROR
-#define CONFIG_SYS_FPGA_CHECK_ERROR
-#endif
-
-/*
- * The default timeout in mS for INIT_B to deassert after PROG_B has
- * been deasserted. Per the latest Virtex II Handbook (page 347), the
- * max time from PORG_B deassertion to INIT_B deassertion is 4uS per
- * data frame for the XC2V8000. The XC2V8000 has 2860 data frames
- * which yields 11.44 mS. So let's make it bigger in order to handle
- * an XC2V1000, if anyone can ever get ahold of one.
- */
-#ifndef CONFIG_SYS_FPGA_WAIT_INIT
-#define CONFIG_SYS_FPGA_WAIT_INIT CONFIG_SYS_HZ/2 /* 500 ms */
-#endif
-
-/*
- * The default timeout for waiting for BUSY to deassert during configuration.
- * This is normally not necessary since for most reasonable configuration
- * clock frequencies (i.e. 66 MHz or less), BUSY monitoring is unnecessary.
- */
-#ifndef CONFIG_SYS_FPGA_WAIT_BUSY
-#define CONFIG_SYS_FPGA_WAIT_BUSY CONFIG_SYS_HZ/200 /* 5 ms*/
-#endif
-
-/* Default timeout for waiting for FPGA to enter operational mode after
- * configuration data has been written.
- */
-#ifndef CONFIG_SYS_FPGA_WAIT_CONFIG
-#define CONFIG_SYS_FPGA_WAIT_CONFIG CONFIG_SYS_HZ/5 /* 200 ms */
-#endif
-
-static int Virtex2_ssm_load (Xilinx_desc * desc, void *buf, size_t bsize);
-static int Virtex2_ssm_dump (Xilinx_desc * desc, void *buf, size_t bsize);
-static int Virtex2_ssm_reloc (Xilinx_desc * desc, ulong reloc_offset);
-
-static int Virtex2_ss_load (Xilinx_desc * desc, void *buf, size_t bsize);
-static int Virtex2_ss_dump (Xilinx_desc * desc, void *buf, size_t bsize);
-static int Virtex2_ss_reloc (Xilinx_desc * desc, ulong reloc_offset);
-
-int Virtex2_load (Xilinx_desc * desc, void *buf, size_t bsize)
-{
- int ret_val = FPGA_FAIL;
-
- switch (desc->iface) {
- case slave_serial:
- PRINTF ("%s: Launching Slave Serial Load\n", __FUNCTION__);
- ret_val = Virtex2_ss_load (desc, buf, bsize);
- break;
-
- case slave_selectmap:
- PRINTF ("%s: Launching Slave Parallel Load\n", __FUNCTION__);
- ret_val = Virtex2_ssm_load (desc, buf, bsize);
- break;
-
- default:
- printf ("%s: Unsupported interface type, %d\n",
- __FUNCTION__, desc->iface);
- }
- return ret_val;
-}
-
-int Virtex2_dump (Xilinx_desc * desc, void *buf, size_t bsize)
-{
- int ret_val = FPGA_FAIL;
-
- switch (desc->iface) {
- case slave_serial:
- PRINTF ("%s: Launching Slave Serial Dump\n", __FUNCTION__);
- ret_val = Virtex2_ss_dump (desc, buf, bsize);
- break;
-
- case slave_parallel:
- PRINTF ("%s: Launching Slave Parallel Dump\n", __FUNCTION__);
- ret_val = Virtex2_ssm_dump (desc, buf, bsize);
- break;
-
- default:
- printf ("%s: Unsupported interface type, %d\n",
- __FUNCTION__, desc->iface);
- }
- return ret_val;
-}
-
-int Virtex2_info (Xilinx_desc * desc)
-{
- return FPGA_SUCCESS;
-}
-
-int Virtex2_reloc (Xilinx_desc * desc, ulong reloc_offset)
-{
- int ret_val = FPGA_FAIL;
-
- if (desc->family != Xilinx_Virtex2) {
- printf ("%s: Unsupported family type, %d\n",
- __FUNCTION__, desc->family);
- return FPGA_FAIL;
- } else
- switch (desc->iface) {
- case slave_serial:
- ret_val = Virtex2_ss_reloc (desc, reloc_offset);
- break;
-
- case slave_selectmap:
- ret_val = Virtex2_ssm_reloc (desc, reloc_offset);
- break;
-
- default:
- printf ("%s: Unsupported interface type, %d\n",
- __FUNCTION__, desc->iface);
- }
- return ret_val;
-}
-
-/*
- * Virtex-II Slave SelectMap configuration loader. Configuration via
- * SelectMap is as follows:
- * 1. Set the FPGA's PROG_B line low.
- * 2. Set the FPGA's PROG_B line high. Wait for INIT_B to go high.
- * 3. Write data to the SelectMap port. If INIT_B goes low at any time
- * this process, a configuration error (most likely CRC failure) has
- * ocurred. At this point a status word may be read from the
- * SelectMap interface to determine the source of the problem (You
- * could, for instance, put this in your 'abort' function handler).
- * 4. After all data has been written, test the state of the FPGA
- * INIT_B and DONE lines. If both are high, configuration has
- * succeeded. Congratulations!
- */
-static int Virtex2_ssm_load (Xilinx_desc * desc, void *buf, size_t bsize)
-{
- int ret_val = FPGA_FAIL;
- Xilinx_Virtex2_Slave_SelectMap_fns *fn = desc->iface_fns;
-
- PRINTF ("%s:%d: Start with interface functions @ 0x%p\n",
- __FUNCTION__, __LINE__, fn);
-
- if (fn) {
- size_t bytecount = 0;
- unsigned char *data = (unsigned char *) buf;
- int cookie = desc->cookie;
- unsigned long ts;
-
- /* Gotta split this one up (so the stack won't blow??) */
- PRINTF ("%s:%d: Function Table:\n"
- " base 0x%p\n"
- " struct 0x%p\n"
- " pre 0x%p\n"
- " prog 0x%p\n"
- " init 0x%p\n"
- " error 0x%p\n",
- __FUNCTION__, __LINE__,
- &fn, fn, fn->pre, fn->pgm, fn->init, fn->err);
- PRINTF (" clock 0x%p\n"
- " cs 0x%p\n"
- " write 0x%p\n"
- " rdata 0x%p\n"
- " wdata 0x%p\n"
- " busy 0x%p\n"
- " abort 0x%p\n"
- " post 0x%p\n\n",
- fn->clk, fn->cs, fn->wr, fn->rdata, fn->wdata,
- fn->busy, fn->abort, fn->post);
-
-#ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK
- printf ("Initializing FPGA Device %d...\n", cookie);
-#endif
- /*
- * Run the pre configuration function if there is one.
- */
- if (*fn->pre) {
- (*fn->pre) (cookie);
- }
-
- /*
- * Assert the program line. The minimum pulse width for
- * Virtex II devices is 300 nS (Tprogram parameter in datasheet).
- * There is no maximum value for the pulse width. Check to make
- * sure that INIT_B goes low after assertion of PROG_B
- */
- (*fn->pgm) (TRUE, TRUE, cookie);
- udelay (10);
- ts = get_timer (0);
- do {
- if (get_timer (ts) > CONFIG_SYS_FPGA_WAIT_INIT) {
- printf ("%s:%d: ** Timeout after %d ticks waiting for INIT"
- " to assert.\n", __FUNCTION__, __LINE__,
- CONFIG_SYS_FPGA_WAIT_INIT);
- (*fn->abort) (cookie);
- return FPGA_FAIL;
- }
- } while (!(*fn->init) (cookie));
-
- (*fn->pgm) (FALSE, TRUE, cookie);
- CONFIG_FPGA_DELAY ();
- (*fn->clk) (TRUE, TRUE, cookie);
-
- /*
- * Start a timer and wait for INIT_B to go high
- */
- ts = get_timer (0);
- do {
- CONFIG_FPGA_DELAY ();
- if (get_timer (ts) > CONFIG_SYS_FPGA_WAIT_INIT) {
- printf ("%s:%d: ** Timeout after %d ticks waiting for INIT"
- " to deassert.\n", __FUNCTION__, __LINE__,
- CONFIG_SYS_FPGA_WAIT_INIT);
- (*fn->abort) (cookie);
- return FPGA_FAIL;
- }
- } while ((*fn->init) (cookie) && (*fn->busy) (cookie));
-
- (*fn->wr) (TRUE, TRUE, cookie);
- (*fn->cs) (TRUE, TRUE, cookie);
-
- udelay (10000);
-
- /*
- * Load the data byte by byte
- */
- while (bytecount < bsize) {
-#ifdef CONFIG_SYS_FPGA_CHECK_CTRLC
- if (ctrlc ()) {
- (*fn->abort) (cookie);
- return FPGA_FAIL;
- }
-#endif
-
- if ((*fn->done) (cookie) == FPGA_SUCCESS) {
- PRINTF ("%s:%d:done went active early, bytecount = %d\n",
- __FUNCTION__, __LINE__, bytecount);
- break;
- }
-
-#ifdef CONFIG_SYS_FPGA_CHECK_ERROR
- if ((*fn->init) (cookie)) {
- printf ("\n%s:%d: ** Error: INIT asserted during"
- " configuration\n", __FUNCTION__, __LINE__);
- printf ("%d = buffer offset, %d = buffer size\n",
- bytecount, bsize);
- (*fn->abort) (cookie);
- return FPGA_FAIL;
- }
-#endif
-
- (*fn->wdata) (data[bytecount++], TRUE, cookie);
- CONFIG_FPGA_DELAY ();
-
- /*
- * Cycle the clock pin
- */
- (*fn->clk) (FALSE, TRUE, cookie);
- CONFIG_FPGA_DELAY ();
- (*fn->clk) (TRUE, TRUE, cookie);
-
-#ifdef CONFIG_SYS_FPGA_CHECK_BUSY
- ts = get_timer (0);
- while ((*fn->busy) (cookie)) {
- if (get_timer (ts) > CONFIG_SYS_FPGA_WAIT_BUSY) {
- printf ("%s:%d: ** Timeout after %d ticks waiting for"
- " BUSY to deassert\n",
- __FUNCTION__, __LINE__, CONFIG_SYS_FPGA_WAIT_BUSY);
- (*fn->abort) (cookie);
- return FPGA_FAIL;
- }
- }
-#endif
-
-#ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK
- if (bytecount % (bsize / 40) == 0)
- putc ('.');
-#endif
- }
-
- /*
- * Finished writing the data; deassert FPGA CS_B and WRITE_B signals.
- */
- CONFIG_FPGA_DELAY ();
- (*fn->cs) (FALSE, TRUE, cookie);
- (*fn->wr) (FALSE, TRUE, cookie);
-
-#ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK
- putc ('\n');
-#endif
-
- /*
- * Check for successful configuration. FPGA INIT_B and DONE should
- * both be high upon successful configuration.
- */
- ts = get_timer (0);
- ret_val = FPGA_SUCCESS;
- while (((*fn->done) (cookie) == FPGA_FAIL) || (*fn->init) (cookie)) {
- if (get_timer (ts) > CONFIG_SYS_FPGA_WAIT_CONFIG) {
- printf ("%s:%d: ** Timeout after %d ticks waiting for DONE to"
- "assert and INIT to deassert\n",
- __FUNCTION__, __LINE__, CONFIG_SYS_FPGA_WAIT_CONFIG);
- (*fn->abort) (cookie);
- ret_val = FPGA_FAIL;
- break;
- }
- }
-
- if (ret_val == FPGA_SUCCESS) {
-#ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK
- printf ("Initialization of FPGA device %d complete\n", cookie);
-#endif
- /*
- * Run the post configuration function if there is one.
- */
- if (*fn->post) {
- (*fn->post) (cookie);
- }
- } else {
-#ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK
- printf ("** Initialization of FPGA device %d FAILED\n",
- cookie);
-#endif
- }
- } else {
- printf ("%s:%d: NULL Interface function table!\n",
- __FUNCTION__, __LINE__);
- }
- return ret_val;
-}
-
-/*
- * Read the FPGA configuration data
- */
-static int Virtex2_ssm_dump (Xilinx_desc * desc, void *buf, size_t bsize)
-{
- int ret_val = FPGA_FAIL;
- Xilinx_Virtex2_Slave_SelectMap_fns *fn = desc->iface_fns;
-
- if (fn) {
- unsigned char *data = (unsigned char *) buf;
- size_t bytecount = 0;
- int cookie = desc->cookie;
-
- printf ("Starting Dump of FPGA Device %d...\n", cookie);
-
- (*fn->cs) (TRUE, TRUE, cookie);
- (*fn->clk) (TRUE, TRUE, cookie);
-
- while (bytecount < bsize) {
-#ifdef CONFIG_SYS_FPGA_CHECK_CTRLC
- if (ctrlc ()) {
- (*fn->abort) (cookie);
- return FPGA_FAIL;
- }
-#endif
- /*
- * Cycle the clock and read the data
- */
- (*fn->clk) (FALSE, TRUE, cookie);
- (*fn->clk) (TRUE, TRUE, cookie);
- (*fn->rdata) (&(data[bytecount++]), cookie);
-#ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK
- if (bytecount % (bsize / 40) == 0)
- putc ('.');
-#endif
- }
-
- /*
- * Deassert CS_B and cycle the clock to deselect the device.
- */
- (*fn->cs) (FALSE, FALSE, cookie);
- (*fn->clk) (FALSE, TRUE, cookie);
- (*fn->clk) (TRUE, TRUE, cookie);
-
-#ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK
- putc ('\n');
-#endif
- puts ("Done.\n");
- } else {
- printf ("%s:%d: NULL Interface function table!\n",
- __FUNCTION__, __LINE__);
- }
- return ret_val;
-}
-
-/*
- * Relocate the addresses in the function table from FLASH (or ROM,
- * or whatever) to RAM.
- */
-static int Virtex2_ssm_reloc (Xilinx_desc * desc, ulong reloc_offset)
-{
- ulong addr;
- int ret_val = FPGA_FAIL;
- Xilinx_Virtex2_Slave_SelectMap_fns *fn_r, *fn =
- (Xilinx_Virtex2_Slave_SelectMap_fns *) (desc->iface_fns);
-
- if (fn) {
- /*
- * Get the relocated table address
- */
- addr = (ulong) fn + reloc_offset;
- fn_r = (Xilinx_Virtex2_Slave_SelectMap_fns *) addr;
-
- /*
- * Check to see if the table has already been relocated. If not, do
- * a sanity check to make sure there is a faithful copy of the
- * FLASH based function table in RAM, then adjust the table.
- */
- if (!fn_r->relocated) {
- if (memcmp
- (fn_r, fn, sizeof (Xilinx_Virtex2_Slave_SelectMap_fns))
- == 0) {
- desc->iface_fns = fn_r;
- } else {
- PRINTF ("%s:%d: Invalid function table at 0x%p\n",
- __FUNCTION__, __LINE__, fn_r);
- return FPGA_FAIL;
- }
-
- PRINTF ("%s:%d: Relocating descriptor at 0x%p\n",
- __FUNCTION__, __LINE__, desc);
-
- addr = (ulong) (fn->pre) + reloc_offset;
- fn_r->pre = (Xilinx_pre_fn) addr;
- addr = (ulong) (fn->pgm) + reloc_offset;
- fn_r->pgm = (Xilinx_pgm_fn) addr;
- addr = (ulong) (fn->init) + reloc_offset;
- fn_r->init = (Xilinx_init_fn) addr;
- addr = (ulong) (fn->done) + reloc_offset;
- fn_r->done = (Xilinx_done_fn) addr;
- addr = (ulong) (fn->err) + reloc_offset;
- fn_r->err = (Xilinx_err_fn) addr;
- addr = (ulong) (fn->clk) + reloc_offset;
- fn_r->clk = (Xilinx_clk_fn) addr;
- addr = (ulong) (fn->cs) + reloc_offset;
- fn_r->cs = (Xilinx_cs_fn) addr;
- addr = (ulong) (fn->wr) + reloc_offset;
- fn_r->wr = (Xilinx_wr_fn) addr;
- addr = (ulong) (fn->rdata) + reloc_offset;
- fn_r->rdata = (Xilinx_rdata_fn) addr;
- addr = (ulong) (fn->wdata) + reloc_offset;
- fn_r->wdata = (Xilinx_wdata_fn) addr;
- addr = (ulong) (fn->busy) + reloc_offset;
- fn_r->busy = (Xilinx_busy_fn) addr;
- addr = (ulong) (fn->abort) + reloc_offset;
- fn_r->abort = (Xilinx_abort_fn) addr;
- addr = (ulong) (fn->post) + reloc_offset;
- fn_r->post = (Xilinx_post_fn) addr;
- fn_r->relocated = TRUE;
- } else {
- printf ("%s:%d: Function table @0x%p has already been relocated\n", __FUNCTION__, __LINE__, fn_r);
- desc->iface_fns = fn_r;
- }
- ret_val = FPGA_SUCCESS;
- } else {
- printf ("%s: NULL Interface function table!\n", __FUNCTION__);
- }
- return ret_val;
-}
-
-static int Virtex2_ss_load (Xilinx_desc * desc, void *buf, size_t bsize)
-{
- printf ("%s: Slave Serial Loading is unsupported\n", __FUNCTION__);
- return FPGA_FAIL;
-}
-
-static int Virtex2_ss_dump (Xilinx_desc * desc, void *buf, size_t bsize)
-{
- printf ("%s: Slave Serial Dumping is unsupported\n", __FUNCTION__);
- return FPGA_FAIL;
-}
-
-static int Virtex2_ss_reloc (Xilinx_desc * desc, ulong reloc_offset)
-{
- int ret_val = FPGA_FAIL;
- Xilinx_Virtex2_Slave_Serial_fns *fn =
- (Xilinx_Virtex2_Slave_Serial_fns *) (desc->iface_fns);
-
- if (fn) {
- printf ("%s:%d: Slave Serial Loading is unsupported\n",
- __FUNCTION__, __LINE__);
- } else {
- printf ("%s:%d: NULL Interface function table!\n",
- __FUNCTION__, __LINE__);
- }
- return ret_val;
-}
-
-/* vim: set ts=4 tw=78: */
+++ /dev/null
-/*
- * (C) Copyright 2002
- * Rich Ireland, Enterasys Networks, rireland@enterasys.com.
- * Keith Outwater, keith_outwater@mvis.com
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- *
- */
-
-/*
- * Xilinx FPGA support
- */
-
-#include <common.h>
-#include <virtex2.h>
-#include <spartan2.h>
-#include <spartan3.h>
-
-#if 0
-#define FPGA_DEBUG
-#endif
-
-/* Define FPGA_DEBUG to get debug printf's */
-#ifdef FPGA_DEBUG
-#define PRINTF(fmt,args...) printf (fmt ,##args)
-#else
-#define PRINTF(fmt,args...)
-#endif
-
-/* Local Static Functions */
-static int xilinx_validate (Xilinx_desc * desc, char *fn);
-
-/* ------------------------------------------------------------------------- */
-
-int xilinx_load (Xilinx_desc * desc, void *buf, size_t bsize)
-{
- int ret_val = FPGA_FAIL; /* assume a failure */
-
- if (!xilinx_validate (desc, (char *)__FUNCTION__)) {
- printf ("%s: Invalid device descriptor\n", __FUNCTION__);
- } else
- switch (desc->family) {
- case Xilinx_Spartan2:
-#if defined(CONFIG_FPGA_SPARTAN2)
- PRINTF ("%s: Launching the Spartan-II Loader...\n",
- __FUNCTION__);
- ret_val = Spartan2_load (desc, buf, bsize);
-#else
- printf ("%s: No support for Spartan-II devices.\n",
- __FUNCTION__);
-#endif
- break;
- case Xilinx_Spartan3:
-#if defined(CONFIG_FPGA_SPARTAN3)
- PRINTF ("%s: Launching the Spartan-III Loader...\n",
- __FUNCTION__);
- ret_val = Spartan3_load (desc, buf, bsize);
-#else
- printf ("%s: No support for Spartan-III devices.\n",
- __FUNCTION__);
-#endif
- break;
- case Xilinx_Virtex2:
-#if defined(CONFIG_FPGA_VIRTEX2)
- PRINTF ("%s: Launching the Virtex-II Loader...\n",
- __FUNCTION__);
- ret_val = Virtex2_load (desc, buf, bsize);
-#else
- printf ("%s: No support for Virtex-II devices.\n",
- __FUNCTION__);
-#endif
- break;
-
- default:
- printf ("%s: Unsupported family type, %d\n",
- __FUNCTION__, desc->family);
- }
-
- return ret_val;
-}
-
-int xilinx_dump (Xilinx_desc * desc, void *buf, size_t bsize)
-{
- int ret_val = FPGA_FAIL; /* assume a failure */
-
- if (!xilinx_validate (desc, (char *)__FUNCTION__)) {
- printf ("%s: Invalid device descriptor\n", __FUNCTION__);
- } else
- switch (desc->family) {
- case Xilinx_Spartan2:
-#if defined(CONFIG_FPGA_SPARTAN2)
- PRINTF ("%s: Launching the Spartan-II Reader...\n",
- __FUNCTION__);
- ret_val = Spartan2_dump (desc, buf, bsize);
-#else
- printf ("%s: No support for Spartan-II devices.\n",
- __FUNCTION__);
-#endif
- break;
- case Xilinx_Spartan3:
-#if defined(CONFIG_FPGA_SPARTAN3)
- PRINTF ("%s: Launching the Spartan-III Reader...\n",
- __FUNCTION__);
- ret_val = Spartan3_dump (desc, buf, bsize);
-#else
- printf ("%s: No support for Spartan-III devices.\n",
- __FUNCTION__);
-#endif
- break;
- case Xilinx_Virtex2:
-#if defined( CONFIG_FPGA_VIRTEX2)
- PRINTF ("%s: Launching the Virtex-II Reader...\n",
- __FUNCTION__);
- ret_val = Virtex2_dump (desc, buf, bsize);
-#else
- printf ("%s: No support for Virtex-II devices.\n",
- __FUNCTION__);
-#endif
- break;
-
- default:
- printf ("%s: Unsupported family type, %d\n",
- __FUNCTION__, desc->family);
- }
-
- return ret_val;
-}
-
-int xilinx_info (Xilinx_desc * desc)
-{
- int ret_val = FPGA_FAIL;
-
- if (xilinx_validate (desc, (char *)__FUNCTION__)) {
- printf ("Family: \t");
- switch (desc->family) {
- case Xilinx_Spartan2:
- printf ("Spartan-II\n");
- break;
- case Xilinx_Spartan3:
- printf ("Spartan-III\n");
- break;
- case Xilinx_Virtex2:
- printf ("Virtex-II\n");
- break;
- /* Add new family types here */
- default:
- printf ("Unknown family type, %d\n", desc->family);
- }
-
- printf ("Interface type:\t");
- switch (desc->iface) {
- case slave_serial:
- printf ("Slave Serial\n");
- break;
- case master_serial: /* Not used */
- printf ("Master Serial\n");
- break;
- case slave_parallel:
- printf ("Slave Parallel\n");
- break;
- case jtag_mode: /* Not used */
- printf ("JTAG Mode\n");
- break;
- case slave_selectmap:
- printf ("Slave SelectMap Mode\n");
- break;
- case master_selectmap:
- printf ("Master SelectMap Mode\n");
- break;
- /* Add new interface types here */
- default:
- printf ("Unsupported interface type, %d\n", desc->iface);
- }
-
- printf ("Device Size: \t%d bytes\n"
- "Cookie: \t0x%x (%d)\n",
- desc->size, desc->cookie, desc->cookie);
-
- if (desc->iface_fns) {
- printf ("Device Function Table @ 0x%p\n", desc->iface_fns);
- switch (desc->family) {
- case Xilinx_Spartan2:
-#if defined(CONFIG_FPGA_SPARTAN2)
- Spartan2_info (desc);
-#else
- /* just in case */
- printf ("%s: No support for Spartan-II devices.\n",
- __FUNCTION__);
-#endif
- break;
- case Xilinx_Spartan3:
-#if defined(CONFIG_FPGA_SPARTAN3)
- Spartan3_info (desc);
-#else
- /* just in case */
- printf ("%s: No support for Spartan-III devices.\n",
- __FUNCTION__);
-#endif
- break;
- case Xilinx_Virtex2:
-#if defined(CONFIG_FPGA_VIRTEX2)
- Virtex2_info (desc);
-#else
- /* just in case */
- printf ("%s: No support for Virtex-II devices.\n",
- __FUNCTION__);
-#endif
- break;
- /* Add new family types here */
- default:
- /* we don't need a message here - we give one up above */
- ;
- }
- } else
- printf ("No Device Function Table.\n");
-
- ret_val = FPGA_SUCCESS;
- } else {
- printf ("%s: Invalid device descriptor\n", __FUNCTION__);
- }
-
- return ret_val;
-}
-
-int xilinx_reloc (Xilinx_desc * desc, ulong reloc_offset)
-{
- int ret_val = FPGA_FAIL; /* assume a failure */
-
- if (!xilinx_validate (desc, (char *)__FUNCTION__)) {
- printf ("%s: Invalid device descriptor\n", __FUNCTION__);
- } else
- switch (desc->family) {
- case Xilinx_Spartan2:
-#if defined(CONFIG_FPGA_SPARTAN2)
- ret_val = Spartan2_reloc (desc, reloc_offset);
-#else
- printf ("%s: No support for Spartan-II devices.\n",
- __FUNCTION__);
-#endif
- break;
- case Xilinx_Spartan3:
-#if defined(CONFIG_FPGA_SPARTAN3)
- ret_val = Spartan3_reloc (desc, reloc_offset);
-#else
- printf ("%s: No support for Spartan-III devices.\n",
- __FUNCTION__);
-#endif
- break;
- case Xilinx_Virtex2:
-#if defined(CONFIG_FPGA_VIRTEX2)
- ret_val = Virtex2_reloc (desc, reloc_offset);
-#else
- printf ("%s: No support for Virtex-II devices.\n",
- __FUNCTION__);
-#endif
- break;
- /* Add new family types here */
- default:
- printf ("%s: Unsupported family type, %d\n",
- __FUNCTION__, desc->family);
- }
-
- return ret_val;
-}
-
-
-/* ------------------------------------------------------------------------- */
-
-static int xilinx_validate (Xilinx_desc * desc, char *fn)
-{
- int ret_val = FALSE;
-
- if (desc) {
- if ((desc->family > min_xilinx_type) &&
- (desc->family < max_xilinx_type)) {
- if ((desc->iface > min_xilinx_iface_type) &&
- (desc->iface < max_xilinx_iface_type)) {
- if (desc->size) {
- ret_val = TRUE;
- } else
- printf ("%s: NULL part size\n", fn);
- } else
- printf ("%s: Invalid Interface type, %d\n",
- fn, desc->iface);
- } else
- printf ("%s: Invalid family type, %d\n", fn, desc->family);
- } else
- printf ("%s: NULL descriptor!\n", fn);
-
- return ret_val;
-}
#########################################################################
-CONFIG_SHELL := $(shell if [ -x "$$BASH" ]; then echo $$BASH; \
- else if [ -x /bin/bash ]; then echo /bin/bash; \
- else echo sh; fi ; fi)
-
ifeq ($(HOSTOS)-$(HOSTARCH),darwin-ppc)
HOSTCC = cc
else
#########################################################################
-export CONFIG_SHELL HPATH HOSTCC HOSTCFLAGS CROSS_COMPILE \
- AS LD CC CPP AR NM STRIP OBJCOPY OBJDUMP \
- MAKE
+export HPATH HOSTCC HOSTCFLAGS CROSS_COMPILE \
+ AS LD CC CPP AR NM STRIP OBJCOPY OBJDUMP MAKE
export TEXT_BASE PLATFORM_CPPFLAGS PLATFORM_RELFLAGS CPPFLAGS CFLAGS AFLAGS
#########################################################################
*/
#include <config.h>
#include <74xx_7xx.h>
+#include <timestamp.h>
#include <version.h>
#include <ppc_asm.tmpl>
.globl version_string
version_string:
.ascii U_BOOT_VERSION
- .ascii " (", __DATE__, " - ", __TIME__, ")"
+ .ascii " (", U_BOOT_DATE, " - ", U_BOOT_TIME, ")"
.ascii CONFIG_IDENT_STRING, "\0"
. = EXC_OFF_SYS_RESET
#include <asm/psr.h>
#include <asm/stack.h>
#include <asm/leon.h>
+#include <timestamp.h>
#include <version.h>
/* Entry for traps which jump to a programmer-specified trap handler. */
.globl version_string
version_string:
.ascii U_BOOT_VERSION
- .ascii " (", __DATE__, " - ", __TIME__, ")"
+ .ascii " (", U_BOOT_DATE, " - ", U_BOOT_TIME, ")"
.ascii CONFIG_IDENT_STRING, "\0"
.section ".text"
#include <asm/psr.h>
#include <asm/stack.h>
#include <asm/leon.h>
+#include <timestamp.h>
#include <version.h>
/* Entry for traps which jump to a programmer-specified trap handler. */
.globl version_string
version_string:
.ascii U_BOOT_VERSION
- .ascii " (", __DATE__, " - ", __TIME__, ")"
+ .ascii " (", U_BOOT_DATE, " - ", U_BOOT_TIME, ")"
.ascii CONFIG_IDENT_STRING, "\0"
.section ".text"
*/
#include <config.h>
+#include <timestamp.h>
#include "version.h"
#ifndef CONFIG_IDENT_STRING
.globl version_string
version_string:
.ascii U_BOOT_VERSION
- .ascii " (", __DATE__, " - ", __TIME__, ")"
+ .ascii " (", U_BOOT_DATE, " - ", U_BOOT_TIME, ")"
.ascii CONFIG_IDENT_STRING, "\0"
.align 4
*/
#include <config.h>
+#include <timestamp.h>
#include "version.h"
#ifndef CONFIG_IDENT_STRING
.globl version_string
version_string:
.ascii U_BOOT_VERSION
- .ascii " (", __DATE__, " - ", __TIME__, ")"
+ .ascii " (", U_BOOT_DATE, " - ", U_BOOT_TIME, ")"
.ascii CONFIG_IDENT_STRING, "\0"
.align 4
*/
#include <config.h>
+#include <timestamp.h>
#include "version.h"
#ifndef CONFIG_IDENT_STRING
.globl version_string
version_string:
.ascii U_BOOT_VERSION
- .ascii " (", __DATE__, " - ", __TIME__, ")"
+ .ascii " (", U_BOOT_DATE, " - ", U_BOOT_TIME, ")"
.ascii CONFIG_IDENT_STRING, "\0"
.align 4
*/
#include <config.h>
+#include <timestamp.h>
#include "version.h"
#ifndef CONFIG_IDENT_STRING
.globl version_string
version_string:
.ascii U_BOOT_VERSION
- .ascii " (", __DATE__, " - ", __TIME__, ")"
+ .ascii " (", U_BOOT_DATE, " - ", U_BOOT_TIME, ")"
.ascii CONFIG_IDENT_STRING, "\0"
.align 4
*/
#include <config.h>
+#include <timestamp.h>
#include "version.h"
#ifndef CONFIG_IDENT_STRING
.globl version_string
version_string:
.ascii U_BOOT_VERSION
- .ascii " (", __DATE__, " - ", __TIME__, ")"
+ .ascii " (", U_BOOT_DATE, " - ", U_BOOT_TIME, ")"
.ascii CONFIG_IDENT_STRING, "\0"
.align 4
*/
#include <config.h>
+#include <timestamp.h>
#include "version.h"
#ifndef CONFIG_IDENT_STRING
.globl version_string
version_string:
.ascii U_BOOT_VERSION
- .ascii " (", __DATE__, " - ", __TIME__, ")"
+ .ascii " (", U_BOOT_DATE, " - ", U_BOOT_TIME, ")"
.ascii CONFIG_IDENT_STRING, "\0"
.align 4
#include <config.h>
#include <mpc512x.h>
+#include <timestamp.h>
#include <version.h>
#define CONFIG_521X 1 /* needed for Linux kernel header files*/
.globl version_string
version_string:
.ascii U_BOOT_VERSION
- .ascii " (", __DATE__, " - ", __TIME__, ")"
+ .ascii " (", U_BOOT_DATE, " - ", U_BOOT_TIME, ")"
.ascii " ", CONFIG_IDENT_STRING, "\0"
/*
#include <config.h>
#include <mpc5xx.h>
+#include <timestamp.h>
#include <version.h>
#define CONFIG_5xx 1 /* needed for Linux kernel header files */
.globl version_string
version_string:
.ascii U_BOOT_VERSION
- .ascii " (", __DATE__, " - ", __TIME__, ")"
+ .ascii " (", U_BOOT_DATE, " - ", U_BOOT_TIME, ")"
.ascii CONFIG_IDENT_STRING, "\0"
. = EXC_OFF_SYS_RESET
*/
#include <config.h>
#include <mpc5xxx.h>
+#include <timestamp.h>
#include <version.h>
#define CONFIG_MPC5xxx 1 /* needed for Linux kernel header files */
.globl version_string
version_string:
.ascii U_BOOT_VERSION
- .ascii " (", __DATE__, " - ", __TIME__, ")"
+ .ascii " (", U_BOOT_DATE, " - ", U_BOOT_TIME, ")"
.ascii CONFIG_IDENT_STRING, "\0"
/*
*/
#include <config.h>
#include <mpc8220.h>
+#include <timestamp.h>
#include <version.h>
#define _LINUX_CONFIG_H 1 /* avoid reading Linux autoconf.h file */
.globl version_string
version_string:
.ascii U_BOOT_VERSION
- .ascii " (", __DATE__, " - ", __TIME__, ")"
+ .ascii " (", U_BOOT_DATE, " - ", U_BOOT_TIME, ")"
.ascii CONFIG_IDENT_STRING, "\0"
/*
*/
#include <config.h>
#include <mpc824x.h>
+#include <timestamp.h>
#include <version.h>
#define _LINUX_CONFIG_H 1 /* avoid reading Linux autoconf.h file */
.globl version_string
version_string:
.ascii U_BOOT_VERSION
- .ascii " (", __DATE__, " - ", __TIME__, ")"
+ .ascii " (", U_BOOT_DATE, " - ", U_BOOT_TIME, ")"
.ascii CONFIG_IDENT_STRING, "\0"
. = EXC_OFF_SYS_RESET
DECLARE_GLOBAL_DATA_PTR;
#if defined(CONFIG_I2C_MULTI_BUS)
-static unsigned int i2c_bus_num __attribute__ ((section ("data"))) = 0;
+static unsigned int i2c_bus_num __attribute__ ((section (".data"))) = 0;
#endif /* CONFIG_I2C_MULTI_BUS */
/* uSec to wait between polls of the i2c */
*/
#include <config.h>
#include <mpc8260.h>
+#include <timestamp.h>
#include <version.h>
#define CONFIG_8260 1 /* needed for Linux kernel header files */
.globl version_string
version_string:
.ascii U_BOOT_VERSION
- .ascii " (", __DATE__, " - ", __TIME__, ")"
+ .ascii " (", U_BOOT_DATE, " - ", U_BOOT_TIME, ")"
.ascii CONFIG_IDENT_STRING, "\0"
/*
#include <config.h>
#include <mpc83xx.h>
+#include <timestamp.h>
#include <version.h>
#define CONFIG_83XX 1 /* needed for Linux kernel header files*/
.globl version_string
version_string:
.ascii U_BOOT_VERSION
- .ascii " (", __DATE__, " - ", __TIME__, ")"
+ .ascii " (", U_BOOT_DATE, " - ", U_BOOT_TIME, ")"
.ascii " ", CONFIG_IDENT_STRING, "\0"
#include <config.h>
#include <mpc85xx.h>
+#include <timestamp.h>
#include <version.h>
#define _LINUX_CONFIG_H 1 /* avoid reading Linux autoconf.h file */
.globl version_string
version_string:
.ascii U_BOOT_VERSION
- .ascii " (", __DATE__, " - ", __TIME__, ")"
+ .ascii " (", U_BOOT_DATE, " - ", U_BOOT_TIME, ")"
.ascii CONFIG_IDENT_STRING, "\0"
.align 4
*/
#include <config.h>
#include <mpc86xx.h>
+#include <timestamp.h>
#include <version.h>
#include <ppc_asm.tmpl>
.globl version_string
version_string:
.ascii U_BOOT_VERSION
- .ascii " (", __DATE__, " - ", __TIME__, ")"
+ .ascii " (", U_BOOT_DATE, " - ", U_BOOT_TIME, ")"
.ascii CONFIG_IDENT_STRING, "\0"
. = EXC_OFF_SYS_RESET
*/
#include <config.h>
#include <mpc8xx.h>
+#include <timestamp.h>
#include <version.h>
#define CONFIG_8xx 1 /* needed for Linux kernel header files */
.globl version_string
version_string:
.ascii U_BOOT_VERSION
- .ascii " (", __DATE__, " - ", __TIME__, ")"
+ .ascii " (", U_BOOT_DATE, " - ", U_BOOT_TIME, ")"
.ascii CONFIG_IDENT_STRING, "\0"
. = EXC_OFF_SYS_RESET
#include <stdarg.h>
#include <common.h>
#include <config.h>
+#ifdef VIDEO_INFO
#include <version.h>
+#include <timestamp.h>
+#endif
#include <i2c.h>
#include <linux/types.h>
#include <devices.h>
easylogo_plot (VIDEO_LOGO_ADDR, screen, width, 0, 0);
#ifdef VIDEO_INFO
- sprintf (info, "%s (%s - %s) ", U_BOOT_VERSION, __DATE__, __TIME__);
+ sprintf (info, "%s (%s - %s) ",
+ U_BOOT_VERSION, U_BOOT_DATE, U_BOOT_TIME);
video_drawstring (VIDEO_INFO_X, VIDEO_INFO_Y, info);
sprintf (info, "(C) 2002 DENX Software Engineering");
#include <config.h>
+#include <timestamp.h>
#include <version.h>
#if !defined(CONFIG_IDENT_STRING)
version_string:
.ascii U_BOOT_VERSION
- .ascii " (", __DATE__, " - ", __TIME__, ")"
+ .ascii " (", U_BOOT_DATE, " - ", U_BOOT_TIME, ")"
.ascii CONFIG_IDENT_STRING, "\0"
#include <config.h>
+#include <timestamp.h>
#include <version.h>
/*************************************************************************
version_string:
.ascii U_BOOT_VERSION
- .ascii " (", __DATE__, " - ", __TIME__, ")"
+ .ascii " (", U_BOOT_DATE, " - ", U_BOOT_TIME, ")"
.ascii CONFIG_IDENT_STRING, "\0"
* runs from ROM, and we can't switch buses because we can't modify
* the global variables.
*/
-#ifdef CONFIG_SYS_SPD_BUS_NUM
-static unsigned int i2c_bus_num __attribute__ ((section ("data"))) = CONFIG_SYS_SPD_BUS_NUM;
-#else
-static unsigned int i2c_bus_num __attribute__ ((section ("data"))) = 0;
+#ifndef CONFIG_SYS_SPD_BUS_NUM
+#define CONFIG_SYS_SPD_BUS_NUM 0
#endif
+static unsigned int i2c_bus_num __attribute__ ((section (".data"))) = CONFIG_SYS_SPD_BUS_NUM;
#endif /* CONFIG_I2C_MULTI_BUS */
static void _i2c_bus_reset(void)
*/
#include <config.h>
#include <ppc4xx.h>
+#include <timestamp.h>
#include <version.h>
#define _LINUX_CONFIG_H 1 /* avoid reading Linux autoconf.h file */
.globl version_string
version_string:
.ascii U_BOOT_VERSION
- .ascii " (", __DATE__, " - ", __TIME__, ")"
+ .ascii " (", U_BOOT_DATE, " - ", U_BOOT_TIME, ")"
.ascii CONFIG_IDENT_STRING, "\0"
. = EXC_OFF_SYS_RESET
--- /dev/null
+/*
+ * (C) Copyright 2008
+ * Gary Jennejohn, DENX Software Engineering GmbH <garyj@denx.de>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+U-Boot console multiplexing
+===========================
+
+HOW CONSOLE MULTIPLEXING WORKS
+------------------------------
+
+This functionality is controlled with CONFIG_CONSOLE_MUX in the board
+configuration file.
+
+Two new files, common/iomux.c and include/iomux.h, contain the heart
+(iomux_doenv()) of the environment setting implementation.
+
+iomux_doenv() is called in common/cmd_nvedit.c to handle setenv and in
+common/console.c in console_init_r() during bootup to initialize
+stdio_devices[].
+
+A user can use a comma-separated list of devices to set stdin, stdout
+and stderr. For example: "setenv stdin serial,nc". NOTE: No spaces
+are allowed around the comma(s)!
+
+The length of the list is limited by malloc(), since the array used
+is allocated and freed dynamically.
+
+It should be possible to specify any device which console_assign()
+finds acceptable, but the code has only been tested with serial and
+nc.
+
+iomux_doenv() prevents multiple use of the same device, e.g. "setenv
+stdin nc,nc,serial" will discard the second nc. iomux_doenv() is
+not able to modify the environment, however, so that "pri stdin" still
+shows "nc,nc,serial".
+
+The major change in common/console.c was to modify fgetc() to call
+the iomux_tstc() routine in a for-loop. iomux_tstc() in turn calls
+the tstc() routine for every registered device, but exits immediately
+when one of them returns true. fgetc() then calls iomux_getc(),
+which calls the corresponding getc() routine. fgetc() hangs in
+the for-loop until iomux_tstc() returns true and the input can be
+retrieved.
+
+Thus, a user can type into any device registered for stdin. No effort
+has been made to demulitplex simultaneous input from multiple stdin
+devices.
+
+fputc() and fputs() have been modified to call iomux_putc() and
+iomux_puts() respectively, which call the corresponding output
+routines for every registered device.
+
+Thus, a user can see the ouput for any device registered for stdout
+or stderr on all devices registered for stdout or stderr. As an
+example, if stdin=serial,nc and stdout=serial,nc then all output
+for serial, e.g. echos of input on serial, will appear on serial and nc.
+
+Just as with the old console code, this statement is still true:
+If not defined in the environment, the first input device is assigned
+to the 'stdin' file, the first output one to 'stdout' and 'stderr'.
+
+If CONFIG_SYS_CONSOLE_IS_IN_ENV is defined then multiple input/output
+devices can be set at boot time if defined in the environment.
+
+CAVEATS
+-------
+
+Note that common/iomux.c calls console_assign() for every registered
+device as it is discovered. This means that the environment settings
+for application consoles will be set to the last device in the list.
+
+On a slow machine, such as MPC852T clocked at 66MHz, the overhead associated
+with calling tstc() and then getc() means that copy&paste will normally not
+work, even when stdin=stdout=stderr=serial.
+On a faster machine, such as a sequoia, cut&paste of longer (about 80
+characters) lines works fine when serial is the only device used.
+
+Using nc as a stdin device results in even more overhead because nc_tstc()
+is quite slow. Even on a sequoia cut&paste does not work on the serial
+interface when nc is added to stdin, although there is no character loss using
+the ethernet interface for input. In this test case stdin=serial,nc and
+stdout=serial.
+
+In addition, the overhead associated with sending to two devices, when one of
+them is nc, also causes problems. Even on a sequoia cut&paste does not work
+on the serial interface (stdin=serial) when nc is added to stdout (stdout=
+serial,nc).
$(shell mkdir -p $(obj)$(X86DIR))
-COBJS = atibios.o biosemu.o besys.o bios.o \
+COBJS-$(CONFIG_BIOSEMU) = atibios.o biosemu.o besys.o bios.o \
$(X86DIR)/decode.o \
$(X86DIR)/ops2.o \
$(X86DIR)/ops.o \
$(X86DIR)/sys.o \
$(X86DIR)/debug.o
+COBJS := $(COBJS-y)
SRCS := $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS))
* BIOS in u-boot.
****************************************************************************/
#include <common.h>
-
-#ifdef CONFIG_BIOSEMU
-
#include "biosemui.h"
#include <malloc.h>
*pVGAInfo = VGAInfo;
return true;
}
-
-#endif
****************************************************************************/
#include <common.h>
-
-#if defined(CONFIG_BIOSEMU)
-
#include "biosemui.h"
/*------------------------- Global Variables ------------------------------*/
#endif
LOG_outpd(port, val);
}
-#endif
****************************************************************************/
#include <common.h>
-
-#if defined(CONFIG_BIOSEMU)
-
#include "biosemui.h"
/*----------------------------- Implementation ----------------------------*/
bios_intr_tab[0x6D] = int10;
X86EMU_setupIntrFuncs(bios_intr_tab);
}
-#endif
#include <malloc.h>
#include <common.h>
-
-#if defined(CONFIG_BIOSEMU)
-
#include "biosemui.h"
BE_sysEnv _BE_env = {{0}};
sregs->gs = M.x86.R_GS;
return out->x.ax;
}
-#endif
#include <stdarg.h>
#include <common.h>
-
-#if defined(CONFIG_BIOSEMU)
-
#include "x86emu/x86emui.h"
/*----------------------------- Implementation ----------------------------*/
printk("NC ");
printk("\n");
}
-
-#endif
*
****************************************************************************/
#include <common.h>
-
-#if defined(CONFIG_BIOSEMU)
-
#include "x86emu/x86emui.h"
/*----------------------------- Implementation ----------------------------*/
return decode_rm01_address(rm);
return decode_rm10_address(rm);
}
-
-#endif
****************************************************************************/
#include <common.h>
-
-#if defined(CONFIG_BIOSEMU)
-
#include "x86emu/x86emui.h"
/*----------------------------- Implementation ----------------------------*/
/* 0xfe */ x86emuOp_opcFE_byte_RM,
/* 0xff */ x86emuOp_opcFF_word_RM,
};
-
-#endif
****************************************************************************/
#include <common.h>
-
-#if defined(CONFIG_BIOSEMU)
-
#include "x86emu/x86emui.h"
/*----------------------------- Implementation ----------------------------*/
/* 0xfe */ x86emuOp2_illegal_op,
/* 0xff */ x86emuOp2_illegal_op,
};
-
-#endif
#include <common.h>
#define PRIM_OPS_NO_REDEFINE_ASM
-
-#if defined(CONFIG_BIOSEMU)
-
#include "x86emu/x86emui.h"
/*------------------------- Global Variables ------------------------------*/
M.x86.R_SP += 4;
return res;
}
-
-#endif
****************************************************************************/
#include <common.h>
-
-#if defined(CONFIG_BIOSEMU)
-
#include "x86emu/x86emui.h"
/*------------------------- Global Variables ------------------------------*/
M.x86.R_IP = mem_access_word(num * 4);
M.x86.intr = 0;
}
-
-#endif
--- /dev/null
+/*
+ * (C) Copyright 2003
+ * Steven Scholz, imc Measurement & Control, steven.scholz@imc-berlin.de
+ *
+ * (C) Copyright 2002
+ * Rich Ireland, Enterasys Networks, rireland@enterasys.com.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ */
+
+#include <common.h> /* core U-Boot definitions */
+#include <ACEX1K.h> /* ACEX device family */
+
+/* Define FPGA_DEBUG to get debug printf's */
+#ifdef FPGA_DEBUG
+#define PRINTF(fmt,args...) printf (fmt ,##args)
+#else
+#define PRINTF(fmt,args...)
+#endif
+
+/* Note: The assumption is that we cannot possibly run fast enough to
+ * overrun the device (the Slave Parallel mode can free run at 50MHz).
+ * If there is a need to operate slower, define CONFIG_FPGA_DELAY in
+ * the board config file to slow things down.
+ */
+#ifndef CONFIG_FPGA_DELAY
+#define CONFIG_FPGA_DELAY()
+#endif
+
+#ifndef CONFIG_SYS_FPGA_WAIT
+#define CONFIG_SYS_FPGA_WAIT CONFIG_SYS_HZ/10 /* 100 ms */
+#endif
+
+static int ACEX1K_ps_load( Altera_desc *desc, void *buf, size_t bsize );
+static int ACEX1K_ps_dump( Altera_desc *desc, void *buf, size_t bsize );
+/* static int ACEX1K_ps_info( Altera_desc *desc ); */
+static int ACEX1K_ps_reloc( Altera_desc *desc, ulong reloc_offset );
+
+/* ------------------------------------------------------------------------- */
+/* ACEX1K Generic Implementation */
+int ACEX1K_load (Altera_desc * desc, void *buf, size_t bsize)
+{
+ int ret_val = FPGA_FAIL;
+
+ switch (desc->iface) {
+ case passive_serial:
+ PRINTF ("%s: Launching Passive Serial Loader\n", __FUNCTION__);
+ ret_val = ACEX1K_ps_load (desc, buf, bsize);
+ break;
+
+ /* Add new interface types here */
+
+ default:
+ printf ("%s: Unsupported interface type, %d\n",
+ __FUNCTION__, desc->iface);
+ }
+
+ return ret_val;
+}
+
+int ACEX1K_dump (Altera_desc * desc, void *buf, size_t bsize)
+{
+ int ret_val = FPGA_FAIL;
+
+ switch (desc->iface) {
+ case passive_serial:
+ PRINTF ("%s: Launching Passive Serial Dump\n", __FUNCTION__);
+ ret_val = ACEX1K_ps_dump (desc, buf, bsize);
+ break;
+
+ /* Add new interface types here */
+
+ default:
+ printf ("%s: Unsupported interface type, %d\n",
+ __FUNCTION__, desc->iface);
+ }
+
+ return ret_val;
+}
+
+int ACEX1K_info( Altera_desc *desc )
+{
+ return FPGA_SUCCESS;
+}
+
+
+int ACEX1K_reloc (Altera_desc * desc, ulong reloc_offset)
+{
+ int ret_val = FPGA_FAIL; /* assume a failure */
+
+ if (desc->family != Altera_ACEX1K) {
+ printf ("%s: Unsupported family type, %d\n",
+ __FUNCTION__, desc->family);
+ return FPGA_FAIL;
+ } else
+ switch (desc->iface) {
+ case passive_serial:
+ ret_val = ACEX1K_ps_reloc (desc, reloc_offset);
+ break;
+
+ /* Add new interface types here */
+
+ default:
+ printf ("%s: Unsupported interface type, %d\n",
+ __FUNCTION__, desc->iface);
+ }
+
+ return ret_val;
+}
+
+
+/* ------------------------------------------------------------------------- */
+/* ACEX1K Passive Serial Generic Implementation */
+
+static int ACEX1K_ps_load (Altera_desc * desc, void *buf, size_t bsize)
+{
+ int ret_val = FPGA_FAIL; /* assume the worst */
+ Altera_ACEX1K_Passive_Serial_fns *fn = desc->iface_fns;
+ int i;
+
+ PRINTF ("%s: start with interface functions @ 0x%p\n",
+ __FUNCTION__, fn);
+
+ if (fn) {
+ size_t bytecount = 0;
+ unsigned char *data = (unsigned char *) buf;
+ int cookie = desc->cookie; /* make a local copy */
+ unsigned long ts; /* timestamp */
+
+ PRINTF ("%s: Function Table:\n"
+ "ptr:\t0x%p\n"
+ "struct: 0x%p\n"
+ "config:\t0x%p\n"
+ "status:\t0x%p\n"
+ "clk:\t0x%p\n"
+ "data:\t0x%p\n"
+ "done:\t0x%p\n\n",
+ __FUNCTION__, &fn, fn, fn->config, fn->status,
+ fn->clk, fn->data, fn->done);
+#ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK
+ printf ("Loading FPGA Device %d...", cookie);
+#endif
+
+ /*
+ * Run the pre configuration function if there is one.
+ */
+ if (*fn->pre) {
+ (*fn->pre) (cookie);
+ }
+
+ /* Establish the initial state */
+ (*fn->config) (TRUE, TRUE, cookie); /* Assert nCONFIG */
+
+ udelay(2); /* T_cfg > 2us */
+
+ /* nSTATUS should be asserted now */
+ (*fn->done) (cookie);
+ if ( !(*fn->status) (cookie) ) {
+ puts ("** nSTATUS is not asserted.\n");
+ (*fn->abort) (cookie);
+ return FPGA_FAIL;
+ }
+
+ (*fn->config) (FALSE, TRUE, cookie); /* Deassert nCONFIG */
+ udelay(2); /* T_cf2st1 < 4us */
+
+ /* Wait for nSTATUS to be released (i.e. deasserted) */
+ ts = get_timer (0); /* get current time */
+ do {
+ CONFIG_FPGA_DELAY ();
+ if (get_timer (ts) > CONFIG_SYS_FPGA_WAIT) { /* check the time */
+ puts ("** Timeout waiting for STATUS to go high.\n");
+ (*fn->abort) (cookie);
+ return FPGA_FAIL;
+ }
+ (*fn->done) (cookie);
+ } while ((*fn->status) (cookie));
+
+ /* Get ready for the burn */
+ CONFIG_FPGA_DELAY ();
+
+ /* Load the data */
+ while (bytecount < bsize) {
+ unsigned char val=0;
+#ifdef CONFIG_SYS_FPGA_CHECK_CTRLC
+ if (ctrlc ()) {
+ (*fn->abort) (cookie);
+ return FPGA_FAIL;
+ }
+#endif
+ /* Altera detects an error if INIT goes low (active)
+ while DONE is low (inactive) */
+#if 0 /* not yet implemented */
+ if ((*fn->done) (cookie) == 0 && (*fn->init) (cookie)) {
+ puts ("** CRC error during FPGA load.\n");
+ (*fn->abort) (cookie);
+ return (FPGA_FAIL);
+ }
+#endif
+ val = data [bytecount ++ ];
+ i = 8;
+ do {
+ /* Deassert the clock */
+ (*fn->clk) (FALSE, TRUE, cookie);
+ CONFIG_FPGA_DELAY ();
+ /* Write data */
+ (*fn->data) ( (val & 0x01), TRUE, cookie);
+ CONFIG_FPGA_DELAY ();
+ /* Assert the clock */
+ (*fn->clk) (TRUE, TRUE, cookie);
+ CONFIG_FPGA_DELAY ();
+ val >>= 1;
+ i --;
+ } while (i > 0);
+
+#ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK
+ if (bytecount % (bsize / 40) == 0)
+ putc ('.'); /* let them know we are alive */
+#endif
+ }
+
+ CONFIG_FPGA_DELAY ();
+
+#ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK
+ putc (' '); /* terminate the dotted line */
+#endif
+
+ /*
+ * Checking FPGA's CONF_DONE signal - correctly booted ?
+ */
+
+ if ( ! (*fn->done) (cookie) ) {
+ puts ("** Booting failed! CONF_DONE is still deasserted.\n");
+ (*fn->abort) (cookie);
+ return (FPGA_FAIL);
+ }
+
+ /*
+ * "DCLK must be clocked an additional 10 times fpr ACEX 1K..."
+ */
+
+ for (i = 0; i < 12; i++) {
+ CONFIG_FPGA_DELAY ();
+ (*fn->clk) (TRUE, TRUE, cookie); /* Assert the clock pin */
+ CONFIG_FPGA_DELAY ();
+ (*fn->clk) (FALSE, TRUE, cookie); /* Deassert the clock pin */
+ }
+
+ ret_val = FPGA_SUCCESS;
+
+#ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK
+ if (ret_val == FPGA_SUCCESS) {
+ puts ("Done.\n");
+ }
+ else {
+ puts ("Fail.\n");
+ }
+#endif
+ (*fn->post) (cookie);
+
+ } else {
+ printf ("%s: NULL Interface function table!\n", __FUNCTION__);
+ }
+
+ return ret_val;
+}
+
+static int ACEX1K_ps_dump (Altera_desc * desc, void *buf, size_t bsize)
+{
+ /* Readback is only available through the Slave Parallel and */
+ /* boundary-scan interfaces. */
+ printf ("%s: Passive Serial Dumping is unavailable\n",
+ __FUNCTION__);
+ return FPGA_FAIL;
+}
+
+static int ACEX1K_ps_reloc (Altera_desc * desc, ulong reloc_offset)
+{
+ int ret_val = FPGA_FAIL; /* assume the worst */
+ Altera_ACEX1K_Passive_Serial_fns *fn_r, *fn =
+ (Altera_ACEX1K_Passive_Serial_fns *) (desc->iface_fns);
+
+ if (fn) {
+ ulong addr;
+
+ /* Get the relocated table address */
+ addr = (ulong) fn + reloc_offset;
+ fn_r = (Altera_ACEX1K_Passive_Serial_fns *) addr;
+
+ if (!fn_r->relocated) {
+
+ if (memcmp (fn_r, fn,
+ sizeof (Altera_ACEX1K_Passive_Serial_fns))
+ == 0) {
+ /* good copy of the table, fix the descriptor pointer */
+ desc->iface_fns = fn_r;
+ } else {
+ PRINTF ("%s: Invalid function table at 0x%p\n",
+ __FUNCTION__, fn_r);
+ return FPGA_FAIL;
+ }
+
+ PRINTF ("%s: Relocating descriptor at 0x%p\n", __FUNCTION__,
+ desc);
+
+ addr = (ulong) (fn->pre) + reloc_offset;
+ fn_r->pre = (Altera_pre_fn) addr;
+
+ addr = (ulong) (fn->config) + reloc_offset;
+ fn_r->config = (Altera_config_fn) addr;
+
+ addr = (ulong) (fn->status) + reloc_offset;
+ fn_r->status = (Altera_status_fn) addr;
+
+ addr = (ulong) (fn->done) + reloc_offset;
+ fn_r->done = (Altera_done_fn) addr;
+
+ addr = (ulong) (fn->clk) + reloc_offset;
+ fn_r->clk = (Altera_clk_fn) addr;
+
+ addr = (ulong) (fn->data) + reloc_offset;
+ fn_r->data = (Altera_data_fn) addr;
+
+ addr = (ulong) (fn->abort) + reloc_offset;
+ fn_r->abort = (Altera_abort_fn) addr;
+
+ addr = (ulong) (fn->post) + reloc_offset;
+ fn_r->post = (Altera_post_fn) addr;
+
+ fn_r->relocated = TRUE;
+
+ } else {
+ /* this table has already been moved */
+ /* XXX - should check to see if the descriptor is correct */
+ desc->iface_fns = fn_r;
+ }
+
+ ret_val = FPGA_SUCCESS;
+ } else {
+ printf ("%s: NULL Interface function table!\n", __FUNCTION__);
+ }
+
+ return ret_val;
+
+}
--- /dev/null
+#
+# (C) Copyright 2008
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB := $(obj)libfpga.a
+
+ifdef CONFIG_FPGA
+COBJS-y += fpga.o
+COBJS-$(CONFIG_FPGA_SPARTAN2) += spartan2.o
+COBJS-$(CONFIG_FPGA_SPARTAN3) += spartan3.o
+COBJS-$(CONFIG_FPGA_VIRTEX2) += virtex2.o
+COBJS-$(CONFIG_FPGA_XILINX) += xilinx.o
+ifdef CONFIG_FPGA_ALTERA
+COBJS-y += altera.o
+COBJS-$(CONFIG_FPGA_ACEX1K) += ACEX1K.o
+COBJS-$(CONFIG_FPGA_CYCLON2) += cyclon2.o
+COBJS-$(CONFIG_FPGA_STRATIX_II) += stratixII.o
+endif
+endif
+
+COBJS := $(COBJS-y)
+SRCS := $(COBJS:.o=.c)
+OBJS := $(addprefix $(obj),$(COBJS))
+
+all: $(LIB)
+
+$(LIB): $(obj).depend $(OBJS)
+ $(AR) $(ARFLAGS) $@ $(OBJS)
+
+#########################################################################
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################
--- /dev/null
+/*
+ * (C) Copyright 2003
+ * Steven Scholz, imc Measurement & Control, steven.scholz@imc-berlin.de
+ *
+ * (C) Copyright 2002
+ * Rich Ireland, Enterasys Networks, rireland@enterasys.com.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ */
+
+/*
+ * Altera FPGA support
+ */
+#include <common.h>
+#include <ACEX1K.h>
+#include <stratixII.h>
+
+/* Define FPGA_DEBUG to get debug printf's */
+/* #define FPGA_DEBUG */
+
+#ifdef FPGA_DEBUG
+#define PRINTF(fmt,args...) printf (fmt ,##args)
+#else
+#define PRINTF(fmt,args...)
+#endif
+
+/* Local Static Functions */
+static int altera_validate (Altera_desc * desc, const char *fn);
+
+/* ------------------------------------------------------------------------- */
+int altera_load( Altera_desc *desc, void *buf, size_t bsize )
+{
+ int ret_val = FPGA_FAIL; /* assume a failure */
+
+ if (!altera_validate (desc, (char *)__FUNCTION__)) {
+ printf ("%s: Invalid device descriptor\n", __FUNCTION__);
+ } else {
+ switch (desc->family) {
+ case Altera_ACEX1K:
+ case Altera_CYC2:
+#if defined(CONFIG_FPGA_ACEX1K)
+ PRINTF ("%s: Launching the ACEX1K Loader...\n",
+ __FUNCTION__);
+ ret_val = ACEX1K_load (desc, buf, bsize);
+#elif defined(CONFIG_FPGA_CYCLON2)
+ PRINTF ("%s: Launching the CYCLON II Loader...\n",
+ __FUNCTION__);
+ ret_val = CYC2_load (desc, buf, bsize);
+#else
+ printf ("%s: No support for ACEX1K devices.\n",
+ __FUNCTION__);
+#endif
+ break;
+
+#if defined(CONFIG_FPGA_STRATIX_II)
+ case Altera_StratixII:
+ PRINTF ("%s: Launching the Stratix II Loader...\n",
+ __FUNCTION__);
+ ret_val = StratixII_load (desc, buf, bsize);
+ break;
+#endif
+ default:
+ printf ("%s: Unsupported family type, %d\n",
+ __FUNCTION__, desc->family);
+ }
+ }
+
+ return ret_val;
+}
+
+int altera_dump( Altera_desc *desc, void *buf, size_t bsize )
+{
+ int ret_val = FPGA_FAIL; /* assume a failure */
+
+ if (!altera_validate (desc, (char *)__FUNCTION__)) {
+ printf ("%s: Invalid device descriptor\n", __FUNCTION__);
+ } else {
+ switch (desc->family) {
+ case Altera_ACEX1K:
+#if defined(CONFIG_FPGA_ACEX)
+ PRINTF ("%s: Launching the ACEX1K Reader...\n",
+ __FUNCTION__);
+ ret_val = ACEX1K_dump (desc, buf, bsize);
+#else
+ printf ("%s: No support for ACEX1K devices.\n",
+ __FUNCTION__);
+#endif
+ break;
+
+#if defined(CONFIG_FPGA_STRATIX_II)
+ case Altera_StratixII:
+ PRINTF ("%s: Launching the Stratix II Reader...\n",
+ __FUNCTION__);
+ ret_val = StratixII_dump (desc, buf, bsize);
+ break;
+#endif
+ default:
+ printf ("%s: Unsupported family type, %d\n",
+ __FUNCTION__, desc->family);
+ }
+ }
+
+ return ret_val;
+}
+
+int altera_info( Altera_desc *desc )
+{
+ int ret_val = FPGA_FAIL;
+
+ if (altera_validate (desc, (char *)__FUNCTION__)) {
+ printf ("Family: \t");
+ switch (desc->family) {
+ case Altera_ACEX1K:
+ printf ("ACEX1K\n");
+ break;
+ case Altera_CYC2:
+ printf ("CYCLON II\n");
+ break;
+ case Altera_StratixII:
+ printf ("Stratix II\n");
+ break;
+ /* Add new family types here */
+ default:
+ printf ("Unknown family type, %d\n", desc->family);
+ }
+
+ printf ("Interface type:\t");
+ switch (desc->iface) {
+ case passive_serial:
+ printf ("Passive Serial (PS)\n");
+ break;
+ case passive_parallel_synchronous:
+ printf ("Passive Parallel Synchronous (PPS)\n");
+ break;
+ case passive_parallel_asynchronous:
+ printf ("Passive Parallel Asynchronous (PPA)\n");
+ break;
+ case passive_serial_asynchronous:
+ printf ("Passive Serial Asynchronous (PSA)\n");
+ break;
+ case altera_jtag_mode: /* Not used */
+ printf ("JTAG Mode\n");
+ break;
+ case fast_passive_parallel:
+ printf ("Fast Passive Parallel (FPP)\n");
+ break;
+ case fast_passive_parallel_security:
+ printf
+ ("Fast Passive Parallel with Security (FPPS) \n");
+ break;
+ /* Add new interface types here */
+ default:
+ printf ("Unsupported interface type, %d\n", desc->iface);
+ }
+
+ printf ("Device Size: \t%d bytes\n"
+ "Cookie: \t0x%x (%d)\n",
+ desc->size, desc->cookie, desc->cookie);
+
+ if (desc->iface_fns) {
+ printf ("Device Function Table @ 0x%p\n", desc->iface_fns);
+ switch (desc->family) {
+ case Altera_ACEX1K:
+ case Altera_CYC2:
+#if defined(CONFIG_FPGA_ACEX1K)
+ ACEX1K_info (desc);
+#elif defined(CONFIG_FPGA_CYCLON2)
+ CYC2_info (desc);
+#else
+ /* just in case */
+ printf ("%s: No support for ACEX1K devices.\n",
+ __FUNCTION__);
+#endif
+ break;
+#if defined(CONFIG_FPGA_STRATIX_II)
+ case Altera_StratixII:
+ StratixII_info (desc);
+ break;
+#endif
+ /* Add new family types here */
+ default:
+ /* we don't need a message here - we give one up above */
+ break;
+ }
+ } else {
+ printf ("No Device Function Table.\n");
+ }
+
+ ret_val = FPGA_SUCCESS;
+ } else {
+ printf ("%s: Invalid device descriptor\n", __FUNCTION__);
+ }
+
+ return ret_val;
+}
+
+int altera_reloc( Altera_desc *desc, ulong reloc_offset)
+{
+ int ret_val = FPGA_FAIL; /* assume a failure */
+
+ if (!altera_validate (desc, (char *)__FUNCTION__)) {
+ printf ("%s: Invalid device descriptor\n", __FUNCTION__);
+ } else {
+ switch (desc->family) {
+ case Altera_ACEX1K:
+#if defined(CONFIG_FPGA_ACEX1K)
+ ret_val = ACEX1K_reloc (desc, reloc_offset);
+#else
+ printf ("%s: No support for ACEX devices.\n",
+ __FUNCTION__);
+#endif
+ break;
+#if defined(CONFIG_FPGA_STRATIX_II)
+ case Altera_StratixII:
+ ret_val = StratixII_reloc (desc, reloc_offset);
+ break;
+#endif
+ case Altera_CYC2:
+#if defined(CONFIG_FPGA_CYCLON2)
+ ret_val = CYC2_reloc (desc, reloc_offset);
+#else
+ printf ("%s: No support for CYCLON II devices.\n",
+ __FUNCTION__);
+#endif
+ break;
+ /* Add new family types here */
+ default:
+ printf ("%s: Unsupported family type, %d\n",
+ __FUNCTION__, desc->family);
+ }
+ }
+
+ return ret_val;
+}
+
+/* ------------------------------------------------------------------------- */
+
+static int altera_validate (Altera_desc * desc, const char *fn)
+{
+ int ret_val = FALSE;
+
+ if (desc) {
+ if ((desc->family > min_altera_type) &&
+ (desc->family < max_altera_type)) {
+ if ((desc->iface > min_altera_iface_type) &&
+ (desc->iface < max_altera_iface_type)) {
+ if (desc->size) {
+ ret_val = TRUE;
+ } else {
+ printf ("%s: NULL part size\n", fn);
+ }
+ } else {
+ printf ("%s: Invalid Interface type, %d\n",
+ fn, desc->iface);
+ }
+ } else {
+ printf ("%s: Invalid family type, %d\n", fn, desc->family);
+ }
+ } else {
+ printf ("%s: NULL descriptor!\n", fn);
+ }
+
+ return ret_val;
+}
+
+/* ------------------------------------------------------------------------- */
--- /dev/null
+/*
+ * (C) Copyright 2006
+ * Heiko Schocher, hs@denx.de
+ * Based on ACE1XK.c
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ */
+
+#include <common.h> /* core U-Boot definitions */
+#include <altera.h>
+#include <ACEX1K.h> /* ACEX device family */
+
+/* Define FPGA_DEBUG to get debug printf's */
+#ifdef FPGA_DEBUG
+#define PRINTF(fmt,args...) printf (fmt ,##args)
+#else
+#define PRINTF(fmt,args...)
+#endif
+
+/* Note: The assumption is that we cannot possibly run fast enough to
+ * overrun the device (the Slave Parallel mode can free run at 50MHz).
+ * If there is a need to operate slower, define CONFIG_FPGA_DELAY in
+ * the board config file to slow things down.
+ */
+#ifndef CONFIG_FPGA_DELAY
+#define CONFIG_FPGA_DELAY()
+#endif
+
+#ifndef CONFIG_SYS_FPGA_WAIT
+#define CONFIG_SYS_FPGA_WAIT CONFIG_SYS_HZ/10 /* 100 ms */
+#endif
+
+static int CYC2_ps_load( Altera_desc *desc, void *buf, size_t bsize );
+static int CYC2_ps_dump( Altera_desc *desc, void *buf, size_t bsize );
+/* static int CYC2_ps_info( Altera_desc *desc ); */
+static int CYC2_ps_reloc( Altera_desc *desc, ulong reloc_offset );
+
+/* ------------------------------------------------------------------------- */
+/* CYCLON2 Generic Implementation */
+int CYC2_load (Altera_desc * desc, void *buf, size_t bsize)
+{
+ int ret_val = FPGA_FAIL;
+
+ switch (desc->iface) {
+ case passive_serial:
+ PRINTF ("%s: Launching Passive Serial Loader\n", __FUNCTION__);
+ ret_val = CYC2_ps_load (desc, buf, bsize);
+ break;
+
+ /* Add new interface types here */
+
+ default:
+ printf ("%s: Unsupported interface type, %d\n",
+ __FUNCTION__, desc->iface);
+ }
+
+ return ret_val;
+}
+
+int CYC2_dump (Altera_desc * desc, void *buf, size_t bsize)
+{
+ int ret_val = FPGA_FAIL;
+
+ switch (desc->iface) {
+ case passive_serial:
+ PRINTF ("%s: Launching Passive Serial Dump\n", __FUNCTION__);
+ ret_val = CYC2_ps_dump (desc, buf, bsize);
+ break;
+
+ /* Add new interface types here */
+
+ default:
+ printf ("%s: Unsupported interface type, %d\n",
+ __FUNCTION__, desc->iface);
+ }
+
+ return ret_val;
+}
+
+int CYC2_info( Altera_desc *desc )
+{
+ return FPGA_SUCCESS;
+}
+
+int CYC2_reloc (Altera_desc * desc, ulong reloc_offset)
+{
+ int ret_val = FPGA_FAIL; /* assume a failure */
+
+ if (desc->family != Altera_CYC2) {
+ printf ("%s: Unsupported family type, %d\n",
+ __FUNCTION__, desc->family);
+ return FPGA_FAIL;
+ } else
+ switch (desc->iface) {
+ case passive_serial:
+ ret_val = CYC2_ps_reloc (desc, reloc_offset);
+ break;
+
+ /* Add new interface types here */
+
+ default:
+ printf ("%s: Unsupported interface type, %d\n",
+ __FUNCTION__, desc->iface);
+ }
+
+ return ret_val;
+}
+
+/* ------------------------------------------------------------------------- */
+/* CYCLON2 Passive Serial Generic Implementation */
+static int CYC2_ps_load (Altera_desc * desc, void *buf, size_t bsize)
+{
+ int ret_val = FPGA_FAIL; /* assume the worst */
+ Altera_CYC2_Passive_Serial_fns *fn = desc->iface_fns;
+ int ret = 0;
+
+ PRINTF ("%s: start with interface functions @ 0x%p\n",
+ __FUNCTION__, fn);
+
+ if (fn) {
+ int cookie = desc->cookie; /* make a local copy */
+ unsigned long ts; /* timestamp */
+
+ PRINTF ("%s: Function Table:\n"
+ "ptr:\t0x%p\n"
+ "struct: 0x%p\n"
+ "config:\t0x%p\n"
+ "status:\t0x%p\n"
+ "write:\t0x%p\n"
+ "done:\t0x%p\n\n",
+ __FUNCTION__, &fn, fn, fn->config, fn->status,
+ fn->write, fn->done);
+#ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK
+ printf ("Loading FPGA Device %d...", cookie);
+#endif
+
+ /*
+ * Run the pre configuration function if there is one.
+ */
+ if (*fn->pre) {
+ (*fn->pre) (cookie);
+ }
+
+ /* Establish the initial state */
+ (*fn->config) (TRUE, TRUE, cookie); /* Assert nCONFIG */
+
+ udelay(2); /* T_cfg > 2us */
+
+ /* Wait for nSTATUS to be asserted */
+ ts = get_timer (0); /* get current time */
+ do {
+ CONFIG_FPGA_DELAY ();
+ if (get_timer (ts) > CONFIG_SYS_FPGA_WAIT) { /* check the time */
+ puts ("** Timeout waiting for STATUS to go high.\n");
+ (*fn->abort) (cookie);
+ return FPGA_FAIL;
+ }
+ } while (!(*fn->status) (cookie));
+
+ /* Get ready for the burn */
+ CONFIG_FPGA_DELAY ();
+
+ ret = (*fn->write) (buf, bsize, TRUE, cookie);
+ if (ret) {
+ puts ("** Write failed.\n");
+ (*fn->abort) (cookie);
+ return FPGA_FAIL;
+ }
+#ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK
+ puts(" OK? ...");
+#endif
+
+ CONFIG_FPGA_DELAY ();
+
+#ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK
+ putc (' '); /* terminate the dotted line */
+#endif
+
+ /*
+ * Checking FPGA's CONF_DONE signal - correctly booted ?
+ */
+
+ if ( ! (*fn->done) (cookie) ) {
+ puts ("** Booting failed! CONF_DONE is still deasserted.\n");
+ (*fn->abort) (cookie);
+ return (FPGA_FAIL);
+ }
+#ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK
+ puts(" OK\n");
+#endif
+
+ ret_val = FPGA_SUCCESS;
+
+#ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK
+ if (ret_val == FPGA_SUCCESS) {
+ puts ("Done.\n");
+ }
+ else {
+ puts ("Fail.\n");
+ }
+#endif
+ (*fn->post) (cookie);
+
+ } else {
+ printf ("%s: NULL Interface function table!\n", __FUNCTION__);
+ }
+
+ return ret_val;
+}
+
+static int CYC2_ps_dump (Altera_desc * desc, void *buf, size_t bsize)
+{
+ /* Readback is only available through the Slave Parallel and */
+ /* boundary-scan interfaces. */
+ printf ("%s: Passive Serial Dumping is unavailable\n",
+ __FUNCTION__);
+ return FPGA_FAIL;
+}
+
+static int CYC2_ps_reloc (Altera_desc * desc, ulong reloc_offset)
+{
+ int ret_val = FPGA_FAIL; /* assume the worst */
+ Altera_CYC2_Passive_Serial_fns *fn_r, *fn =
+ (Altera_CYC2_Passive_Serial_fns *) (desc->iface_fns);
+
+ if (fn) {
+ ulong addr;
+
+ /* Get the relocated table address */
+ addr = (ulong) fn + reloc_offset;
+ fn_r = (Altera_CYC2_Passive_Serial_fns *) addr;
+
+ if (!fn_r->relocated) {
+
+ if (memcmp (fn_r, fn,
+ sizeof (Altera_CYC2_Passive_Serial_fns))
+ == 0) {
+ /* good copy of the table, fix the descriptor pointer */
+ desc->iface_fns = fn_r;
+ } else {
+ PRINTF ("%s: Invalid function table at 0x%p\n",
+ __FUNCTION__, fn_r);
+ return FPGA_FAIL;
+ }
+
+ PRINTF ("%s: Relocating descriptor at 0x%p\n", __FUNCTION__,
+ desc);
+
+ addr = (ulong) (fn->pre) + reloc_offset;
+ fn_r->pre = (Altera_pre_fn) addr;
+
+ addr = (ulong) (fn->config) + reloc_offset;
+ fn_r->config = (Altera_config_fn) addr;
+
+ addr = (ulong) (fn->status) + reloc_offset;
+ fn_r->status = (Altera_status_fn) addr;
+
+ addr = (ulong) (fn->done) + reloc_offset;
+ fn_r->done = (Altera_done_fn) addr;
+
+ addr = (ulong) (fn->write) + reloc_offset;
+ fn_r->write = (Altera_write_fn) addr;
+
+ addr = (ulong) (fn->abort) + reloc_offset;
+ fn_r->abort = (Altera_abort_fn) addr;
+
+ addr = (ulong) (fn->post) + reloc_offset;
+ fn_r->post = (Altera_post_fn) addr;
+
+ fn_r->relocated = TRUE;
+
+ } else {
+ /* this table has already been moved */
+ /* XXX - should check to see if the descriptor is correct */
+ desc->iface_fns = fn_r;
+ }
+
+ ret_val = FPGA_SUCCESS;
+ } else {
+ printf ("%s: NULL Interface function table!\n", __FUNCTION__);
+ }
+
+ return ret_val;
+}
--- /dev/null
+/*
+ * (C) Copyright 2002
+ * Rich Ireland, Enterasys Networks, rireland@enterasys.com.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ */
+
+/*
+ * Generic FPGA support
+ */
+#include <common.h> /* core U-Boot definitions */
+#include <xilinx.h> /* xilinx specific definitions */
+#include <altera.h> /* altera specific definitions */
+
+#if 0
+#define FPGA_DEBUG /* define FPGA_DEBUG to get debug messages */
+#endif
+
+/* Local definitions */
+#ifndef CONFIG_MAX_FPGA_DEVICES
+#define CONFIG_MAX_FPGA_DEVICES 5
+#endif
+
+/* Enable/Disable debug console messages */
+#ifdef FPGA_DEBUG
+#define PRINTF(fmt,args...) printf (fmt ,##args)
+#else
+#define PRINTF(fmt,args...)
+#endif
+
+/* Local static data */
+static ulong relocation_offset = 0;
+static int next_desc = FPGA_INVALID_DEVICE;
+static fpga_desc desc_table[CONFIG_MAX_FPGA_DEVICES];
+
+/* Local static functions */
+static __attribute__((__const__)) fpga_desc * __attribute__((__const__)) fpga_get_desc( int devnum );
+static __attribute__((__const__)) fpga_desc * __attribute__((__const__)) fpga_validate( int devnum, void *buf,
+ size_t bsize, char *fn );
+static int fpga_dev_info( int devnum );
+
+
+/* ------------------------------------------------------------------------- */
+
+/* fpga_no_sup
+ * 'no support' message function
+ */
+static void fpga_no_sup( char *fn, char *msg )
+{
+ if ( fn && msg ) {
+ printf( "%s: No support for %s.\n", fn, msg);
+ } else if ( msg ) {
+ printf( "No support for %s.\n", msg);
+ } else {
+ printf( "No FPGA suport!\n");
+ }
+}
+
+
+/* fpga_get_desc
+ * map a device number to a descriptor
+ */
+static __attribute__((__const__)) fpga_desc * __attribute__((__const__)) fpga_get_desc( int devnum )
+{
+ fpga_desc *desc = (fpga_desc * )NULL;
+
+ if (( devnum >= 0 ) && (devnum < next_desc )) {
+ desc = &desc_table[devnum];
+ PRINTF( "%s: found fpga descriptor #%d @ 0x%p\n",
+ __FUNCTION__, devnum, desc );
+ }
+
+ return desc;
+}
+
+
+/* fpga_validate
+ * generic parameter checking code
+ */
+static __attribute__((__const__)) fpga_desc * __attribute__((__const__)) fpga_validate( int devnum, void *buf,
+ size_t bsize, char *fn )
+{
+ fpga_desc * desc = fpga_get_desc( devnum );
+
+ if ( !desc ) {
+ printf( "%s: Invalid device number %d\n", fn, devnum );
+ }
+
+ if ( !buf ) {
+ printf( "%s: Null buffer.\n", fn );
+ return (fpga_desc * const)NULL;
+ }
+ return desc;
+}
+
+
+/* fpga_dev_info
+ * generic multiplexing code
+ */
+static int fpga_dev_info( int devnum )
+{
+ int ret_val = FPGA_FAIL; /* assume failure */
+ const fpga_desc * const desc = fpga_get_desc( devnum );
+
+ if ( desc ) {
+ PRINTF( "%s: Device Descriptor @ 0x%p\n",
+ __FUNCTION__, desc->devdesc );
+
+ switch ( desc->devtype ) {
+ case fpga_xilinx:
+#if defined(CONFIG_FPGA_XILINX)
+ printf( "Xilinx Device\nDescriptor @ 0x%p\n", desc );
+ ret_val = xilinx_info( desc->devdesc );
+#else
+ fpga_no_sup( (char *)__FUNCTION__, "Xilinx devices" );
+#endif
+ break;
+ case fpga_altera:
+#if defined(CONFIG_FPGA_ALTERA)
+ printf( "Altera Device\nDescriptor @ 0x%p\n", desc );
+ ret_val = altera_info( desc->devdesc );
+#else
+ fpga_no_sup( (char *)__FUNCTION__, "Altera devices" );
+#endif
+ break;
+ default:
+ printf( "%s: Invalid or unsupported device type %d\n",
+ __FUNCTION__, desc->devtype );
+ }
+ } else {
+ printf( "%s: Invalid device number %d\n",
+ __FUNCTION__, devnum );
+ }
+
+ return ret_val;
+}
+
+
+/* fpga_reloc
+ * generic multiplexing code
+ */
+int fpga_reloc( fpga_type devtype, void *desc, ulong reloc_off )
+{
+ int ret_val = FPGA_FAIL;
+
+ PRINTF( "%s: Relocating Device of type %d @ 0x%p with offset %lx\n",
+ __FUNCTION__, devtype, desc, reloc_off );
+
+ switch ( devtype ) {
+ case fpga_xilinx:
+#if defined(CONFIG_FPGA_XILINX)
+ ret_val = xilinx_reloc( desc, reloc_off );
+#else
+ fpga_no_sup( (char *)__FUNCTION__, "Xilinx devices" );
+#endif
+ break;
+ case fpga_altera:
+#if defined(CONFIG_FPGA_ALTERA)
+ ret_val = altera_reloc( desc, reloc_off );
+#else
+ fpga_no_sup( (char *)__FUNCTION__, "Altera devices" );
+#endif
+ break;
+ default:
+ printf( "%s: Invalid or unsupported device type %d\n",
+ __FUNCTION__, devtype );
+ }
+
+ return ret_val;
+}
+
+/* ------------------------------------------------------------------------- */
+/* fgpa_init is usually called from misc_init_r() and MUST be called
+ * before any of the other fpga functions are used.
+ */
+void fpga_init( ulong reloc_off )
+{
+ relocation_offset = reloc_off;
+ next_desc = 0;
+ memset( desc_table, 0, sizeof(desc_table));
+
+ PRINTF( "%s: CONFIG_FPGA = 0x%x\n", __FUNCTION__, CONFIG_FPGA );
+}
+
+/* fpga_count
+ * Basic interface function to get the current number of devices available.
+ */
+int fpga_count( void )
+{
+ return next_desc;
+}
+
+/* fpga_add
+ * Attempts to relocate the device/board specific interface code
+ * to the proper RAM locations and adds the device descriptor to
+ * the device table.
+ */
+int fpga_add( fpga_type devtype, void *desc )
+{
+ int devnum = FPGA_INVALID_DEVICE;
+
+ if ( next_desc < 0 ) {
+ printf( "%s: FPGA support not initialized!\n", __FUNCTION__ );
+ } else if (( devtype > fpga_min_type ) && ( devtype < fpga_undefined )) {
+ if ( desc ) {
+ if ( next_desc < CONFIG_MAX_FPGA_DEVICES ) {
+ if ( fpga_reloc( devtype, desc, relocation_offset )
+ == FPGA_SUCCESS ) {
+ devnum = next_desc;
+ desc_table[next_desc].devtype = devtype;
+ desc_table[next_desc++].devdesc = desc;
+ } else {
+ printf( "%s: Unable to relocate device interface table!\n",
+ __FUNCTION__ );
+ }
+ } else {
+ printf( "%s: Exceeded Max FPGA device count\n", __FUNCTION__ );
+ }
+ } else {
+ printf( "%s: NULL device descriptor\n", __FUNCTION__ );
+ }
+ } else {
+ printf( "%s: Unsupported FPGA type %d\n", __FUNCTION__, devtype );
+ }
+
+ return devnum;
+}
+
+/*
+ * Generic multiplexing code
+ */
+int fpga_load( int devnum, void *buf, size_t bsize )
+{
+ int ret_val = FPGA_FAIL; /* assume failure */
+ fpga_desc * desc = fpga_validate( devnum, buf, bsize, (char *)__FUNCTION__ );
+
+ if ( desc ) {
+ switch ( desc->devtype ) {
+ case fpga_xilinx:
+#if defined(CONFIG_FPGA_XILINX)
+ ret_val = xilinx_load( desc->devdesc, buf, bsize );
+#else
+ fpga_no_sup( (char *)__FUNCTION__, "Xilinx devices" );
+#endif
+ break;
+ case fpga_altera:
+#if defined(CONFIG_FPGA_ALTERA)
+ ret_val = altera_load( desc->devdesc, buf, bsize );
+#else
+ fpga_no_sup( (char *)__FUNCTION__, "Altera devices" );
+#endif
+ break;
+ default:
+ printf( "%s: Invalid or unsupported device type %d\n",
+ __FUNCTION__, desc->devtype );
+ }
+ }
+
+ return ret_val;
+}
+
+/* fpga_dump
+ * generic multiplexing code
+ */
+int fpga_dump( int devnum, void *buf, size_t bsize )
+{
+ int ret_val = FPGA_FAIL; /* assume failure */
+ fpga_desc * desc = fpga_validate( devnum, buf, bsize, (char *)__FUNCTION__ );
+
+ if ( desc ) {
+ switch ( desc->devtype ) {
+ case fpga_xilinx:
+#if defined(CONFIG_FPGA_XILINX)
+ ret_val = xilinx_dump( desc->devdesc, buf, bsize );
+#else
+ fpga_no_sup( (char *)__FUNCTION__, "Xilinx devices" );
+#endif
+ break;
+ case fpga_altera:
+#if defined(CONFIG_FPGA_ALTERA)
+ ret_val = altera_dump( desc->devdesc, buf, bsize );
+#else
+ fpga_no_sup( (char *)__FUNCTION__, "Altera devices" );
+#endif
+ break;
+ default:
+ printf( "%s: Invalid or unsupported device type %d\n",
+ __FUNCTION__, desc->devtype );
+ }
+ }
+
+ return ret_val;
+}
+
+
+/* fpga_info
+ * front end to fpga_dev_info. If devnum is invalid, report on all
+ * available devices.
+ */
+int fpga_info( int devnum )
+{
+ if ( devnum == FPGA_INVALID_DEVICE ) {
+ if ( next_desc > 0 ) {
+ int dev;
+
+ for ( dev = 0; dev < next_desc; dev++ ) {
+ fpga_dev_info( dev );
+ }
+ return FPGA_SUCCESS;
+ } else {
+ printf( "%s: No FPGA devices available.\n", __FUNCTION__ );
+ return FPGA_FAIL;
+ }
+ }
+ else return fpga_dev_info( devnum );
+}
+
+/* ------------------------------------------------------------------------- */
--- /dev/null
+/*
+ * (C) Copyright 2002
+ * Rich Ireland, Enterasys Networks, rireland@enterasys.com.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ */
+
+#include <common.h> /* core U-Boot definitions */
+#include <spartan2.h> /* Spartan-II device family */
+
+/* Define FPGA_DEBUG to get debug printf's */
+#ifdef FPGA_DEBUG
+#define PRINTF(fmt,args...) printf (fmt ,##args)
+#else
+#define PRINTF(fmt,args...)
+#endif
+
+#undef CONFIG_SYS_FPGA_CHECK_BUSY
+#undef CONFIG_SYS_FPGA_PROG_FEEDBACK
+
+/* Note: The assumption is that we cannot possibly run fast enough to
+ * overrun the device (the Slave Parallel mode can free run at 50MHz).
+ * If there is a need to operate slower, define CONFIG_FPGA_DELAY in
+ * the board config file to slow things down.
+ */
+#ifndef CONFIG_FPGA_DELAY
+#define CONFIG_FPGA_DELAY()
+#endif
+
+#ifndef CONFIG_SYS_FPGA_WAIT
+#define CONFIG_SYS_FPGA_WAIT CONFIG_SYS_HZ/100 /* 10 ms */
+#endif
+
+static int Spartan2_sp_load( Xilinx_desc *desc, void *buf, size_t bsize );
+static int Spartan2_sp_dump( Xilinx_desc *desc, void *buf, size_t bsize );
+/* static int Spartan2_sp_info( Xilinx_desc *desc ); */
+static int Spartan2_sp_reloc( Xilinx_desc *desc, ulong reloc_offset );
+
+static int Spartan2_ss_load( Xilinx_desc *desc, void *buf, size_t bsize );
+static int Spartan2_ss_dump( Xilinx_desc *desc, void *buf, size_t bsize );
+/* static int Spartan2_ss_info( Xilinx_desc *desc ); */
+static int Spartan2_ss_reloc( Xilinx_desc *desc, ulong reloc_offset );
+
+/* ------------------------------------------------------------------------- */
+/* Spartan-II Generic Implementation */
+int Spartan2_load (Xilinx_desc * desc, void *buf, size_t bsize)
+{
+ int ret_val = FPGA_FAIL;
+
+ switch (desc->iface) {
+ case slave_serial:
+ PRINTF ("%s: Launching Slave Serial Load\n", __FUNCTION__);
+ ret_val = Spartan2_ss_load (desc, buf, bsize);
+ break;
+
+ case slave_parallel:
+ PRINTF ("%s: Launching Slave Parallel Load\n", __FUNCTION__);
+ ret_val = Spartan2_sp_load (desc, buf, bsize);
+ break;
+
+ default:
+ printf ("%s: Unsupported interface type, %d\n",
+ __FUNCTION__, desc->iface);
+ }
+
+ return ret_val;
+}
+
+int Spartan2_dump (Xilinx_desc * desc, void *buf, size_t bsize)
+{
+ int ret_val = FPGA_FAIL;
+
+ switch (desc->iface) {
+ case slave_serial:
+ PRINTF ("%s: Launching Slave Serial Dump\n", __FUNCTION__);
+ ret_val = Spartan2_ss_dump (desc, buf, bsize);
+ break;
+
+ case slave_parallel:
+ PRINTF ("%s: Launching Slave Parallel Dump\n", __FUNCTION__);
+ ret_val = Spartan2_sp_dump (desc, buf, bsize);
+ break;
+
+ default:
+ printf ("%s: Unsupported interface type, %d\n",
+ __FUNCTION__, desc->iface);
+ }
+
+ return ret_val;
+}
+
+int Spartan2_info( Xilinx_desc *desc )
+{
+ return FPGA_SUCCESS;
+}
+
+
+int Spartan2_reloc (Xilinx_desc * desc, ulong reloc_offset)
+{
+ int ret_val = FPGA_FAIL; /* assume a failure */
+
+ if (desc->family != Xilinx_Spartan2) {
+ printf ("%s: Unsupported family type, %d\n",
+ __FUNCTION__, desc->family);
+ return FPGA_FAIL;
+ } else
+ switch (desc->iface) {
+ case slave_serial:
+ ret_val = Spartan2_ss_reloc (desc, reloc_offset);
+ break;
+
+ case slave_parallel:
+ ret_val = Spartan2_sp_reloc (desc, reloc_offset);
+ break;
+
+ default:
+ printf ("%s: Unsupported interface type, %d\n",
+ __FUNCTION__, desc->iface);
+ }
+
+ return ret_val;
+}
+
+
+/* ------------------------------------------------------------------------- */
+/* Spartan-II Slave Parallel Generic Implementation */
+
+static int Spartan2_sp_load (Xilinx_desc * desc, void *buf, size_t bsize)
+{
+ int ret_val = FPGA_FAIL; /* assume the worst */
+ Xilinx_Spartan2_Slave_Parallel_fns *fn = desc->iface_fns;
+
+ PRINTF ("%s: start with interface functions @ 0x%p\n",
+ __FUNCTION__, fn);
+
+ if (fn) {
+ size_t bytecount = 0;
+ unsigned char *data = (unsigned char *) buf;
+ int cookie = desc->cookie; /* make a local copy */
+ unsigned long ts; /* timestamp */
+
+ PRINTF ("%s: Function Table:\n"
+ "ptr:\t0x%p\n"
+ "struct: 0x%p\n"
+ "pre: 0x%p\n"
+ "pgm:\t0x%p\n"
+ "init:\t0x%p\n"
+ "err:\t0x%p\n"
+ "clk:\t0x%p\n"
+ "cs:\t0x%p\n"
+ "wr:\t0x%p\n"
+ "read data:\t0x%p\n"
+ "write data:\t0x%p\n"
+ "busy:\t0x%p\n"
+ "abort:\t0x%p\n",
+ "post:\t0x%p\n\n",
+ __FUNCTION__, &fn, fn, fn->pre, fn->pgm, fn->init, fn->err,
+ fn->clk, fn->cs, fn->wr, fn->rdata, fn->wdata, fn->busy,
+ fn->abort, fn->post);
+
+ /*
+ * This code is designed to emulate the "Express Style"
+ * Continuous Data Loading in Slave Parallel Mode for
+ * the Spartan-II Family.
+ */
+#ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK
+ printf ("Loading FPGA Device %d...\n", cookie);
+#endif
+ /*
+ * Run the pre configuration function if there is one.
+ */
+ if (*fn->pre) {
+ (*fn->pre) (cookie);
+ }
+
+ /* Establish the initial state */
+ (*fn->pgm) (TRUE, TRUE, cookie); /* Assert the program, commit */
+
+ /* Get ready for the burn */
+ CONFIG_FPGA_DELAY ();
+ (*fn->pgm) (FALSE, TRUE, cookie); /* Deassert the program, commit */
+
+ ts = get_timer (0); /* get current time */
+ /* Now wait for INIT and BUSY to go high */
+ do {
+ CONFIG_FPGA_DELAY ();
+ if (get_timer (ts) > CONFIG_SYS_FPGA_WAIT) { /* check the time */
+ puts ("** Timeout waiting for INIT to clear.\n");
+ (*fn->abort) (cookie); /* abort the burn */
+ return FPGA_FAIL;
+ }
+ } while ((*fn->init) (cookie) && (*fn->busy) (cookie));
+
+ (*fn->wr) (TRUE, TRUE, cookie); /* Assert write, commit */
+ (*fn->cs) (TRUE, TRUE, cookie); /* Assert chip select, commit */
+ (*fn->clk) (TRUE, TRUE, cookie); /* Assert the clock pin */
+
+ /* Load the data */
+ while (bytecount < bsize) {
+ /* XXX - do we check for an Ctrl-C press in here ??? */
+ /* XXX - Check the error bit? */
+
+ (*fn->wdata) (data[bytecount++], TRUE, cookie); /* write the data */
+ CONFIG_FPGA_DELAY ();
+ (*fn->clk) (FALSE, TRUE, cookie); /* Deassert the clock pin */
+ CONFIG_FPGA_DELAY ();
+ (*fn->clk) (TRUE, TRUE, cookie); /* Assert the clock pin */
+
+#ifdef CONFIG_SYS_FPGA_CHECK_BUSY
+ ts = get_timer (0); /* get current time */
+ while ((*fn->busy) (cookie)) {
+ /* XXX - we should have a check in here somewhere to
+ * make sure we aren't busy forever... */
+
+ CONFIG_FPGA_DELAY ();
+ (*fn->clk) (FALSE, TRUE, cookie); /* Deassert the clock pin */
+ CONFIG_FPGA_DELAY ();
+ (*fn->clk) (TRUE, TRUE, cookie); /* Assert the clock pin */
+
+ if (get_timer (ts) > CONFIG_SYS_FPGA_WAIT) { /* check the time */
+ puts ("** Timeout waiting for BUSY to clear.\n");
+ (*fn->abort) (cookie); /* abort the burn */
+ return FPGA_FAIL;
+ }
+ }
+#endif
+
+#ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK
+ if (bytecount % (bsize / 40) == 0)
+ putc ('.'); /* let them know we are alive */
+#endif
+ }
+
+ CONFIG_FPGA_DELAY ();
+ (*fn->cs) (FALSE, TRUE, cookie); /* Deassert the chip select */
+ (*fn->wr) (FALSE, TRUE, cookie); /* Deassert the write pin */
+
+#ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK
+ putc ('\n'); /* terminate the dotted line */
+#endif
+
+ /* now check for done signal */
+ ts = get_timer (0); /* get current time */
+ ret_val = FPGA_SUCCESS;
+ while ((*fn->done) (cookie) == FPGA_FAIL) {
+ /* XXX - we should have a check in here somewhere to
+ * make sure we aren't busy forever... */
+
+ CONFIG_FPGA_DELAY ();
+ (*fn->clk) (FALSE, TRUE, cookie); /* Deassert the clock pin */
+ CONFIG_FPGA_DELAY ();
+ (*fn->clk) (TRUE, TRUE, cookie); /* Assert the clock pin */
+
+ if (get_timer (ts) > CONFIG_SYS_FPGA_WAIT) { /* check the time */
+ puts ("** Timeout waiting for DONE to clear.\n");
+ (*fn->abort) (cookie); /* abort the burn */
+ ret_val = FPGA_FAIL;
+ break;
+ }
+ }
+
+ if (ret_val == FPGA_SUCCESS) {
+#ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK
+ puts ("Done.\n");
+#endif
+ }
+ /*
+ * Run the post configuration function if there is one.
+ */
+ if (*fn->post) {
+ (*fn->post) (cookie);
+ }
+
+ else {
+#ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK
+ puts ("Fail.\n");
+#endif
+ }
+
+ } else {
+ printf ("%s: NULL Interface function table!\n", __FUNCTION__);
+ }
+
+ return ret_val;
+}
+
+static int Spartan2_sp_dump (Xilinx_desc * desc, void *buf, size_t bsize)
+{
+ int ret_val = FPGA_FAIL; /* assume the worst */
+ Xilinx_Spartan2_Slave_Parallel_fns *fn = desc->iface_fns;
+
+ if (fn) {
+ unsigned char *data = (unsigned char *) buf;
+ size_t bytecount = 0;
+ int cookie = desc->cookie; /* make a local copy */
+
+ printf ("Starting Dump of FPGA Device %d...\n", cookie);
+
+ (*fn->cs) (TRUE, TRUE, cookie); /* Assert chip select, commit */
+ (*fn->clk) (TRUE, TRUE, cookie); /* Assert the clock pin */
+
+ /* dump the data */
+ while (bytecount < bsize) {
+ /* XXX - do we check for an Ctrl-C press in here ??? */
+
+ (*fn->clk) (FALSE, TRUE, cookie); /* Deassert the clock pin */
+ (*fn->clk) (TRUE, TRUE, cookie); /* Assert the clock pin */
+ (*fn->rdata) (&(data[bytecount++]), cookie); /* read the data */
+#ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK
+ if (bytecount % (bsize / 40) == 0)
+ putc ('.'); /* let them know we are alive */
+#endif
+ }
+
+ (*fn->cs) (FALSE, FALSE, cookie); /* Deassert the chip select */
+ (*fn->clk) (FALSE, TRUE, cookie); /* Deassert the clock pin */
+ (*fn->clk) (TRUE, TRUE, cookie); /* Assert the clock pin */
+
+#ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK
+ putc ('\n'); /* terminate the dotted line */
+#endif
+ puts ("Done.\n");
+
+ /* XXX - checksum the data? */
+ } else {
+ printf ("%s: NULL Interface function table!\n", __FUNCTION__);
+ }
+
+ return ret_val;
+}
+
+
+static int Spartan2_sp_reloc (Xilinx_desc * desc, ulong reloc_offset)
+{
+ int ret_val = FPGA_FAIL; /* assume the worst */
+ Xilinx_Spartan2_Slave_Parallel_fns *fn_r, *fn =
+ (Xilinx_Spartan2_Slave_Parallel_fns *) (desc->iface_fns);
+
+ if (fn) {
+ ulong addr;
+
+ /* Get the relocated table address */
+ addr = (ulong) fn + reloc_offset;
+ fn_r = (Xilinx_Spartan2_Slave_Parallel_fns *) addr;
+
+ if (!fn_r->relocated) {
+
+ if (memcmp (fn_r, fn,
+ sizeof (Xilinx_Spartan2_Slave_Parallel_fns))
+ == 0) {
+ /* good copy of the table, fix the descriptor pointer */
+ desc->iface_fns = fn_r;
+ } else {
+ PRINTF ("%s: Invalid function table at 0x%p\n",
+ __FUNCTION__, fn_r);
+ return FPGA_FAIL;
+ }
+
+ PRINTF ("%s: Relocating descriptor at 0x%p\n", __FUNCTION__,
+ desc);
+
+ addr = (ulong) (fn->pre) + reloc_offset;
+ fn_r->pre = (Xilinx_pre_fn) addr;
+
+ addr = (ulong) (fn->pgm) + reloc_offset;
+ fn_r->pgm = (Xilinx_pgm_fn) addr;
+
+ addr = (ulong) (fn->init) + reloc_offset;
+ fn_r->init = (Xilinx_init_fn) addr;
+
+ addr = (ulong) (fn->done) + reloc_offset;
+ fn_r->done = (Xilinx_done_fn) addr;
+
+ addr = (ulong) (fn->clk) + reloc_offset;
+ fn_r->clk = (Xilinx_clk_fn) addr;
+
+ addr = (ulong) (fn->err) + reloc_offset;
+ fn_r->err = (Xilinx_err_fn) addr;
+
+ addr = (ulong) (fn->cs) + reloc_offset;
+ fn_r->cs = (Xilinx_cs_fn) addr;
+
+ addr = (ulong) (fn->wr) + reloc_offset;
+ fn_r->wr = (Xilinx_wr_fn) addr;
+
+ addr = (ulong) (fn->rdata) + reloc_offset;
+ fn_r->rdata = (Xilinx_rdata_fn) addr;
+
+ addr = (ulong) (fn->wdata) + reloc_offset;
+ fn_r->wdata = (Xilinx_wdata_fn) addr;
+
+ addr = (ulong) (fn->busy) + reloc_offset;
+ fn_r->busy = (Xilinx_busy_fn) addr;
+
+ addr = (ulong) (fn->abort) + reloc_offset;
+ fn_r->abort = (Xilinx_abort_fn) addr;
+
+ addr = (ulong) (fn->post) + reloc_offset;
+ fn_r->post = (Xilinx_post_fn) addr;
+
+ fn_r->relocated = TRUE;
+
+ } else {
+ /* this table has already been moved */
+ /* XXX - should check to see if the descriptor is correct */
+ desc->iface_fns = fn_r;
+ }
+
+ ret_val = FPGA_SUCCESS;
+ } else {
+ printf ("%s: NULL Interface function table!\n", __FUNCTION__);
+ }
+
+ return ret_val;
+
+}
+
+/* ------------------------------------------------------------------------- */
+
+static int Spartan2_ss_load (Xilinx_desc * desc, void *buf, size_t bsize)
+{
+ int ret_val = FPGA_FAIL; /* assume the worst */
+ Xilinx_Spartan2_Slave_Serial_fns *fn = desc->iface_fns;
+ int i;
+ unsigned char val;
+
+ PRINTF ("%s: start with interface functions @ 0x%p\n",
+ __FUNCTION__, fn);
+
+ if (fn) {
+ size_t bytecount = 0;
+ unsigned char *data = (unsigned char *) buf;
+ int cookie = desc->cookie; /* make a local copy */
+ unsigned long ts; /* timestamp */
+
+ PRINTF ("%s: Function Table:\n"
+ "ptr:\t0x%p\n"
+ "struct: 0x%p\n"
+ "pgm:\t0x%p\n"
+ "init:\t0x%p\n"
+ "clk:\t0x%p\n"
+ "wr:\t0x%p\n"
+ "done:\t0x%p\n\n",
+ __FUNCTION__, &fn, fn, fn->pgm, fn->init,
+ fn->clk, fn->wr, fn->done);
+#ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK
+ printf ("Loading FPGA Device %d...\n", cookie);
+#endif
+
+ /*
+ * Run the pre configuration function if there is one.
+ */
+ if (*fn->pre) {
+ (*fn->pre) (cookie);
+ }
+
+ /* Establish the initial state */
+ (*fn->pgm) (TRUE, TRUE, cookie); /* Assert the program, commit */
+
+ /* Wait for INIT state (init low) */
+ ts = get_timer (0); /* get current time */
+ do {
+ CONFIG_FPGA_DELAY ();
+ if (get_timer (ts) > CONFIG_SYS_FPGA_WAIT) { /* check the time */
+ puts ("** Timeout waiting for INIT to start.\n");
+ return FPGA_FAIL;
+ }
+ } while (!(*fn->init) (cookie));
+
+ /* Get ready for the burn */
+ CONFIG_FPGA_DELAY ();
+ (*fn->pgm) (FALSE, TRUE, cookie); /* Deassert the program, commit */
+
+ ts = get_timer (0); /* get current time */
+ /* Now wait for INIT to go high */
+ do {
+ CONFIG_FPGA_DELAY ();
+ if (get_timer (ts) > CONFIG_SYS_FPGA_WAIT) { /* check the time */
+ puts ("** Timeout waiting for INIT to clear.\n");
+ return FPGA_FAIL;
+ }
+ } while ((*fn->init) (cookie));
+
+ /* Load the data */
+ while (bytecount < bsize) {
+
+ /* Xilinx detects an error if INIT goes low (active)
+ while DONE is low (inactive) */
+ if ((*fn->done) (cookie) == 0 && (*fn->init) (cookie)) {
+ puts ("** CRC error during FPGA load.\n");
+ return (FPGA_FAIL);
+ }
+ val = data [bytecount ++];
+ i = 8;
+ do {
+ /* Deassert the clock */
+ (*fn->clk) (FALSE, TRUE, cookie);
+ CONFIG_FPGA_DELAY ();
+ /* Write data */
+ (*fn->wr) ((val & 0x80), TRUE, cookie);
+ CONFIG_FPGA_DELAY ();
+ /* Assert the clock */
+ (*fn->clk) (TRUE, TRUE, cookie);
+ CONFIG_FPGA_DELAY ();
+ val <<= 1;
+ i --;
+ } while (i > 0);
+
+#ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK
+ if (bytecount % (bsize / 40) == 0)
+ putc ('.'); /* let them know we are alive */
+#endif
+ }
+
+ CONFIG_FPGA_DELAY ();
+
+#ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK
+ putc ('\n'); /* terminate the dotted line */
+#endif
+
+ /* now check for done signal */
+ ts = get_timer (0); /* get current time */
+ ret_val = FPGA_SUCCESS;
+ (*fn->wr) (TRUE, TRUE, cookie);
+
+ while (! (*fn->done) (cookie)) {
+ /* XXX - we should have a check in here somewhere to
+ * make sure we aren't busy forever... */
+
+ CONFIG_FPGA_DELAY ();
+ (*fn->clk) (FALSE, TRUE, cookie); /* Deassert the clock pin */
+ CONFIG_FPGA_DELAY ();
+ (*fn->clk) (TRUE, TRUE, cookie); /* Assert the clock pin */
+
+ putc ('*');
+
+ if (get_timer (ts) > CONFIG_SYS_FPGA_WAIT) { /* check the time */
+ puts ("** Timeout waiting for DONE to clear.\n");
+ ret_val = FPGA_FAIL;
+ break;
+ }
+ }
+ putc ('\n'); /* terminate the dotted line */
+
+ /*
+ * Run the post configuration function if there is one.
+ */
+ if (*fn->post) {
+ (*fn->post) (cookie);
+ }
+
+#ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK
+ if (ret_val == FPGA_SUCCESS) {
+ puts ("Done.\n");
+ }
+ else {
+ puts ("Fail.\n");
+ }
+#endif
+
+ } else {
+ printf ("%s: NULL Interface function table!\n", __FUNCTION__);
+ }
+
+ return ret_val;
+}
+
+static int Spartan2_ss_dump (Xilinx_desc * desc, void *buf, size_t bsize)
+{
+ /* Readback is only available through the Slave Parallel and */
+ /* boundary-scan interfaces. */
+ printf ("%s: Slave Serial Dumping is unavailable\n",
+ __FUNCTION__);
+ return FPGA_FAIL;
+}
+
+static int Spartan2_ss_reloc (Xilinx_desc * desc, ulong reloc_offset)
+{
+ int ret_val = FPGA_FAIL; /* assume the worst */
+ Xilinx_Spartan2_Slave_Serial_fns *fn_r, *fn =
+ (Xilinx_Spartan2_Slave_Serial_fns *) (desc->iface_fns);
+
+ if (fn) {
+ ulong addr;
+
+ /* Get the relocated table address */
+ addr = (ulong) fn + reloc_offset;
+ fn_r = (Xilinx_Spartan2_Slave_Serial_fns *) addr;
+
+ if (!fn_r->relocated) {
+
+ if (memcmp (fn_r, fn,
+ sizeof (Xilinx_Spartan2_Slave_Serial_fns))
+ == 0) {
+ /* good copy of the table, fix the descriptor pointer */
+ desc->iface_fns = fn_r;
+ } else {
+ PRINTF ("%s: Invalid function table at 0x%p\n",
+ __FUNCTION__, fn_r);
+ return FPGA_FAIL;
+ }
+
+ PRINTF ("%s: Relocating descriptor at 0x%p\n", __FUNCTION__,
+ desc);
+
+ if (fn->pre) {
+ addr = (ulong) (fn->pre) + reloc_offset;
+ fn_r->pre = (Xilinx_pre_fn) addr;
+ }
+
+ addr = (ulong) (fn->pgm) + reloc_offset;
+ fn_r->pgm = (Xilinx_pgm_fn) addr;
+
+ addr = (ulong) (fn->init) + reloc_offset;
+ fn_r->init = (Xilinx_init_fn) addr;
+
+ addr = (ulong) (fn->done) + reloc_offset;
+ fn_r->done = (Xilinx_done_fn) addr;
+
+ addr = (ulong) (fn->clk) + reloc_offset;
+ fn_r->clk = (Xilinx_clk_fn) addr;
+
+ addr = (ulong) (fn->wr) + reloc_offset;
+ fn_r->wr = (Xilinx_wr_fn) addr;
+
+ if (fn->post) {
+ addr = (ulong) (fn->post) + reloc_offset;
+ fn_r->post = (Xilinx_post_fn) addr;
+ }
+
+ fn_r->relocated = TRUE;
+
+ } else {
+ /* this table has already been moved */
+ /* XXX - should check to see if the descriptor is correct */
+ desc->iface_fns = fn_r;
+ }
+
+ ret_val = FPGA_SUCCESS;
+ } else {
+ printf ("%s: NULL Interface function table!\n", __FUNCTION__);
+ }
+
+ return ret_val;
+
+}
--- /dev/null
+/*
+ * (C) Copyright 2002
+ * Rich Ireland, Enterasys Networks, rireland@enterasys.com.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ */
+
+/*
+ * Configuration support for Xilinx Spartan3 devices. Based
+ * on spartan2.c (Rich Ireland, rireland@enterasys.com).
+ */
+
+#include <common.h> /* core U-Boot definitions */
+#include <spartan3.h> /* Spartan-II device family */
+
+/* Define FPGA_DEBUG to get debug printf's */
+#ifdef FPGA_DEBUG
+#define PRINTF(fmt,args...) printf (fmt ,##args)
+#else
+#define PRINTF(fmt,args...)
+#endif
+
+#undef CONFIG_SYS_FPGA_CHECK_BUSY
+#undef CONFIG_SYS_FPGA_PROG_FEEDBACK
+
+/* Note: The assumption is that we cannot possibly run fast enough to
+ * overrun the device (the Slave Parallel mode can free run at 50MHz).
+ * If there is a need to operate slower, define CONFIG_FPGA_DELAY in
+ * the board config file to slow things down.
+ */
+#ifndef CONFIG_FPGA_DELAY
+#define CONFIG_FPGA_DELAY()
+#endif
+
+#ifndef CONFIG_SYS_FPGA_WAIT
+#define CONFIG_SYS_FPGA_WAIT CONFIG_SYS_HZ/100 /* 10 ms */
+#endif
+
+static int Spartan3_sp_load( Xilinx_desc *desc, void *buf, size_t bsize );
+static int Spartan3_sp_dump( Xilinx_desc *desc, void *buf, size_t bsize );
+/* static int Spartan3_sp_info( Xilinx_desc *desc ); */
+static int Spartan3_sp_reloc( Xilinx_desc *desc, ulong reloc_offset );
+
+static int Spartan3_ss_load( Xilinx_desc *desc, void *buf, size_t bsize );
+static int Spartan3_ss_dump( Xilinx_desc *desc, void *buf, size_t bsize );
+/* static int Spartan3_ss_info( Xilinx_desc *desc ); */
+static int Spartan3_ss_reloc( Xilinx_desc *desc, ulong reloc_offset );
+
+/* ------------------------------------------------------------------------- */
+/* Spartan-II Generic Implementation */
+int Spartan3_load (Xilinx_desc * desc, void *buf, size_t bsize)
+{
+ int ret_val = FPGA_FAIL;
+
+ switch (desc->iface) {
+ case slave_serial:
+ PRINTF ("%s: Launching Slave Serial Load\n", __FUNCTION__);
+ ret_val = Spartan3_ss_load (desc, buf, bsize);
+ break;
+
+ case slave_parallel:
+ PRINTF ("%s: Launching Slave Parallel Load\n", __FUNCTION__);
+ ret_val = Spartan3_sp_load (desc, buf, bsize);
+ break;
+
+ default:
+ printf ("%s: Unsupported interface type, %d\n",
+ __FUNCTION__, desc->iface);
+ }
+
+ return ret_val;
+}
+
+int Spartan3_dump (Xilinx_desc * desc, void *buf, size_t bsize)
+{
+ int ret_val = FPGA_FAIL;
+
+ switch (desc->iface) {
+ case slave_serial:
+ PRINTF ("%s: Launching Slave Serial Dump\n", __FUNCTION__);
+ ret_val = Spartan3_ss_dump (desc, buf, bsize);
+ break;
+
+ case slave_parallel:
+ PRINTF ("%s: Launching Slave Parallel Dump\n", __FUNCTION__);
+ ret_val = Spartan3_sp_dump (desc, buf, bsize);
+ break;
+
+ default:
+ printf ("%s: Unsupported interface type, %d\n",
+ __FUNCTION__, desc->iface);
+ }
+
+ return ret_val;
+}
+
+int Spartan3_info( Xilinx_desc *desc )
+{
+ return FPGA_SUCCESS;
+}
+
+
+int Spartan3_reloc (Xilinx_desc * desc, ulong reloc_offset)
+{
+ int ret_val = FPGA_FAIL; /* assume a failure */
+
+ if (desc->family != Xilinx_Spartan3) {
+ printf ("%s: Unsupported family type, %d\n",
+ __FUNCTION__, desc->family);
+ return FPGA_FAIL;
+ } else
+ switch (desc->iface) {
+ case slave_serial:
+ ret_val = Spartan3_ss_reloc (desc, reloc_offset);
+ break;
+
+ case slave_parallel:
+ ret_val = Spartan3_sp_reloc (desc, reloc_offset);
+ break;
+
+ default:
+ printf ("%s: Unsupported interface type, %d\n",
+ __FUNCTION__, desc->iface);
+ }
+
+ return ret_val;
+}
+
+
+/* ------------------------------------------------------------------------- */
+/* Spartan-II Slave Parallel Generic Implementation */
+
+static int Spartan3_sp_load (Xilinx_desc * desc, void *buf, size_t bsize)
+{
+ int ret_val = FPGA_FAIL; /* assume the worst */
+ Xilinx_Spartan3_Slave_Parallel_fns *fn = desc->iface_fns;
+
+ PRINTF ("%s: start with interface functions @ 0x%p\n",
+ __FUNCTION__, fn);
+
+ if (fn) {
+ size_t bytecount = 0;
+ unsigned char *data = (unsigned char *) buf;
+ int cookie = desc->cookie; /* make a local copy */
+ unsigned long ts; /* timestamp */
+
+ PRINTF ("%s: Function Table:\n"
+ "ptr:\t0x%p\n"
+ "struct: 0x%p\n"
+ "pre: 0x%p\n"
+ "pgm:\t0x%p\n"
+ "init:\t0x%p\n"
+ "err:\t0x%p\n"
+ "clk:\t0x%p\n"
+ "cs:\t0x%p\n"
+ "wr:\t0x%p\n"
+ "read data:\t0x%p\n"
+ "write data:\t0x%p\n"
+ "busy:\t0x%p\n"
+ "abort:\t0x%p\n",
+ "post:\t0x%p\n\n",
+ __FUNCTION__, &fn, fn, fn->pre, fn->pgm, fn->init, fn->err,
+ fn->clk, fn->cs, fn->wr, fn->rdata, fn->wdata, fn->busy,
+ fn->abort, fn->post);
+
+ /*
+ * This code is designed to emulate the "Express Style"
+ * Continuous Data Loading in Slave Parallel Mode for
+ * the Spartan-II Family.
+ */
+#ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK
+ printf ("Loading FPGA Device %d...\n", cookie);
+#endif
+ /*
+ * Run the pre configuration function if there is one.
+ */
+ if (*fn->pre) {
+ (*fn->pre) (cookie);
+ }
+
+ /* Establish the initial state */
+ (*fn->pgm) (TRUE, TRUE, cookie); /* Assert the program, commit */
+
+ /* Get ready for the burn */
+ CONFIG_FPGA_DELAY ();
+ (*fn->pgm) (FALSE, TRUE, cookie); /* Deassert the program, commit */
+
+ ts = get_timer (0); /* get current time */
+ /* Now wait for INIT and BUSY to go high */
+ do {
+ CONFIG_FPGA_DELAY ();
+ if (get_timer (ts) > CONFIG_SYS_FPGA_WAIT) { /* check the time */
+ puts ("** Timeout waiting for INIT to clear.\n");
+ (*fn->abort) (cookie); /* abort the burn */
+ return FPGA_FAIL;
+ }
+ } while ((*fn->init) (cookie) && (*fn->busy) (cookie));
+
+ (*fn->wr) (TRUE, TRUE, cookie); /* Assert write, commit */
+ (*fn->cs) (TRUE, TRUE, cookie); /* Assert chip select, commit */
+ (*fn->clk) (TRUE, TRUE, cookie); /* Assert the clock pin */
+
+ /* Load the data */
+ while (bytecount < bsize) {
+ /* XXX - do we check for an Ctrl-C press in here ??? */
+ /* XXX - Check the error bit? */
+
+ (*fn->wdata) (data[bytecount++], TRUE, cookie); /* write the data */
+ CONFIG_FPGA_DELAY ();
+ (*fn->clk) (FALSE, TRUE, cookie); /* Deassert the clock pin */
+ CONFIG_FPGA_DELAY ();
+ (*fn->clk) (TRUE, TRUE, cookie); /* Assert the clock pin */
+
+#ifdef CONFIG_SYS_FPGA_CHECK_BUSY
+ ts = get_timer (0); /* get current time */
+ while ((*fn->busy) (cookie)) {
+ /* XXX - we should have a check in here somewhere to
+ * make sure we aren't busy forever... */
+
+ CONFIG_FPGA_DELAY ();
+ (*fn->clk) (FALSE, TRUE, cookie); /* Deassert the clock pin */
+ CONFIG_FPGA_DELAY ();
+ (*fn->clk) (TRUE, TRUE, cookie); /* Assert the clock pin */
+
+ if (get_timer (ts) > CONFIG_SYS_FPGA_WAIT) { /* check the time */
+ puts ("** Timeout waiting for BUSY to clear.\n");
+ (*fn->abort) (cookie); /* abort the burn */
+ return FPGA_FAIL;
+ }
+ }
+#endif
+
+#ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK
+ if (bytecount % (bsize / 40) == 0)
+ putc ('.'); /* let them know we are alive */
+#endif
+ }
+
+ CONFIG_FPGA_DELAY ();
+ (*fn->cs) (FALSE, TRUE, cookie); /* Deassert the chip select */
+ (*fn->wr) (FALSE, TRUE, cookie); /* Deassert the write pin */
+
+#ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK
+ putc ('\n'); /* terminate the dotted line */
+#endif
+
+ /* now check for done signal */
+ ts = get_timer (0); /* get current time */
+ ret_val = FPGA_SUCCESS;
+ while ((*fn->done) (cookie) == FPGA_FAIL) {
+ /* XXX - we should have a check in here somewhere to
+ * make sure we aren't busy forever... */
+
+ CONFIG_FPGA_DELAY ();
+ (*fn->clk) (FALSE, TRUE, cookie); /* Deassert the clock pin */
+ CONFIG_FPGA_DELAY ();
+ (*fn->clk) (TRUE, TRUE, cookie); /* Assert the clock pin */
+
+ if (get_timer (ts) > CONFIG_SYS_FPGA_WAIT) { /* check the time */
+ puts ("** Timeout waiting for DONE to clear.\n");
+ (*fn->abort) (cookie); /* abort the burn */
+ ret_val = FPGA_FAIL;
+ break;
+ }
+ }
+
+ if (ret_val == FPGA_SUCCESS) {
+#ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK
+ puts ("Done.\n");
+#endif
+ }
+ /*
+ * Run the post configuration function if there is one.
+ */
+ if (*fn->post) {
+ (*fn->post) (cookie);
+ }
+
+ else {
+#ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK
+ puts ("Fail.\n");
+#endif
+ }
+
+ } else {
+ printf ("%s: NULL Interface function table!\n", __FUNCTION__);
+ }
+
+ return ret_val;
+}
+
+static int Spartan3_sp_dump (Xilinx_desc * desc, void *buf, size_t bsize)
+{
+ int ret_val = FPGA_FAIL; /* assume the worst */
+ Xilinx_Spartan3_Slave_Parallel_fns *fn = desc->iface_fns;
+
+ if (fn) {
+ unsigned char *data = (unsigned char *) buf;
+ size_t bytecount = 0;
+ int cookie = desc->cookie; /* make a local copy */
+
+ printf ("Starting Dump of FPGA Device %d...\n", cookie);
+
+ (*fn->cs) (TRUE, TRUE, cookie); /* Assert chip select, commit */
+ (*fn->clk) (TRUE, TRUE, cookie); /* Assert the clock pin */
+
+ /* dump the data */
+ while (bytecount < bsize) {
+ /* XXX - do we check for an Ctrl-C press in here ??? */
+
+ (*fn->clk) (FALSE, TRUE, cookie); /* Deassert the clock pin */
+ (*fn->clk) (TRUE, TRUE, cookie); /* Assert the clock pin */
+ (*fn->rdata) (&(data[bytecount++]), cookie); /* read the data */
+#ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK
+ if (bytecount % (bsize / 40) == 0)
+ putc ('.'); /* let them know we are alive */
+#endif
+ }
+
+ (*fn->cs) (FALSE, FALSE, cookie); /* Deassert the chip select */
+ (*fn->clk) (FALSE, TRUE, cookie); /* Deassert the clock pin */
+ (*fn->clk) (TRUE, TRUE, cookie); /* Assert the clock pin */
+
+#ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK
+ putc ('\n'); /* terminate the dotted line */
+#endif
+ puts ("Done.\n");
+
+ /* XXX - checksum the data? */
+ } else {
+ printf ("%s: NULL Interface function table!\n", __FUNCTION__);
+ }
+
+ return ret_val;
+}
+
+
+static int Spartan3_sp_reloc (Xilinx_desc * desc, ulong reloc_offset)
+{
+ int ret_val = FPGA_FAIL; /* assume the worst */
+ Xilinx_Spartan3_Slave_Parallel_fns *fn_r, *fn =
+ (Xilinx_Spartan3_Slave_Parallel_fns *) (desc->iface_fns);
+
+ if (fn) {
+ ulong addr;
+
+ /* Get the relocated table address */
+ addr = (ulong) fn + reloc_offset;
+ fn_r = (Xilinx_Spartan3_Slave_Parallel_fns *) addr;
+
+ if (!fn_r->relocated) {
+
+ if (memcmp (fn_r, fn,
+ sizeof (Xilinx_Spartan3_Slave_Parallel_fns))
+ == 0) {
+ /* good copy of the table, fix the descriptor pointer */
+ desc->iface_fns = fn_r;
+ } else {
+ PRINTF ("%s: Invalid function table at 0x%p\n",
+ __FUNCTION__, fn_r);
+ return FPGA_FAIL;
+ }
+
+ PRINTF ("%s: Relocating descriptor at 0x%p\n", __FUNCTION__,
+ desc);
+
+ addr = (ulong) (fn->pre) + reloc_offset;
+ fn_r->pre = (Xilinx_pre_fn) addr;
+
+ addr = (ulong) (fn->pgm) + reloc_offset;
+ fn_r->pgm = (Xilinx_pgm_fn) addr;
+
+ addr = (ulong) (fn->init) + reloc_offset;
+ fn_r->init = (Xilinx_init_fn) addr;
+
+ addr = (ulong) (fn->done) + reloc_offset;
+ fn_r->done = (Xilinx_done_fn) addr;
+
+ addr = (ulong) (fn->clk) + reloc_offset;
+ fn_r->clk = (Xilinx_clk_fn) addr;
+
+ addr = (ulong) (fn->err) + reloc_offset;
+ fn_r->err = (Xilinx_err_fn) addr;
+
+ addr = (ulong) (fn->cs) + reloc_offset;
+ fn_r->cs = (Xilinx_cs_fn) addr;
+
+ addr = (ulong) (fn->wr) + reloc_offset;
+ fn_r->wr = (Xilinx_wr_fn) addr;
+
+ addr = (ulong) (fn->rdata) + reloc_offset;
+ fn_r->rdata = (Xilinx_rdata_fn) addr;
+
+ addr = (ulong) (fn->wdata) + reloc_offset;
+ fn_r->wdata = (Xilinx_wdata_fn) addr;
+
+ addr = (ulong) (fn->busy) + reloc_offset;
+ fn_r->busy = (Xilinx_busy_fn) addr;
+
+ addr = (ulong) (fn->abort) + reloc_offset;
+ fn_r->abort = (Xilinx_abort_fn) addr;
+
+ addr = (ulong) (fn->post) + reloc_offset;
+ fn_r->post = (Xilinx_post_fn) addr;
+
+ fn_r->relocated = TRUE;
+
+ } else {
+ /* this table has already been moved */
+ /* XXX - should check to see if the descriptor is correct */
+ desc->iface_fns = fn_r;
+ }
+
+ ret_val = FPGA_SUCCESS;
+ } else {
+ printf ("%s: NULL Interface function table!\n", __FUNCTION__);
+ }
+
+ return ret_val;
+
+}
+
+/* ------------------------------------------------------------------------- */
+
+static int Spartan3_ss_load (Xilinx_desc * desc, void *buf, size_t bsize)
+{
+ int ret_val = FPGA_FAIL; /* assume the worst */
+ Xilinx_Spartan3_Slave_Serial_fns *fn = desc->iface_fns;
+ int i;
+ unsigned char val;
+
+ PRINTF ("%s: start with interface functions @ 0x%p\n",
+ __FUNCTION__, fn);
+
+ if (fn) {
+ size_t bytecount = 0;
+ unsigned char *data = (unsigned char *) buf;
+ int cookie = desc->cookie; /* make a local copy */
+ unsigned long ts; /* timestamp */
+
+ PRINTF ("%s: Function Table:\n"
+ "ptr:\t0x%p\n"
+ "struct: 0x%p\n"
+ "pgm:\t0x%p\n"
+ "init:\t0x%p\n"
+ "clk:\t0x%p\n"
+ "wr:\t0x%p\n"
+ "done:\t0x%p\n\n",
+ __FUNCTION__, &fn, fn, fn->pgm, fn->init,
+ fn->clk, fn->wr, fn->done);
+#ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK
+ printf ("Loading FPGA Device %d...\n", cookie);
+#endif
+
+ /*
+ * Run the pre configuration function if there is one.
+ */
+ if (*fn->pre) {
+ (*fn->pre) (cookie);
+ }
+
+ /* Establish the initial state */
+ (*fn->pgm) (TRUE, TRUE, cookie); /* Assert the program, commit */
+
+ /* Wait for INIT state (init low) */
+ ts = get_timer (0); /* get current time */
+ do {
+ CONFIG_FPGA_DELAY ();
+ if (get_timer (ts) > CONFIG_SYS_FPGA_WAIT) { /* check the time */
+ puts ("** Timeout waiting for INIT to start.\n");
+ return FPGA_FAIL;
+ }
+ } while (!(*fn->init) (cookie));
+
+ /* Get ready for the burn */
+ CONFIG_FPGA_DELAY ();
+ (*fn->pgm) (FALSE, TRUE, cookie); /* Deassert the program, commit */
+
+ ts = get_timer (0); /* get current time */
+ /* Now wait for INIT to go high */
+ do {
+ CONFIG_FPGA_DELAY ();
+ if (get_timer (ts) > CONFIG_SYS_FPGA_WAIT) { /* check the time */
+ puts ("** Timeout waiting for INIT to clear.\n");
+ return FPGA_FAIL;
+ }
+ } while ((*fn->init) (cookie));
+
+ /* Load the data */
+ while (bytecount < bsize) {
+
+ /* Xilinx detects an error if INIT goes low (active)
+ while DONE is low (inactive) */
+ if ((*fn->done) (cookie) == 0 && (*fn->init) (cookie)) {
+ puts ("** CRC error during FPGA load.\n");
+ return (FPGA_FAIL);
+ }
+ val = data [bytecount ++];
+ i = 8;
+ do {
+ /* Deassert the clock */
+ (*fn->clk) (FALSE, TRUE, cookie);
+ CONFIG_FPGA_DELAY ();
+ /* Write data */
+ (*fn->wr) ((val & 0x80), TRUE, cookie);
+ CONFIG_FPGA_DELAY ();
+ /* Assert the clock */
+ (*fn->clk) (TRUE, TRUE, cookie);
+ CONFIG_FPGA_DELAY ();
+ val <<= 1;
+ i --;
+ } while (i > 0);
+
+#ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK
+ if (bytecount % (bsize / 40) == 0)
+ putc ('.'); /* let them know we are alive */
+#endif
+ }
+
+ CONFIG_FPGA_DELAY ();
+
+#ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK
+ putc ('\n'); /* terminate the dotted line */
+#endif
+
+ /* now check for done signal */
+ ts = get_timer (0); /* get current time */
+ ret_val = FPGA_SUCCESS;
+ (*fn->wr) (TRUE, TRUE, cookie);
+
+ while (! (*fn->done) (cookie)) {
+ /* XXX - we should have a check in here somewhere to
+ * make sure we aren't busy forever... */
+
+ CONFIG_FPGA_DELAY ();
+ (*fn->clk) (FALSE, TRUE, cookie); /* Deassert the clock pin */
+ CONFIG_FPGA_DELAY ();
+ (*fn->clk) (TRUE, TRUE, cookie); /* Assert the clock pin */
+
+ putc ('*');
+
+ if (get_timer (ts) > CONFIG_SYS_FPGA_WAIT) { /* check the time */
+ puts ("** Timeout waiting for DONE to clear.\n");
+ ret_val = FPGA_FAIL;
+ break;
+ }
+ }
+ putc ('\n'); /* terminate the dotted line */
+
+ /*
+ * Run the post configuration function if there is one.
+ */
+ if (*fn->post) {
+ (*fn->post) (cookie);
+ }
+
+#ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK
+ if (ret_val == FPGA_SUCCESS) {
+ puts ("Done.\n");
+ }
+ else {
+ puts ("Fail.\n");
+ }
+#endif
+
+ } else {
+ printf ("%s: NULL Interface function table!\n", __FUNCTION__);
+ }
+
+ return ret_val;
+}
+
+static int Spartan3_ss_dump (Xilinx_desc * desc, void *buf, size_t bsize)
+{
+ /* Readback is only available through the Slave Parallel and */
+ /* boundary-scan interfaces. */
+ printf ("%s: Slave Serial Dumping is unavailable\n",
+ __FUNCTION__);
+ return FPGA_FAIL;
+}
+
+static int Spartan3_ss_reloc (Xilinx_desc * desc, ulong reloc_offset)
+{
+ int ret_val = FPGA_FAIL; /* assume the worst */
+ Xilinx_Spartan3_Slave_Serial_fns *fn_r, *fn =
+ (Xilinx_Spartan3_Slave_Serial_fns *) (desc->iface_fns);
+
+ if (fn) {
+ ulong addr;
+
+ /* Get the relocated table address */
+ addr = (ulong) fn + reloc_offset;
+ fn_r = (Xilinx_Spartan3_Slave_Serial_fns *) addr;
+
+ if (!fn_r->relocated) {
+
+ if (memcmp (fn_r, fn,
+ sizeof (Xilinx_Spartan3_Slave_Serial_fns))
+ == 0) {
+ /* good copy of the table, fix the descriptor pointer */
+ desc->iface_fns = fn_r;
+ } else {
+ PRINTF ("%s: Invalid function table at 0x%p\n",
+ __FUNCTION__, fn_r);
+ return FPGA_FAIL;
+ }
+
+ PRINTF ("%s: Relocating descriptor at 0x%p\n", __FUNCTION__,
+ desc);
+
+ if (fn->pre) {
+ addr = (ulong) (fn->pre) + reloc_offset;
+ fn_r->pre = (Xilinx_pre_fn) addr;
+ }
+
+ addr = (ulong) (fn->pgm) + reloc_offset;
+ fn_r->pgm = (Xilinx_pgm_fn) addr;
+
+ addr = (ulong) (fn->init) + reloc_offset;
+ fn_r->init = (Xilinx_init_fn) addr;
+
+ addr = (ulong) (fn->done) + reloc_offset;
+ fn_r->done = (Xilinx_done_fn) addr;
+
+ addr = (ulong) (fn->clk) + reloc_offset;
+ fn_r->clk = (Xilinx_clk_fn) addr;
+
+ addr = (ulong) (fn->wr) + reloc_offset;
+ fn_r->wr = (Xilinx_wr_fn) addr;
+
+ if (fn->post) {
+ addr = (ulong) (fn->post) + reloc_offset;
+ fn_r->post = (Xilinx_post_fn) addr;
+ }
+
+ fn_r->relocated = TRUE;
+
+ } else {
+ /* this table has already been moved */
+ /* XXX - should check to see if the descriptor is correct */
+ desc->iface_fns = fn_r;
+ }
+
+ ret_val = FPGA_SUCCESS;
+ } else {
+ printf ("%s: NULL Interface function table!\n", __FUNCTION__);
+ }
+
+ return ret_val;
+
+}
--- /dev/null
+/*
+ * (C) Copyright 2007
+ * Eran Liberty, Extricom , eran.liberty@gmail.com
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ */
+
+#include <common.h> /* core U-Boot definitions */
+#include <altera.h>
+
+int StratixII_ps_fpp_load (Altera_desc * desc, void *buf, size_t bsize,
+ int isSerial, int isSecure);
+int StratixII_ps_fpp_dump (Altera_desc * desc, void *buf, size_t bsize);
+
+/****************************************************************/
+/* Stratix II Generic Implementation */
+int StratixII_load (Altera_desc * desc, void *buf, size_t bsize)
+{
+ int ret_val = FPGA_FAIL;
+
+ switch (desc->iface) {
+ case passive_serial:
+ ret_val = StratixII_ps_fpp_load (desc, buf, bsize, 1, 0);
+ break;
+ case fast_passive_parallel:
+ ret_val = StratixII_ps_fpp_load (desc, buf, bsize, 0, 0);
+ break;
+ case fast_passive_parallel_security:
+ ret_val = StratixII_ps_fpp_load (desc, buf, bsize, 0, 1);
+ break;
+
+ /* Add new interface types here */
+ default:
+ printf ("%s: Unsupported interface type, %d\n", __FUNCTION__,
+ desc->iface);
+ }
+ return ret_val;
+}
+
+int StratixII_dump (Altera_desc * desc, void *buf, size_t bsize)
+{
+ int ret_val = FPGA_FAIL;
+
+ switch (desc->iface) {
+ case passive_serial:
+ case fast_passive_parallel:
+ case fast_passive_parallel_security:
+ ret_val = StratixII_ps_fpp_dump (desc, buf, bsize);
+ break;
+ /* Add new interface types here */
+ default:
+ printf ("%s: Unsupported interface type, %d\n", __FUNCTION__,
+ desc->iface);
+ }
+ return ret_val;
+}
+
+int StratixII_info (Altera_desc * desc)
+{
+ return FPGA_SUCCESS;
+}
+
+int StratixII_reloc (Altera_desc * desc, ulong reloc_offset)
+{
+ int i;
+ uint32_t dest = (uint32_t) desc & 0xff000000;
+
+ /* we assume a relocated code and non relocated code has different upper 8 bits */
+ if (dest != ((uint32_t) desc->iface_fns & 0xff000000)) {
+ desc->iface_fns =
+ (void *)((uint32_t) (desc->iface_fns) + reloc_offset);
+ }
+ for (i = 0; i < sizeof (altera_board_specific_func) / sizeof (void *);
+ i++) {
+ if (dest !=
+ ((uint32_t) (((void **)(desc->iface_fns))[i]) & 0xff000000))
+ {
+ ((void **)(desc->iface_fns))[i] =
+ (void
+ *)(((uint32_t) (((void **)(desc->iface_fns))[i])) +
+ reloc_offset);
+ }
+ }
+ return FPGA_SUCCESS;
+}
+
+int StratixII_ps_fpp_dump (Altera_desc * desc, void *buf, size_t bsize)
+{
+ printf ("Stratix II Fast Passive Parallel dump is not implemented\n");
+ return FPGA_FAIL;
+}
+
+int StratixII_ps_fpp_load (Altera_desc * desc, void *buf, size_t bsize,
+ int isSerial, int isSecure)
+{
+ altera_board_specific_func *fns;
+ int cookie;
+ int ret_val = FPGA_FAIL;
+ int bytecount;
+ char *buff = buf;
+ int i;
+
+ if (!desc) {
+ printf ("%s(%d) Altera_desc missing\n", __FUNCTION__, __LINE__);
+ return FPGA_FAIL;
+ }
+ if (!buff) {
+ printf ("%s(%d) buffer is missing\n", __FUNCTION__, __LINE__);
+ return FPGA_FAIL;
+ }
+ if (!bsize) {
+ printf ("%s(%d) size is zero\n", __FUNCTION__, __LINE__);
+ return FPGA_FAIL;
+ }
+ if (!desc->iface_fns) {
+ printf
+ ("%s(%d) Altera_desc function interface table is missing\n",
+ __FUNCTION__, __LINE__);
+ return FPGA_FAIL;
+ }
+ fns = (altera_board_specific_func *) (desc->iface_fns);
+ cookie = desc->cookie;
+
+ if (!
+ (fns->config && fns->status && fns->done && fns->data
+ && fns->abort)) {
+ printf
+ ("%s(%d) Missing some function in the function interface table\n",
+ __FUNCTION__, __LINE__);
+ return FPGA_FAIL;
+ }
+
+ /* 1. give board specific a chance to do anything before we start */
+ if (fns->pre) {
+ if ((ret_val = fns->pre (cookie)) < 0) {
+ return ret_val;
+ }
+ }
+
+ /* from this point on we must fail gracfully by calling lower layer abort */
+
+ /* 2. Strat burn cycle by deasserting config for t_CFG and waiting t_CF2CK after reaserted */
+ fns->config (0, 1, cookie);
+ udelay (5); /* nCONFIG low pulse width 2usec */
+ fns->config (1, 1, cookie);
+ udelay (100); /* nCONFIG high to first rising edge on DCLK */
+
+ /* 3. Start the Data cycle with clk deasserted */
+ bytecount = 0;
+ fns->clk (0, 1, cookie);
+
+ printf ("loading to fpga ");
+ while (bytecount < bsize) {
+ /* 3.1 check stratix has not signaled us an error */
+ if (fns->status (cookie) != 1) {
+ printf
+ ("\n%s(%d) Stratix failed (byte transfered till failure 0x%x)\n",
+ __FUNCTION__, __LINE__, bytecount);
+ fns->abort (cookie);
+ return FPGA_FAIL;
+ }
+ if (isSerial) {
+ int i;
+ uint8_t data = buff[bytecount++];
+ for (i = 0; i < 8; i++) {
+ /* 3.2(ps) put data on the bus */
+ fns->data ((data >> i) & 1, 1, cookie);
+
+ /* 3.3(ps) clock once */
+ fns->clk (1, 1, cookie);
+ fns->clk (0, 1, cookie);
+ }
+ } else {
+ /* 3.2(fpp) put data on the bus */
+ fns->data (buff[bytecount++], 1, cookie);
+
+ /* 3.3(fpp) clock once */
+ fns->clk (1, 1, cookie);
+ fns->clk (0, 1, cookie);
+
+ /* 3.4(fpp) for secure cycle push 3 more clocks */
+ for (i = 0; isSecure && i < 3; i++) {
+ fns->clk (1, 1, cookie);
+ fns->clk (0, 1, cookie);
+ }
+ }
+
+ /* 3.5 while clk is deasserted it is safe to print some progress indication */
+ if ((bytecount % (bsize / 100)) == 0) {
+ printf ("\b\b\b%02d\%", bytecount * 100 / bsize);
+ }
+ }
+
+ /* 4. Set one last clock and check conf done signal */
+ fns->clk (1, 1, cookie);
+ udelay (100);
+ if (!fns->done (cookie)) {
+ printf (" error!.\n");
+ fns->abort (cookie);
+ return FPGA_FAIL;
+ } else {
+ printf ("\b\b\b done.\n");
+ }
+
+ /* 5. call lower layer post configuration */
+ if (fns->post) {
+ if ((ret_val = fns->post (cookie)) < 0) {
+ fns->abort (cookie);
+ return ret_val;
+ }
+ }
+
+ return FPGA_SUCCESS;
+}
--- /dev/null
+/*
+ * (C) Copyright 2002
+ * Rich Ireland, Enterasys Networks, rireland@enterasys.com.
+ * Keith Outwater, keith_outwater@mvis.com
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ */
+
+/*
+ * Configuration support for Xilinx Virtex2 devices. Based
+ * on spartan2.c (Rich Ireland, rireland@enterasys.com).
+ */
+
+#include <common.h>
+#include <virtex2.h>
+
+#if 0
+#define FPGA_DEBUG
+#endif
+
+#ifdef FPGA_DEBUG
+#define PRINTF(fmt,args...) printf (fmt ,##args)
+#else
+#define PRINTF(fmt,args...)
+#endif
+
+/*
+ * If the SelectMap interface can be overrun by the processor, define
+ * CONFIG_SYS_FPGA_CHECK_BUSY and/or CONFIG_FPGA_DELAY in the board configuration
+ * file and add board-specific support for checking BUSY status. By default,
+ * assume that the SelectMap interface cannot be overrun.
+ */
+#ifndef CONFIG_SYS_FPGA_CHECK_BUSY
+#undef CONFIG_SYS_FPGA_CHECK_BUSY
+#endif
+
+#ifndef CONFIG_FPGA_DELAY
+#define CONFIG_FPGA_DELAY()
+#endif
+
+#ifndef CONFIG_SYS_FPGA_PROG_FEEDBACK
+#define CONFIG_SYS_FPGA_PROG_FEEDBACK
+#endif
+
+/*
+ * Don't allow config cycle to be interrupted
+ */
+#ifndef CONFIG_SYS_FPGA_CHECK_CTRLC
+#undef CONFIG_SYS_FPGA_CHECK_CTRLC
+#endif
+
+/*
+ * Check for errors during configuration by default
+ */
+#ifndef CONFIG_SYS_FPGA_CHECK_ERROR
+#define CONFIG_SYS_FPGA_CHECK_ERROR
+#endif
+
+/*
+ * The default timeout in mS for INIT_B to deassert after PROG_B has
+ * been deasserted. Per the latest Virtex II Handbook (page 347), the
+ * max time from PORG_B deassertion to INIT_B deassertion is 4uS per
+ * data frame for the XC2V8000. The XC2V8000 has 2860 data frames
+ * which yields 11.44 mS. So let's make it bigger in order to handle
+ * an XC2V1000, if anyone can ever get ahold of one.
+ */
+#ifndef CONFIG_SYS_FPGA_WAIT_INIT
+#define CONFIG_SYS_FPGA_WAIT_INIT CONFIG_SYS_HZ/2 /* 500 ms */
+#endif
+
+/*
+ * The default timeout for waiting for BUSY to deassert during configuration.
+ * This is normally not necessary since for most reasonable configuration
+ * clock frequencies (i.e. 66 MHz or less), BUSY monitoring is unnecessary.
+ */
+#ifndef CONFIG_SYS_FPGA_WAIT_BUSY
+#define CONFIG_SYS_FPGA_WAIT_BUSY CONFIG_SYS_HZ/200 /* 5 ms*/
+#endif
+
+/* Default timeout for waiting for FPGA to enter operational mode after
+ * configuration data has been written.
+ */
+#ifndef CONFIG_SYS_FPGA_WAIT_CONFIG
+#define CONFIG_SYS_FPGA_WAIT_CONFIG CONFIG_SYS_HZ/5 /* 200 ms */
+#endif
+
+static int Virtex2_ssm_load (Xilinx_desc * desc, void *buf, size_t bsize);
+static int Virtex2_ssm_dump (Xilinx_desc * desc, void *buf, size_t bsize);
+static int Virtex2_ssm_reloc (Xilinx_desc * desc, ulong reloc_offset);
+
+static int Virtex2_ss_load (Xilinx_desc * desc, void *buf, size_t bsize);
+static int Virtex2_ss_dump (Xilinx_desc * desc, void *buf, size_t bsize);
+static int Virtex2_ss_reloc (Xilinx_desc * desc, ulong reloc_offset);
+
+int Virtex2_load (Xilinx_desc * desc, void *buf, size_t bsize)
+{
+ int ret_val = FPGA_FAIL;
+
+ switch (desc->iface) {
+ case slave_serial:
+ PRINTF ("%s: Launching Slave Serial Load\n", __FUNCTION__);
+ ret_val = Virtex2_ss_load (desc, buf, bsize);
+ break;
+
+ case slave_selectmap:
+ PRINTF ("%s: Launching Slave Parallel Load\n", __FUNCTION__);
+ ret_val = Virtex2_ssm_load (desc, buf, bsize);
+ break;
+
+ default:
+ printf ("%s: Unsupported interface type, %d\n",
+ __FUNCTION__, desc->iface);
+ }
+ return ret_val;
+}
+
+int Virtex2_dump (Xilinx_desc * desc, void *buf, size_t bsize)
+{
+ int ret_val = FPGA_FAIL;
+
+ switch (desc->iface) {
+ case slave_serial:
+ PRINTF ("%s: Launching Slave Serial Dump\n", __FUNCTION__);
+ ret_val = Virtex2_ss_dump (desc, buf, bsize);
+ break;
+
+ case slave_parallel:
+ PRINTF ("%s: Launching Slave Parallel Dump\n", __FUNCTION__);
+ ret_val = Virtex2_ssm_dump (desc, buf, bsize);
+ break;
+
+ default:
+ printf ("%s: Unsupported interface type, %d\n",
+ __FUNCTION__, desc->iface);
+ }
+ return ret_val;
+}
+
+int Virtex2_info (Xilinx_desc * desc)
+{
+ return FPGA_SUCCESS;
+}
+
+int Virtex2_reloc (Xilinx_desc * desc, ulong reloc_offset)
+{
+ int ret_val = FPGA_FAIL;
+
+ if (desc->family != Xilinx_Virtex2) {
+ printf ("%s: Unsupported family type, %d\n",
+ __FUNCTION__, desc->family);
+ return FPGA_FAIL;
+ } else
+ switch (desc->iface) {
+ case slave_serial:
+ ret_val = Virtex2_ss_reloc (desc, reloc_offset);
+ break;
+
+ case slave_selectmap:
+ ret_val = Virtex2_ssm_reloc (desc, reloc_offset);
+ break;
+
+ default:
+ printf ("%s: Unsupported interface type, %d\n",
+ __FUNCTION__, desc->iface);
+ }
+ return ret_val;
+}
+
+/*
+ * Virtex-II Slave SelectMap configuration loader. Configuration via
+ * SelectMap is as follows:
+ * 1. Set the FPGA's PROG_B line low.
+ * 2. Set the FPGA's PROG_B line high. Wait for INIT_B to go high.
+ * 3. Write data to the SelectMap port. If INIT_B goes low at any time
+ * this process, a configuration error (most likely CRC failure) has
+ * ocurred. At this point a status word may be read from the
+ * SelectMap interface to determine the source of the problem (You
+ * could, for instance, put this in your 'abort' function handler).
+ * 4. After all data has been written, test the state of the FPGA
+ * INIT_B and DONE lines. If both are high, configuration has
+ * succeeded. Congratulations!
+ */
+static int Virtex2_ssm_load (Xilinx_desc * desc, void *buf, size_t bsize)
+{
+ int ret_val = FPGA_FAIL;
+ Xilinx_Virtex2_Slave_SelectMap_fns *fn = desc->iface_fns;
+
+ PRINTF ("%s:%d: Start with interface functions @ 0x%p\n",
+ __FUNCTION__, __LINE__, fn);
+
+ if (fn) {
+ size_t bytecount = 0;
+ unsigned char *data = (unsigned char *) buf;
+ int cookie = desc->cookie;
+ unsigned long ts;
+
+ /* Gotta split this one up (so the stack won't blow??) */
+ PRINTF ("%s:%d: Function Table:\n"
+ " base 0x%p\n"
+ " struct 0x%p\n"
+ " pre 0x%p\n"
+ " prog 0x%p\n"
+ " init 0x%p\n"
+ " error 0x%p\n",
+ __FUNCTION__, __LINE__,
+ &fn, fn, fn->pre, fn->pgm, fn->init, fn->err);
+ PRINTF (" clock 0x%p\n"
+ " cs 0x%p\n"
+ " write 0x%p\n"
+ " rdata 0x%p\n"
+ " wdata 0x%p\n"
+ " busy 0x%p\n"
+ " abort 0x%p\n"
+ " post 0x%p\n\n",
+ fn->clk, fn->cs, fn->wr, fn->rdata, fn->wdata,
+ fn->busy, fn->abort, fn->post);
+
+#ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK
+ printf ("Initializing FPGA Device %d...\n", cookie);
+#endif
+ /*
+ * Run the pre configuration function if there is one.
+ */
+ if (*fn->pre) {
+ (*fn->pre) (cookie);
+ }
+
+ /*
+ * Assert the program line. The minimum pulse width for
+ * Virtex II devices is 300 nS (Tprogram parameter in datasheet).
+ * There is no maximum value for the pulse width. Check to make
+ * sure that INIT_B goes low after assertion of PROG_B
+ */
+ (*fn->pgm) (TRUE, TRUE, cookie);
+ udelay (10);
+ ts = get_timer (0);
+ do {
+ if (get_timer (ts) > CONFIG_SYS_FPGA_WAIT_INIT) {
+ printf ("%s:%d: ** Timeout after %d ticks waiting for INIT"
+ " to assert.\n", __FUNCTION__, __LINE__,
+ CONFIG_SYS_FPGA_WAIT_INIT);
+ (*fn->abort) (cookie);
+ return FPGA_FAIL;
+ }
+ } while (!(*fn->init) (cookie));
+
+ (*fn->pgm) (FALSE, TRUE, cookie);
+ CONFIG_FPGA_DELAY ();
+ (*fn->clk) (TRUE, TRUE, cookie);
+
+ /*
+ * Start a timer and wait for INIT_B to go high
+ */
+ ts = get_timer (0);
+ do {
+ CONFIG_FPGA_DELAY ();
+ if (get_timer (ts) > CONFIG_SYS_FPGA_WAIT_INIT) {
+ printf ("%s:%d: ** Timeout after %d ticks waiting for INIT"
+ " to deassert.\n", __FUNCTION__, __LINE__,
+ CONFIG_SYS_FPGA_WAIT_INIT);
+ (*fn->abort) (cookie);
+ return FPGA_FAIL;
+ }
+ } while ((*fn->init) (cookie) && (*fn->busy) (cookie));
+
+ (*fn->wr) (TRUE, TRUE, cookie);
+ (*fn->cs) (TRUE, TRUE, cookie);
+
+ udelay (10000);
+
+ /*
+ * Load the data byte by byte
+ */
+ while (bytecount < bsize) {
+#ifdef CONFIG_SYS_FPGA_CHECK_CTRLC
+ if (ctrlc ()) {
+ (*fn->abort) (cookie);
+ return FPGA_FAIL;
+ }
+#endif
+
+ if ((*fn->done) (cookie) == FPGA_SUCCESS) {
+ PRINTF ("%s:%d:done went active early, bytecount = %d\n",
+ __FUNCTION__, __LINE__, bytecount);
+ break;
+ }
+
+#ifdef CONFIG_SYS_FPGA_CHECK_ERROR
+ if ((*fn->init) (cookie)) {
+ printf ("\n%s:%d: ** Error: INIT asserted during"
+ " configuration\n", __FUNCTION__, __LINE__);
+ printf ("%d = buffer offset, %d = buffer size\n",
+ bytecount, bsize);
+ (*fn->abort) (cookie);
+ return FPGA_FAIL;
+ }
+#endif
+
+ (*fn->wdata) (data[bytecount++], TRUE, cookie);
+ CONFIG_FPGA_DELAY ();
+
+ /*
+ * Cycle the clock pin
+ */
+ (*fn->clk) (FALSE, TRUE, cookie);
+ CONFIG_FPGA_DELAY ();
+ (*fn->clk) (TRUE, TRUE, cookie);
+
+#ifdef CONFIG_SYS_FPGA_CHECK_BUSY
+ ts = get_timer (0);
+ while ((*fn->busy) (cookie)) {
+ if (get_timer (ts) > CONFIG_SYS_FPGA_WAIT_BUSY) {
+ printf ("%s:%d: ** Timeout after %d ticks waiting for"
+ " BUSY to deassert\n",
+ __FUNCTION__, __LINE__, CONFIG_SYS_FPGA_WAIT_BUSY);
+ (*fn->abort) (cookie);
+ return FPGA_FAIL;
+ }
+ }
+#endif
+
+#ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK
+ if (bytecount % (bsize / 40) == 0)
+ putc ('.');
+#endif
+ }
+
+ /*
+ * Finished writing the data; deassert FPGA CS_B and WRITE_B signals.
+ */
+ CONFIG_FPGA_DELAY ();
+ (*fn->cs) (FALSE, TRUE, cookie);
+ (*fn->wr) (FALSE, TRUE, cookie);
+
+#ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK
+ putc ('\n');
+#endif
+
+ /*
+ * Check for successful configuration. FPGA INIT_B and DONE should
+ * both be high upon successful configuration.
+ */
+ ts = get_timer (0);
+ ret_val = FPGA_SUCCESS;
+ while (((*fn->done) (cookie) == FPGA_FAIL) || (*fn->init) (cookie)) {
+ if (get_timer (ts) > CONFIG_SYS_FPGA_WAIT_CONFIG) {
+ printf ("%s:%d: ** Timeout after %d ticks waiting for DONE to"
+ "assert and INIT to deassert\n",
+ __FUNCTION__, __LINE__, CONFIG_SYS_FPGA_WAIT_CONFIG);
+ (*fn->abort) (cookie);
+ ret_val = FPGA_FAIL;
+ break;
+ }
+ }
+
+ if (ret_val == FPGA_SUCCESS) {
+#ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK
+ printf ("Initialization of FPGA device %d complete\n", cookie);
+#endif
+ /*
+ * Run the post configuration function if there is one.
+ */
+ if (*fn->post) {
+ (*fn->post) (cookie);
+ }
+ } else {
+#ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK
+ printf ("** Initialization of FPGA device %d FAILED\n",
+ cookie);
+#endif
+ }
+ } else {
+ printf ("%s:%d: NULL Interface function table!\n",
+ __FUNCTION__, __LINE__);
+ }
+ return ret_val;
+}
+
+/*
+ * Read the FPGA configuration data
+ */
+static int Virtex2_ssm_dump (Xilinx_desc * desc, void *buf, size_t bsize)
+{
+ int ret_val = FPGA_FAIL;
+ Xilinx_Virtex2_Slave_SelectMap_fns *fn = desc->iface_fns;
+
+ if (fn) {
+ unsigned char *data = (unsigned char *) buf;
+ size_t bytecount = 0;
+ int cookie = desc->cookie;
+
+ printf ("Starting Dump of FPGA Device %d...\n", cookie);
+
+ (*fn->cs) (TRUE, TRUE, cookie);
+ (*fn->clk) (TRUE, TRUE, cookie);
+
+ while (bytecount < bsize) {
+#ifdef CONFIG_SYS_FPGA_CHECK_CTRLC
+ if (ctrlc ()) {
+ (*fn->abort) (cookie);
+ return FPGA_FAIL;
+ }
+#endif
+ /*
+ * Cycle the clock and read the data
+ */
+ (*fn->clk) (FALSE, TRUE, cookie);
+ (*fn->clk) (TRUE, TRUE, cookie);
+ (*fn->rdata) (&(data[bytecount++]), cookie);
+#ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK
+ if (bytecount % (bsize / 40) == 0)
+ putc ('.');
+#endif
+ }
+
+ /*
+ * Deassert CS_B and cycle the clock to deselect the device.
+ */
+ (*fn->cs) (FALSE, FALSE, cookie);
+ (*fn->clk) (FALSE, TRUE, cookie);
+ (*fn->clk) (TRUE, TRUE, cookie);
+
+#ifdef CONFIG_SYS_FPGA_PROG_FEEDBACK
+ putc ('\n');
+#endif
+ puts ("Done.\n");
+ } else {
+ printf ("%s:%d: NULL Interface function table!\n",
+ __FUNCTION__, __LINE__);
+ }
+ return ret_val;
+}
+
+/*
+ * Relocate the addresses in the function table from FLASH (or ROM,
+ * or whatever) to RAM.
+ */
+static int Virtex2_ssm_reloc (Xilinx_desc * desc, ulong reloc_offset)
+{
+ ulong addr;
+ int ret_val = FPGA_FAIL;
+ Xilinx_Virtex2_Slave_SelectMap_fns *fn_r, *fn =
+ (Xilinx_Virtex2_Slave_SelectMap_fns *) (desc->iface_fns);
+
+ if (fn) {
+ /*
+ * Get the relocated table address
+ */
+ addr = (ulong) fn + reloc_offset;
+ fn_r = (Xilinx_Virtex2_Slave_SelectMap_fns *) addr;
+
+ /*
+ * Check to see if the table has already been relocated. If not, do
+ * a sanity check to make sure there is a faithful copy of the
+ * FLASH based function table in RAM, then adjust the table.
+ */
+ if (!fn_r->relocated) {
+ if (memcmp
+ (fn_r, fn, sizeof (Xilinx_Virtex2_Slave_SelectMap_fns))
+ == 0) {
+ desc->iface_fns = fn_r;
+ } else {
+ PRINTF ("%s:%d: Invalid function table at 0x%p\n",
+ __FUNCTION__, __LINE__, fn_r);
+ return FPGA_FAIL;
+ }
+
+ PRINTF ("%s:%d: Relocating descriptor at 0x%p\n",
+ __FUNCTION__, __LINE__, desc);
+
+ addr = (ulong) (fn->pre) + reloc_offset;
+ fn_r->pre = (Xilinx_pre_fn) addr;
+ addr = (ulong) (fn->pgm) + reloc_offset;
+ fn_r->pgm = (Xilinx_pgm_fn) addr;
+ addr = (ulong) (fn->init) + reloc_offset;
+ fn_r->init = (Xilinx_init_fn) addr;
+ addr = (ulong) (fn->done) + reloc_offset;
+ fn_r->done = (Xilinx_done_fn) addr;
+ addr = (ulong) (fn->err) + reloc_offset;
+ fn_r->err = (Xilinx_err_fn) addr;
+ addr = (ulong) (fn->clk) + reloc_offset;
+ fn_r->clk = (Xilinx_clk_fn) addr;
+ addr = (ulong) (fn->cs) + reloc_offset;
+ fn_r->cs = (Xilinx_cs_fn) addr;
+ addr = (ulong) (fn->wr) + reloc_offset;
+ fn_r->wr = (Xilinx_wr_fn) addr;
+ addr = (ulong) (fn->rdata) + reloc_offset;
+ fn_r->rdata = (Xilinx_rdata_fn) addr;
+ addr = (ulong) (fn->wdata) + reloc_offset;
+ fn_r->wdata = (Xilinx_wdata_fn) addr;
+ addr = (ulong) (fn->busy) + reloc_offset;
+ fn_r->busy = (Xilinx_busy_fn) addr;
+ addr = (ulong) (fn->abort) + reloc_offset;
+ fn_r->abort = (Xilinx_abort_fn) addr;
+ addr = (ulong) (fn->post) + reloc_offset;
+ fn_r->post = (Xilinx_post_fn) addr;
+ fn_r->relocated = TRUE;
+ } else {
+ printf ("%s:%d: Function table @0x%p has already been relocated\n", __FUNCTION__, __LINE__, fn_r);
+ desc->iface_fns = fn_r;
+ }
+ ret_val = FPGA_SUCCESS;
+ } else {
+ printf ("%s: NULL Interface function table!\n", __FUNCTION__);
+ }
+ return ret_val;
+}
+
+static int Virtex2_ss_load (Xilinx_desc * desc, void *buf, size_t bsize)
+{
+ printf ("%s: Slave Serial Loading is unsupported\n", __FUNCTION__);
+ return FPGA_FAIL;
+}
+
+static int Virtex2_ss_dump (Xilinx_desc * desc, void *buf, size_t bsize)
+{
+ printf ("%s: Slave Serial Dumping is unsupported\n", __FUNCTION__);
+ return FPGA_FAIL;
+}
+
+static int Virtex2_ss_reloc (Xilinx_desc * desc, ulong reloc_offset)
+{
+ int ret_val = FPGA_FAIL;
+ Xilinx_Virtex2_Slave_Serial_fns *fn =
+ (Xilinx_Virtex2_Slave_Serial_fns *) (desc->iface_fns);
+
+ if (fn) {
+ printf ("%s:%d: Slave Serial Loading is unsupported\n",
+ __FUNCTION__, __LINE__);
+ } else {
+ printf ("%s:%d: NULL Interface function table!\n",
+ __FUNCTION__, __LINE__);
+ }
+ return ret_val;
+}
+
+/* vim: set ts=4 tw=78: */
--- /dev/null
+/*
+ * (C) Copyright 2002
+ * Rich Ireland, Enterasys Networks, rireland@enterasys.com.
+ * Keith Outwater, keith_outwater@mvis.com
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ */
+
+/*
+ * Xilinx FPGA support
+ */
+
+#include <common.h>
+#include <virtex2.h>
+#include <spartan2.h>
+#include <spartan3.h>
+
+#if 0
+#define FPGA_DEBUG
+#endif
+
+/* Define FPGA_DEBUG to get debug printf's */
+#ifdef FPGA_DEBUG
+#define PRINTF(fmt,args...) printf (fmt ,##args)
+#else
+#define PRINTF(fmt,args...)
+#endif
+
+/* Local Static Functions */
+static int xilinx_validate (Xilinx_desc * desc, char *fn);
+
+/* ------------------------------------------------------------------------- */
+
+int xilinx_load (Xilinx_desc * desc, void *buf, size_t bsize)
+{
+ int ret_val = FPGA_FAIL; /* assume a failure */
+
+ if (!xilinx_validate (desc, (char *)__FUNCTION__)) {
+ printf ("%s: Invalid device descriptor\n", __FUNCTION__);
+ } else
+ switch (desc->family) {
+ case Xilinx_Spartan2:
+#if defined(CONFIG_FPGA_SPARTAN2)
+ PRINTF ("%s: Launching the Spartan-II Loader...\n",
+ __FUNCTION__);
+ ret_val = Spartan2_load (desc, buf, bsize);
+#else
+ printf ("%s: No support for Spartan-II devices.\n",
+ __FUNCTION__);
+#endif
+ break;
+ case Xilinx_Spartan3:
+#if defined(CONFIG_FPGA_SPARTAN3)
+ PRINTF ("%s: Launching the Spartan-III Loader...\n",
+ __FUNCTION__);
+ ret_val = Spartan3_load (desc, buf, bsize);
+#else
+ printf ("%s: No support for Spartan-III devices.\n",
+ __FUNCTION__);
+#endif
+ break;
+ case Xilinx_Virtex2:
+#if defined(CONFIG_FPGA_VIRTEX2)
+ PRINTF ("%s: Launching the Virtex-II Loader...\n",
+ __FUNCTION__);
+ ret_val = Virtex2_load (desc, buf, bsize);
+#else
+ printf ("%s: No support for Virtex-II devices.\n",
+ __FUNCTION__);
+#endif
+ break;
+
+ default:
+ printf ("%s: Unsupported family type, %d\n",
+ __FUNCTION__, desc->family);
+ }
+
+ return ret_val;
+}
+
+int xilinx_dump (Xilinx_desc * desc, void *buf, size_t bsize)
+{
+ int ret_val = FPGA_FAIL; /* assume a failure */
+
+ if (!xilinx_validate (desc, (char *)__FUNCTION__)) {
+ printf ("%s: Invalid device descriptor\n", __FUNCTION__);
+ } else
+ switch (desc->family) {
+ case Xilinx_Spartan2:
+#if defined(CONFIG_FPGA_SPARTAN2)
+ PRINTF ("%s: Launching the Spartan-II Reader...\n",
+ __FUNCTION__);
+ ret_val = Spartan2_dump (desc, buf, bsize);
+#else
+ printf ("%s: No support for Spartan-II devices.\n",
+ __FUNCTION__);
+#endif
+ break;
+ case Xilinx_Spartan3:
+#if defined(CONFIG_FPGA_SPARTAN3)
+ PRINTF ("%s: Launching the Spartan-III Reader...\n",
+ __FUNCTION__);
+ ret_val = Spartan3_dump (desc, buf, bsize);
+#else
+ printf ("%s: No support for Spartan-III devices.\n",
+ __FUNCTION__);
+#endif
+ break;
+ case Xilinx_Virtex2:
+#if defined( CONFIG_FPGA_VIRTEX2)
+ PRINTF ("%s: Launching the Virtex-II Reader...\n",
+ __FUNCTION__);
+ ret_val = Virtex2_dump (desc, buf, bsize);
+#else
+ printf ("%s: No support for Virtex-II devices.\n",
+ __FUNCTION__);
+#endif
+ break;
+
+ default:
+ printf ("%s: Unsupported family type, %d\n",
+ __FUNCTION__, desc->family);
+ }
+
+ return ret_val;
+}
+
+int xilinx_info (Xilinx_desc * desc)
+{
+ int ret_val = FPGA_FAIL;
+
+ if (xilinx_validate (desc, (char *)__FUNCTION__)) {
+ printf ("Family: \t");
+ switch (desc->family) {
+ case Xilinx_Spartan2:
+ printf ("Spartan-II\n");
+ break;
+ case Xilinx_Spartan3:
+ printf ("Spartan-III\n");
+ break;
+ case Xilinx_Virtex2:
+ printf ("Virtex-II\n");
+ break;
+ /* Add new family types here */
+ default:
+ printf ("Unknown family type, %d\n", desc->family);
+ }
+
+ printf ("Interface type:\t");
+ switch (desc->iface) {
+ case slave_serial:
+ printf ("Slave Serial\n");
+ break;
+ case master_serial: /* Not used */
+ printf ("Master Serial\n");
+ break;
+ case slave_parallel:
+ printf ("Slave Parallel\n");
+ break;
+ case jtag_mode: /* Not used */
+ printf ("JTAG Mode\n");
+ break;
+ case slave_selectmap:
+ printf ("Slave SelectMap Mode\n");
+ break;
+ case master_selectmap:
+ printf ("Master SelectMap Mode\n");
+ break;
+ /* Add new interface types here */
+ default:
+ printf ("Unsupported interface type, %d\n", desc->iface);
+ }
+
+ printf ("Device Size: \t%d bytes\n"
+ "Cookie: \t0x%x (%d)\n",
+ desc->size, desc->cookie, desc->cookie);
+
+ if (desc->iface_fns) {
+ printf ("Device Function Table @ 0x%p\n", desc->iface_fns);
+ switch (desc->family) {
+ case Xilinx_Spartan2:
+#if defined(CONFIG_FPGA_SPARTAN2)
+ Spartan2_info (desc);
+#else
+ /* just in case */
+ printf ("%s: No support for Spartan-II devices.\n",
+ __FUNCTION__);
+#endif
+ break;
+ case Xilinx_Spartan3:
+#if defined(CONFIG_FPGA_SPARTAN3)
+ Spartan3_info (desc);
+#else
+ /* just in case */
+ printf ("%s: No support for Spartan-III devices.\n",
+ __FUNCTION__);
+#endif
+ break;
+ case Xilinx_Virtex2:
+#if defined(CONFIG_FPGA_VIRTEX2)
+ Virtex2_info (desc);
+#else
+ /* just in case */
+ printf ("%s: No support for Virtex-II devices.\n",
+ __FUNCTION__);
+#endif
+ break;
+ /* Add new family types here */
+ default:
+ /* we don't need a message here - we give one up above */
+ ;
+ }
+ } else
+ printf ("No Device Function Table.\n");
+
+ ret_val = FPGA_SUCCESS;
+ } else {
+ printf ("%s: Invalid device descriptor\n", __FUNCTION__);
+ }
+
+ return ret_val;
+}
+
+int xilinx_reloc (Xilinx_desc * desc, ulong reloc_offset)
+{
+ int ret_val = FPGA_FAIL; /* assume a failure */
+
+ if (!xilinx_validate (desc, (char *)__FUNCTION__)) {
+ printf ("%s: Invalid device descriptor\n", __FUNCTION__);
+ } else
+ switch (desc->family) {
+ case Xilinx_Spartan2:
+#if defined(CONFIG_FPGA_SPARTAN2)
+ ret_val = Spartan2_reloc (desc, reloc_offset);
+#else
+ printf ("%s: No support for Spartan-II devices.\n",
+ __FUNCTION__);
+#endif
+ break;
+ case Xilinx_Spartan3:
+#if defined(CONFIG_FPGA_SPARTAN3)
+ ret_val = Spartan3_reloc (desc, reloc_offset);
+#else
+ printf ("%s: No support for Spartan-III devices.\n",
+ __FUNCTION__);
+#endif
+ break;
+ case Xilinx_Virtex2:
+#if defined(CONFIG_FPGA_VIRTEX2)
+ ret_val = Virtex2_reloc (desc, reloc_offset);
+#else
+ printf ("%s: No support for Virtex-II devices.\n",
+ __FUNCTION__);
+#endif
+ break;
+ /* Add new family types here */
+ default:
+ printf ("%s: Unsupported family type, %d\n",
+ __FUNCTION__, desc->family);
+ }
+
+ return ret_val;
+}
+
+
+/* ------------------------------------------------------------------------- */
+
+static int xilinx_validate (Xilinx_desc * desc, char *fn)
+{
+ int ret_val = FALSE;
+
+ if (desc) {
+ if ((desc->family > min_xilinx_type) &&
+ (desc->family < max_xilinx_type)) {
+ if ((desc->iface > min_xilinx_iface_type) &&
+ (desc->iface < max_xilinx_iface_type)) {
+ if (desc->size) {
+ ret_val = TRUE;
+ } else
+ printf ("%s: NULL part size\n", fn);
+ } else
+ printf ("%s: Invalid Interface type, %d\n",
+ fn, desc->iface);
+ } else
+ printf ("%s: Invalid family type, %d\n", fn, desc->family);
+ } else
+ printf ("%s: NULL descriptor!\n", fn);
+
+ return ret_val;
+}
* runs from ROM, and we can't switch buses because we can't modify
* the global variables.
*/
-#ifdef CONFIG_SYS_SPD_BUS_NUM
-static unsigned int i2c_bus_num __attribute__ ((section ("data"))) = CONFIG_SYS_SPD_BUS_NUM;
-#else
-static unsigned int i2c_bus_num __attribute__ ((section ("data"))) = 0;
+#ifndef CONFIG_SYS_SPD_BUS_NUM
+#define CONFIG_SYS_SPD_BUS_NUM 0
#endif
+static unsigned int i2c_bus_num __attribute__ ((section (".data"))) = CONFIG_SYS_SPD_BUS_NUM;
static unsigned int i2c_bus_speed[2] = {CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SPEED};
#endif
#if defined(CONFIG_I2C_MULTI_BUS)
-static unsigned int i2c_bus_num __attribute__ ((section ("data"))) = 0;
+static unsigned int i2c_bus_num __attribute__ ((section (".data"))) = 0;
#endif /* CONFIG_I2C_MULTI_BUS */
/*-----------------------------------------------------------------------
/bmp_logo.h
/config.h
/config.mk
+/timestamp_autogenerated.h
/version_autogenerated.h
int ftstc(int file);
int fgetc(int file);
+/*
+ * CONSOLE multiplexing.
+ */
+#ifdef CONFIG_CONSOLE_MUX
+#include <iomux.h>
+#endif
+
int pcmcia_init (void);
#ifdef CONFIG_STATUS_LED
#define CONFIG_CDP_DEVICE_ID_PREFIX "NP" /* netphone */
#define CONFIG_CDP_PORT_ID "eth%d"
#define CONFIG_CDP_CAPABILITIES 0x00000010
-#define CONFIG_CDP_VERSION "u-boot" " " __DATE__ " " __TIME__
+#define CONFIG_CDP_VERSION "u-boot" " " U_BOOT_DATE " " U_BOOT_TIME
#define CONFIG_CDP_PLATFORM "Intracom NetPhone"
#define CONFIG_CDP_TRIGGER 0x20020001
#define CONFIG_CDP_POWER_CONSUMPTION 4300 /* 90 mA @ 48V */
#define CONFIG_CDP_DEVICE_ID_PREFIX "NT" /* netta */
#define CONFIG_CDP_PORT_ID "eth%d"
#define CONFIG_CDP_CAPABILITIES 0x00000010
-#define CONFIG_CDP_VERSION "u-boot 1.0" " " __DATE__ " " __TIME__
+#define CONFIG_CDP_VERSION "u-boot 1.0" " " U_BOOT_DATE " " U_BOOT_TIME
#define CONFIG_CDP_PLATFORM "Intracom NetTA"
#define CONFIG_CDP_TRIGGER 0x20020001
#define CONFIG_CDP_POWER_CONSUMPTION 4300 /* 90 mA @ 48V */
#define CONFIG_CDP_DEVICE_ID_PREFIX "NT" /* netta2 */
#define CONFIG_CDP_PORT_ID "eth%d"
#define CONFIG_CDP_CAPABILITIES 0x00000010
-#define CONFIG_CDP_VERSION "u-boot" " " __DATE__ " " __TIME__
+#define CONFIG_CDP_VERSION "u-boot" " " U_BOOT_DATE " " U_BOOT_TIME
#define CONFIG_CDP_PLATFORM "Intracom NetTA2"
#define CONFIG_CDP_TRIGGER 0x20020001
#define CONFIG_CDP_POWER_CONSUMPTION 4300 /* 90 mA @ 48V */
#define CONFIG_ETHADDR 00:60:13:00:00:00 /* Netstal Machines AG MAC */
#define CONFIG_OVERWRITE_ETHADDR_ONCE
-#define CONFIG_SYS_TFTP_LOADADDR 0x01000000
-
+#define CONFIG_SYS_TFTP_LOADADDR 0x01000000
+#define CONFIG_SYS_VXWORKS_ADD_PARAMS "u=dpu pw=netstal8752"
+#define CONFIG_SYS_VXWORKS_SERVERNAME "c"
/*
* General common environment variables shared by all boards produced by Netstal Maschinen
*/
"fdt_addr_r=800000\0" \
"hostname=" xstr(CONFIG_HOSTNAME) "\0" \
"bootfile=" xstr(CONFIG_HOSTNAME) "/uImage\0" \
- "load=tftp 200000 " xstr(CONFIG_HOSTNAME) "/u-boot.bin\0" \
- "update=protect off " xstr(CONFIG_SYS_MONITOR_BASE) " FFFFFFFF;" \
- "era " xstr(CONFIG_SYS_MONITOR_BASE) " FFFFFFFF;" \
- "cp.b ${fileaddr} " xstr(CONFIG_SYS_MONITOR_BASE) " ${filesize};" \
- "setenv filesize\0" \
- "upd=run load update\0" \
- "vx_rom=" xstr(CONFIG_HOSTNAME) "/" \
- xstr(CONFIG_HOSTNAME) "_vx_rom\0" \
- "vx=tftp " xstr(CONFIG_SYS_TFTP_LOADADDR) " ${vx_rom};run vxargs;" \
- "bootvx\0" \
- "vxargs=setenv bootargs emac(0,0)c:${vx_rom} e=${ipaddr}" \
- " h=${serverip} u=dpu pw=netstal8752 " \
- "tn=" xstr(CONFIG_HOSTNAME) " f=0x3008\0" \
+ "uload=tftp " xstr(CONFIG_SYS_TFTP_LOADADDR) " " \
+ xstr(CONFIG_HOSTNAME) "/u-boot.bin\0" \
+ "vx_rom=" xstr(CONFIG_HOSTNAME) "/" \
+ xstr(CONFIG_HOSTNAME) "_vx_rom\0" \
+ "update=protect off " xstr(CONFIG_SYS_MONITOR_BASE) " FFFFFFFF;"\
+ "era " xstr(CONFIG_SYS_MONITOR_BASE) " FFFFFFFF;" \
+ "cp.b ${fileaddr} "xstr(CONFIG_SYS_MONITOR_BASE) \
+ " ${filesize}; setenv filesize\0" \
+ "upd=run uload update\0" \
+ "vx=setenv bootfile ${vx_rom}; tftp " \
+ xstr(CONFIG_SYS_TFTP_LOADADDR) "; bootvx\0" \
CONFIG_NETSTAL_DEF_ENV_ROOTPATH
/*
--- /dev/null
+/*
+ * (C) Copyright 2008
+ * Gary Jennejohn, DENX Software Engineering GmbH, garyj@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ *This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef _IO_MUX_H
+#define _IO_MUX_H
+
+#include <devices.h>
+
+/*
+ * Stuff required to support console multiplexing.
+ */
+
+/*
+ * Pointers to devices used for each file type. Defined in console.c
+ * but storage is allocated in iomux.c.
+ */
+extern device_t **console_devices[MAX_FILES];
+/*
+ * The count of devices assigned to each FILE. Defined in console.c
+ * and populated in iomux.c.
+ */
+extern int cd_count[MAX_FILES];
+
+int iomux_doenv(const int, const char *);
+void iomux_printdevs(const int);
+device_t *search_device(int, char *);
+
+#endif /* _IO_MUX_H */
--- /dev/null
+/*
+ * Copyright 2008 Extreme Engineering Solutions, Inc.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __TIMESTAMP_H__
+#define __TIMESTAMP_H__
+
+#ifndef DO_DEPS_ONLY
+#include "timestamp_autogenerated.h"
+#endif
+
+#endif /* __TIMESTAMP_H__ */
--- /dev/null
+/*
+ * (C) Copyright 2008
+ * Niklaus Giger, niklaus.giger@member.fsf.org
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef _VXWORKS_H_
+#define _VXWORKS_H_
+
+int do_bootvx(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]);
+
+/*
+ * Use bootaddr to find the location in memory that VxWorks
+ * will look for the bootline string. The default value for
+ * PowerPC is LOCAL_MEM_LOCAL_ADRS + BOOT_LINE_OFFSET which
+ * defaults to 0x4200
+ */
+#ifndef CONFIG_SYS_VXWORKS_BOOT_ADDR
+#define CONFIG_SYS_VXWORKS_BOOT_ADDR 0x4200
+#endif
+
+#ifndef CONFIG_SYS_VXWORKS_BOOT_DEVICE
+#if defined(CONFIG_4xx)
+#define CONFIG_SYS_VXWORKS_BOOT_DEVICE "emac(0,0)"
+#elif defined(CONFIG_IOP480)
+#define CONFIG_SYS_VXWORKS_BOOT_DEVICE "dc(0,0)"
+#else
+#define CONFIG_SYS_VXWORKS_BOOT_DEVICE "eth(0,0)"
+#endif
+#endif
+
+#ifndef CONFIG_SYS_VXWORKS_SERVERNAME
+#define CONFIG_SYS_VXWORKS_SERVERNAME "srv"
+#endif
+
+#endif
#include <command.h>
#include <malloc.h>
#include <devices.h>
+#include <timestamp.h>
#include <version.h>
#include <net.h>
#include <serial.h>
#endif
const char version_string[] =
- U_BOOT_VERSION" (" __DATE__ " - " __TIME__ ")"CONFIG_IDENT_STRING;
+ U_BOOT_VERSION" (" U_BOOT_DATE " - " U_BOOT_TIME ")"CONFIG_IDENT_STRING;
#ifdef CONFIG_DRIVER_CS8900
extern void cs8900_get_enetaddr (uchar * addr);
#include <command.h>
#include <malloc.h>
#include <devices.h>
+#include <timestamp.h>
#include <version.h>
#include <net.h>
DECLARE_GLOBAL_DATA_PTR;
const char version_string[] =
- U_BOOT_VERSION " (" __DATE__ " - " __TIME__ ") " CONFIG_IDENT_STRING;
+ U_BOOT_VERSION " ("U_BOOT_DATE" - "U_BOOT_TIME") " CONFIG_IDENT_STRING;
unsigned long monitor_flash_len;
void (*theKernel)(int magic, void *tagtable);
struct tag *params, *params_start;
char *commandline = getenv("bootargs");
- int ret;
if ((flag != 0) && (flag != BOOTM_STATE_OS_GO))
return 1;
#include <i2c.h>
#include <malloc.h>
#include <net.h>
+#include <timestamp.h>
#include <version.h>
#include <asm/cplb.h>
DECLARE_GLOBAL_DATA_PTR;
-const char version_string[] = U_BOOT_VERSION " (" __DATE__ " - " __TIME__ ")";
+const char version_string[] = U_BOOT_VERSION " ("U_BOOT_DATE" - "U_BOOT_TIME")";
__attribute__((always_inline))
static inline void serial_early_puts(const char *s)
#include <watchdog.h>
#include <command.h>
#include <devices.h>
+#include <timestamp.h>
#include <version.h>
#include <malloc.h>
#include <net.h>
const char version_string[] =
- U_BOOT_VERSION" (" __DATE__ " - " __TIME__ ")";
+ U_BOOT_VERSION" (" U_BOOT_DATE " - " U_BOOT_TIME ")";
/*
#include <common.h>
#include <command.h>
#include <malloc.h>
+#include <timestamp.h>
#include <version.h>
#include <watchdog.h>
DECLARE_GLOBAL_DATA_PTR;
-const char version_string[] = U_BOOT_VERSION " (" __DATE__ " - " __TIME__ ")";
+const char version_string[] = U_BOOT_VERSION " ("U_BOOT_DATE" - "U_BOOT_TIME")";
#ifdef CONFIG_SYS_GPIO_0
extern int gpio_init (void);
#include <command.h>
#include <malloc.h>
#include <devices.h>
+#include <timestamp.h>
#include <version.h>
#include <net.h>
#include <environment.h>
ulong monitor_flash_len;
const char version_string[] =
- U_BOOT_VERSION" (" __DATE__ " - " __TIME__ ")";
+ U_BOOT_VERSION" (" U_BOOT_DATE " - " U_BOOT_TIME ")";
static char *failed = "*** failed ***\n";
#include <command.h>
#include <malloc.h>
#include <devices.h>
+#include <timestamp.h>
#include <version.h>
#include <watchdog.h>
#include <net.h>
extern int dram_init(void);
extern int timer_init(void);
-const char version_string[] = U_BOOT_VERSION" (" __DATE__ " - " __TIME__ ")";
+const char version_string[] = U_BOOT_VERSION" ("U_BOOT_DATE" - "U_BOOT_TIME")";
unsigned long monitor_flash_len = CONFIG_SYS_MONITOR_LEN;
#include <asm/byteorder.h>
#include <asm/prom.h>
#include <asm/cache.h>
+#include <image.h>
#define PRINT_KERNEL_HEADER
* From now on the only code in u-boot that will be
* executed is the PROM code.
*/
- kernel(kernel_arg_promvec, (void *)ep);
+ kernel(kernel_arg_promvec, (void *)images->ep);
/* It will never come to this... */
while (1) ;
#if defined(CONFIG_CMD_SNTP)
#include "sntp.h"
#endif
+#if defined(CONFIG_CDP_VERSION)
+#include <timestamp.h>
+#endif
#if defined(CONFIG_CMD_NET)
projects / oweals / u-boot.git / commitdiff