am335x_evm: Add support to boot from NOR.
authorSteve Kipisz <s-kipisz2@ti.com>
Thu, 18 Jul 2013 19:13:04 +0000 (15:13 -0400)
committerTom Rini <trini@ti.com>
Tue, 30 Jul 2013 13:21:41 +0000 (09:21 -0400)
NOR requires that s_init be within the first 4KiB of the image so that
we can perform the rest of the required pinmuxing to talk with the rest
of NOR that we are found on.  When NOR_BOOT is set we save our
environment in NOR at 512KiB and a redundant copy at 768KiB.  We avoid
using SPL for this case and u-boot.bin is written directly to the start
of NOR.

We enclose the DMM-related parts of arch/arm/cpu/armv7/am33xx/emif4.c
with TI81xx checks as at this time U-Boot does not discard unused
sections in the main build and this code relies on functions specific to
(and only provided in) ti81xx-related code.

Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Signed-off-by: Steve Kipisz <s-kipisz2@ti.com>
Signed-off-by: Tom Rini <trini@ti.com>
arch/arm/cpu/armv7/am33xx/board.c
arch/arm/cpu/armv7/am33xx/emif4.c
board/ti/am335x/Makefile
board/ti/am335x/board.c
board/ti/am335x/mux.c
board/ti/am335x/u-boot.lds [new file with mode: 0644]
boards.cfg
include/configs/am335x_evm.h

index 07ab91c3eea9e5e05d694a1c310fd0f091679114..f1623db13df48c3d7a06037f80464ed8e5a3bea1 100644 (file)
@@ -142,7 +142,7 @@ int arch_misc_init(void)
        return 0;
 }
 
-#ifdef CONFIG_SPL_BUILD
+#if defined(CONFIG_SPL_BUILD) || defined(CONFIG_NOR_BOOT)
 void rtc32k_enable(void)
 {
        struct rtc_regs *rtc = (struct rtc_regs *)RTC_BASE;
index ad7b70f93aefab865ec94d62eb57cf53377a9780..55dc3212ab66d1a68b8799a8cd0f90b21bbaee3e 100644 (file)
@@ -35,9 +35,11 @@ void dram_init_banksize(void)
 }
 
 
-#ifdef CONFIG_SPL_BUILD
+#if defined(CONFIG_SPL_BUILD) || defined(CONFIG_NOR_BOOT)
+#ifdef CONFIG_TI81XX
 static struct dmm_lisa_map_regs *hw_lisa_map_regs =
                                (struct dmm_lisa_map_regs *)DMM_BASE;
+#endif
 static struct vtp_reg *vtpreg[2] = {
                                (struct vtp_reg *)VTP0_CTRL_ADDR,
                                (struct vtp_reg *)VTP1_CTRL_ADDR};
@@ -45,6 +47,7 @@ static struct vtp_reg *vtpreg[2] = {
 static struct ddr_ctrl *ddrctrl = (struct ddr_ctrl *)DDR_CTRL_ADDR;
 #endif
 
+#ifdef CONFIG_TI81XX
 void config_dmm(const struct dmm_lisa_map_regs *regs)
 {
        enable_dmm_clocks();
@@ -59,6 +62,7 @@ void config_dmm(const struct dmm_lisa_map_regs *regs)
        writel(regs->dmm_lisa_map_1, &hw_lisa_map_regs->dmm_lisa_map_1);
        writel(regs->dmm_lisa_map_0, &hw_lisa_map_regs->dmm_lisa_map_0);
 }
+#endif
 
 static void config_vtp(int nr)
 {
index cb2b99902585d84ec1e974410f50cd069639a367..3dbeedab1a81cea2d4b6c4635a7b6d6bd88b02a3 100644 (file)
@@ -10,7 +10,7 @@ include $(TOPDIR)/config.mk
 
 LIB    = $(obj)lib$(BOARD).o
 
-ifdef CONFIG_SPL_BUILD
+ifeq ($(CONFIG_SPL_BUILD)$(CONFIG_NOR_BOOT),y)
 COBJS  := mux.o
 endif
 
index b12341d6e660ecc02ac1d62cbb3296ec4eb63c68..728afc2ba33bc3ee12b74c47f2100a300d7da14a 100644 (file)
@@ -83,7 +83,7 @@ static int read_eeprom(struct am335x_baseboard_id *header)
        return 0;
 }
 
-#ifdef CONFIG_SPL_BUILD
+#if defined(CONFIG_SPL_BUILD) || defined(CONFIG_NOR_BOOT)
 static const struct ddr_data ddr2_data = {
        .datardsratio0 = ((MT47H128M16RT25E_RD_DQS<<30) |
                          (MT47H128M16RT25E_RD_DQS<<20) |
@@ -249,9 +249,27 @@ int spl_start_uboot(void)
  */
 void s_init(void)
 {
-#ifdef CONFIG_SPL_BUILD
-       struct am335x_baseboard_id header;
+       __maybe_unused struct am335x_baseboard_id header;
 
+       /*
+        * The ROM will only have set up sufficient pinmux to allow for the
+        * first 4KiB NOR to be read, we must finish doing what we know of
+        * the NOR mux in this space in order to continue.
+        */
+#ifdef CONFIG_NOR_BOOT
+       asm("stmfd      sp!, {r2 - r4}");
+       asm("movw       r4, #0x8A4");
+       asm("movw       r3, #0x44E1");
+       asm("orr        r4, r4, r3, lsl #16");
+       asm("mov        r2, #9");
+       asm("mov        r3, #8");
+       asm("gpmc_mux:  str     r2, [r4], #4");
+       asm("subs       r3, r3, #1");
+       asm("bne        gpmc_mux");
+       asm("ldmfd      sp!, {r2 - r4}");
+#endif
+
+#ifdef CONFIG_SPL_BUILD
        /*
         * Save the boot parameters passed from romcode.
         * We cannot delay the saving further than this,
@@ -270,7 +288,7 @@ void s_init(void)
        while (readl(&wdtimer->wdtwwps) != 0x0)
                ;
 
-#ifdef CONFIG_SPL_BUILD
+#if defined(CONFIG_SPL_BUILD) || defined(CONFIG_NOR_BOOT)
        /* Setup the PLLs and the clocks for the peripherals */
        pll_init();
 
@@ -298,9 +316,16 @@ void s_init(void)
 
        uart_soft_reset();
 
+#if defined(CONFIG_NOR_BOOT)
+       /* We want our console now. */
+       gd->baudrate = CONFIG_BAUDRATE;
+       serial_init();
+       gd->have_console = 1;
+#else
        gd = &gdata;
 
        preloader_console_init();
+#endif
 
        /* Initalize the board header */
        enable_i2c0_pin_mux();
index 187468e24e17fd102e169ee056b5534bce9c7f38..5b7ed6383b507f6242f4f4d66713d27b8ae4ac99 100644 (file)
@@ -190,7 +190,7 @@ static struct module_pin_mux nand_pin_mux[] = {
        {-1},
 };
 
-#if defined(CONFIG_NOR)
+#if defined(CONFIG_NOR) && !defined(CONFIG_NOR_BOOT)
 static struct module_pin_mux bone_norcape_pin_mux[] = {
        {OFFSET(lcd_data0), MODE(1) | PULLUDEN | RXACTIVE},     /* NOR_A0 */
        {OFFSET(lcd_data1), MODE(1) | PULLUDEN | RXACTIVE},     /* NOR_A1 */
@@ -317,8 +317,10 @@ void enable_board_pin_mux(struct am335x_baseboard_id *header)
                configure_module_pin_mux(i2c1_pin_mux);
                configure_module_pin_mux(mii1_pin_mux);
                configure_module_pin_mux(mmc0_pin_mux);
+#ifndef CONFIG_NOR
                configure_module_pin_mux(mmc1_pin_mux);
-#if defined(CONFIG_NOR)
+#endif
+#if defined(CONFIG_NOR) && !defined(CONFIG_NOR_BOOT)
                configure_module_pin_mux(bone_norcape_pin_mux);
 #endif
        } else if (board_is_gp_evm(header)) {
diff --git a/board/ti/am335x/u-boot.lds b/board/ti/am335x/u-boot.lds
new file mode 100644 (file)
index 0000000..a173f62
--- /dev/null
@@ -0,0 +1,117 @@
+/*
+ * Copyright (c) 2004-2008 Texas Instruments
+ *
+ * (C) Copyright 2002
+ * Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
+OUTPUT_ARCH(arm)
+ENTRY(_start)
+SECTIONS
+{
+       . = 0x00000000;
+
+       . = ALIGN(4);
+       .text :
+       {
+               *(.__image_copy_start)
+               CPUDIR/start.o (.text*)
+               board/ti/am335x/libam335x.o (.text*)
+               *(.text*)
+       }
+
+       . = ALIGN(4);
+       .rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) }
+
+       . = ALIGN(4);
+       .data : {
+               *(.data*)
+       }
+
+       . = ALIGN(4);
+
+       . = .;
+
+       . = ALIGN(4);
+       .u_boot_list : {
+               KEEP(*(SORT(.u_boot_list*)));
+       }
+
+       . = ALIGN(4);
+
+       .image_copy_end :
+       {
+               *(.__image_copy_end)
+       }
+
+       .rel_dyn_start :
+       {
+               *(.__rel_dyn_start)
+       }
+
+       .rel.dyn : {
+               *(.rel*)
+       }
+
+       .rel_dyn_end :
+       {
+               *(.__rel_dyn_end)
+       }
+
+       _end = .;
+
+       /*
+        * Deprecated: this MMU section is used by pxa at present but
+        * should not be used by new boards/CPUs.
+        */
+       . = ALIGN(4096);
+       .mmutable : {
+               *(.mmutable)
+       }
+
+/*
+ * Compiler-generated __bss_start and __bss_end, see arch/arm/lib/bss.c
+ * __bss_base and __bss_limit are for linker only (overlay ordering)
+ */
+
+       .bss_start __rel_dyn_start (OVERLAY) : {
+               KEEP(*(.__bss_start));
+               __bss_base = .;
+       }
+
+       .bss __bss_base (OVERLAY) : {
+               *(.bss*)
+                . = ALIGN(4);
+                __bss_limit = .;
+       }
+
+       .bss_end __bss_limit (OVERLAY) : {
+               KEEP(*(.__bss_end));
+       }
+
+       /DISCARD/ : { *(.dynsym) }
+       /DISCARD/ : { *(.dynstr*) }
+       /DISCARD/ : { *(.dynamic*) }
+       /DISCARD/ : { *(.plt*) }
+       /DISCARD/ : { *(.interp*) }
+       /DISCARD/ : { *(.gnu*) }
+}
index 4c90579d57d032fd72b71257b7211562c2872511..8f1da74ed5dd39beb1a54197d3f49cf8591a1ee6 100644 (file)
@@ -243,6 +243,7 @@ vexpress_ca5x2               arm         armv7       vexpress            armltd
 vexpress_ca9x4               arm         armv7       vexpress            armltd
 am335x_evm                   arm         armv7       am335x              ti             am33xx      am335x_evm:SERIAL1,CONS_INDEX=1
 am335x_evm_nor               arm         armv7       am335x              ti             am33xx      am335x_evm:SERIAL1,CONS_INDEX=1,NOR
+am335x_evm_norboot           arm         armv7       am335x              ti             am33xx      am335x_evm:SERIAL1,CONS_INDEX=1,NOR,NOR_BOOT
 am335x_evm_spiboot           arm         armv7       am335x              ti             am33xx      am335x_evm:SERIAL1,CONS_INDEX=1,SPI_BOOT
 am335x_evm_uart1             arm         armv7       am335x              ti             am33xx      am335x_evm:SERIAL2,CONS_INDEX=2
 am335x_evm_uart2             arm         armv7       am335x              ti             am33xx      am335x_evm:SERIAL3,CONS_INDEX=3
index 48491e7d51b0af554083f947a238f0c2adad0b88..3ca35c32dca768fb0b9d77fee8efe15aede8950d 100644 (file)
@@ -40,6 +40,9 @@
 #define CONFIG_SETUP_MEMORY_TAGS
 #define CONFIG_INITRD_TAG
 
+/* Custom script for NOR */
+#define CONFIG_SYS_LDSCRIPT            "board/ti/am335x/u-boot.lds"
+
 #define CONFIG_SYS_CACHELINE_SIZE       64
 
 /* commands to include */
 #define CONFIG_ENV_OVERWRITE           1
 #define CONFIG_SYS_CONSOLE_INFO_QUIET
 
+#ifndef CONFIG_NOR_BOOT
 /* Defines for SPL */
 #define CONFIG_SPL
 #define CONFIG_SPL_FRAMEWORK
 #define CONFIG_SPL_NAND_BASE
 #define CONFIG_SPL_NAND_DRIVERS
 #define CONFIG_SPL_NAND_ECC
+#endif
 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
 #define CONFIG_SYS_NAND_PAGE_COUNT     (CONFIG_SYS_NAND_BLOCK_SIZE / \
                                         CONFIG_SYS_NAND_PAGE_SIZE)
  * header. That is 0x800FFFC0--0x80100000 should not be used for any
  * other needs.
  */
+#ifdef CONFIG_NOR_BOOT
+#define CONFIG_SYS_TEXT_BASE           0x08000000
+#else
 #define CONFIG_SYS_TEXT_BASE           0x80800000
+#endif
 #define CONFIG_SYS_SPL_MALLOC_START    0x80a08000
 #define CONFIG_SYS_SPL_MALLOC_SIZE     0x100000
 
 /* Since SPL did pll and ddr initialization for us,
  * we don't need to do it twice.
  */
-#ifndef CONFIG_SPL_BUILD
+#if !defined(CONFIG_SPL_BUILD) && !defined(CONFIG_NOR_BOOT)
 #define CONFIG_SKIP_LOWLEVEL_INIT
 #endif
 
                                                        /* CS0 */
 #define CONFIG_SYS_MAX_NAND_DEVICE     1               /* Max number of NAND
                                                           devices */
-#if !defined(CONFIG_SPI_BOOT)
+#if !defined(CONFIG_SPI_BOOT) && !defined(CONFIG_NOR_BOOT)
 #define MTDIDS_DEFAULT                 "nand0=omap2-nand.0"
 #define MTDPARTS_DEFAULT               "mtdparts=omap2-nand.0:128k(SPL)," \
                                        "128k(SPL.backup1)," \
 #define CONFIG_SYS_FLASH_BASE          (0x08000000)
 #define CONFIG_SYS_FLASH_CFI_WIDTH     FLASH_CFI_16BIT
 #define CONFIG_SYS_MONITOR_BASE                CONFIG_SYS_FLASH_BASE
+#ifdef CONFIG_NOR_BOOT
+#define CONFIG_ENV_IS_IN_FLASH
+#define CONFIG_ENV_SECT_SIZE           (128 << 10)     /* 128 KiB */
+#define CONFIG_ENV_OFFSET              (512 << 10)     /* 512 KiB */
+#define CONFIG_ENV_OFFSET_REDUND       (768 << 10)     /* 768 KiB */
+#define CONFIG_CMD_MTDPARTS
+#define MTDIDS_DEFAULT                 "nor0=physmap-flash.0"
+#define MTDPARTS_DEFAULT               "mtdparts=physmap-flash.0:" \
+                                       "512k(u-boot)," \
+                                       "128k(u-boot-env1)," \
+                                       "128k(u-boot-env2)," \
+                                       "4m(kernel),-(rootfs)"
+#endif
 #define CONFIG_MTD_DEVICE
 #define CONFIG_CMD_FLASH
 #endif  /* NOR support */