- compatible: must be "st,stm32mp1-usbphyc"
- reg: address and length of the usb phy control register set
- clocks: phandle + clock specifier for the PLL phy clock
+- vdda1v1-supply: phandle to the regulator providing 1V1 power to the PHY
+- vdda1v8-supply: phandle to the regulator providing 1V8 power to the PHY
- #address-cells: number of address cells for phys sub-nodes, must be <1>
- #size-cells: number of size cells for phys sub-nodes, must be <0>
- reg: phy port index
- phy-supply: phandle to the regulator providing 3V3 power to the PHY,
see phy-bindings.txt in the same directory.
-- vdda1v1-supply: phandle to the regulator providing 1V1 power to the PHY
-- vdda1v8-supply: phandle to the regulator providing 1V8 power to the PHY
- #phy-cells: see phy-bindings.txt in the same directory, must be <0> for PHY
port#1 and must be <1> for PHY port#2, to select USB controller
struct stm32_usbphyc {
fdt_addr_t base;
struct clk clk;
+ struct udevice *vdda1v1;
+ struct udevice *vdda1v8;
struct stm32_usbphyc_phy {
struct udevice *vdd;
- struct udevice *vdda1v1;
- struct udevice *vdda1v8;
bool init;
bool powered;
} phys[MAX_PHYS];
int ret;
pr_debug("%s phy ID = %lu\n", __func__, phy->id);
- if (usbphyc_phy->vdda1v1) {
- ret = regulator_set_enable(usbphyc_phy->vdda1v1, true);
+ if (usbphyc->vdda1v1) {
+ ret = regulator_set_enable(usbphyc->vdda1v1, true);
if (ret)
return ret;
}
- if (usbphyc_phy->vdda1v8) {
- ret = regulator_set_enable(usbphyc_phy->vdda1v8, true);
+ if (usbphyc->vdda1v8) {
+ ret = regulator_set_enable(usbphyc->vdda1v8, true);
if (ret)
return ret;
}
- if (usbphyc_phy->vdd) {
- ret = regulator_set_enable(usbphyc_phy->vdd, true);
+
+ if (usbphyc->vdd) {
+ ret = regulator_set_enable(usbphyc->vdd, true);
if (ret)
return ret;
}
if (stm32_usbphyc_is_powered(usbphyc))
return 0;
- if (usbphyc_phy->vdda1v1) {
- ret = regulator_set_enable(usbphyc_phy->vdda1v1, false);
+ if (usbphyc->vdda1v1) {
+ ret = regulator_set_enable(usbphyc->vdda1v1, false);
if (ret)
return ret;
}
- if (usbphyc_phy->vdda1v8) {
- ret = regulator_set_enable(usbphyc_phy->vdda1v8, false);
+ if (usbphyc->vdda1v8) {
+ ret = regulator_set_enable(usbphyc->vdda1v8, false);
if (ret)
return ret;
}
- if (usbphyc_phy->vdd) {
- ret = regulator_set_enable(usbphyc_phy->vdd, false);
+ if (usbphyc->vdd) {
+ ret = regulator_set_enable(usbphyc->vdd, false);
if (ret)
return ret;
}
reset_deassert(&reset);
}
+ /* get usbphyc regulator */
+ ret = device_get_supply_regulator(dev, "vdda1v1-supply",
+ &usbphyc->vdda1v1);
+ if (ret) {
+ dev_err(dev, "Can't get vdda1v1-supply regulator\n");
+ return ret;
+ }
+
+ ret = device_get_supply_regulator(dev, "vdda1v8-supply",
+ &usbphyc->vdda1v8);
+ if (ret) {
+ dev_err(dev, "Can't get vdda1v8-supply regulator\n");
+ return ret;
+ }
+
/*
* parse all PHY subnodes in order to populate regulator associated
* to each PHY port
if (ret)
return ret;
- ret = stm32_usbphyc_get_regulator(dev, node, "vdda1v1-supply",
- &usbphyc_phy->vdda1v1);
- if (ret)
- return ret;
-
- ret = stm32_usbphyc_get_regulator(dev, node, "vdda1v8-supply",
- &usbphyc_phy->vdda1v8);
- if (ret)
- return ret;
-
node = dev_read_next_subnode(node);
}