arm: socfpga: Do not enable gmac1 in Cyclone V dtsi

The GMAC which is enabled is purely board property, so do not enable
arbitrary GMAC in DT include files. Same goes for PHY mode, which is
again a board property. The CycloneV SoCDK does this correctly, but
SoCrates doesn't. This bug never manifested itself though, since all
the boards ever used the GMAC1 . This bug manifests itself only on
boards that utilise GMAC0.

Signed-off-by: Marek Vasut <marex@denx.de>

diff --git a/arch/arm/dts/socfpga_cyclone5.dtsi b/arch/arm/dts/socfpga_cyclone5.dtsi
index 234a901205765803b63292dae389285fa28fe1ed..de362099db686a5093ae24d461293ac984fe4850 100644 (file)
--- a/arch/arm/dts/socfpga_cyclone5.dtsi
+++ b/arch/arm/dts/socfpga_cyclone5.dtsi
@@ -27,12 +27,6 @@
                        cap-sd-highspeed;
                };
 
-               ethernet@ff702000 {
-                       phy-mode = "rgmii";
-                       phy-addr = <0xffffffff>; /* probe for phy addr */
-                       status = "okay";
-               };
-
                sysmgr@ffd08000 {
                        cpu1-start-addr = <0xffd080c4>;
                };

diff --git a/arch/arm/dts/socfpga_cyclone5_socrates.dts b/arch/arm/dts/socfpga_cyclone5_socrates.dts
index 3c985584d13b67d901780642d401e5959a456720..6782691f73508da70fd41b797ab4c0c1507e03f4 100644 (file)
--- a/arch/arm/dts/socfpga_cyclone5_socrates.dts
+++ b/arch/arm/dts/socfpga_cyclone5_socrates.dts
@@ -23,6 +23,7 @@
 
 &gmac1 {
        status = "okay";
+       phy-mode = "rgmii";
 };
 
 &i2c0 {