sunxi: Display: Add support for eDP panels connected via an anx9804 bridge
authorHans de Goede <hdegoede@redhat.com>
Sat, 8 Aug 2015 14:13:53 +0000 (16:13 +0200)
committerHans de Goede <hdegoede@redhat.com>
Fri, 14 Aug 2015 06:51:46 +0000 (08:51 +0200)
Add support for 4 1.62G lane eDP panels connected via an anx9804 bridge,
such as found on the Colombus devkit.

While at it also fix the wrong indentation of the SSD2828 Kconfig help text
in board/sunxi/Kconfig.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
board/sunxi/Kconfig
configs/Colombus_defconfig
drivers/video/sunxi_display.c
include/configs/sunxi-common.h

index 13f453733f1ee637c204260687adee8c90771355..fd6668fea2d040da27da3befff6c5bc84c1f4dc6 100644 (file)
@@ -526,7 +526,16 @@ config VIDEO_LCD_PANEL_MIPI_4_LANE_513_MBPS_VIA_SSD2828
        select VIDEO_LCD_SSD2828
        select VIDEO_LCD_IF_PARALLEL
        ---help---
-        7.85" 768x1024 LCD panels, such as LG LP079X01 or AUO B079XAN01.0
+       7.85" 768x1024 LCD panels, such as LG LP079X01 or AUO B079XAN01.0
+
+config VIDEO_LCD_PANEL_EDP_4_LANE_1620M_VIA_ANX9804
+       bool "eDP 4-lane, 1.62G LCD panel via ANX9804 bridge chip"
+       select VIDEO_LCD_ANX9804
+       select VIDEO_LCD_IF_PARALLEL
+       select VIDEO_LCD_PANEL_I2C
+       ---help---
+       Select this for eDP LCD panels with 4 lanes running at 1.62G,
+       connected via an ANX9804 bridge chip.
 
 config VIDEO_LCD_PANEL_HITACHI_TX18D42VM
        bool "Hitachi tx18d42vm LCD panel"
index 7fa9ef1efffc21d0acad9084581a20d2271fb4fe..35f644a218fd0e1e91121dc6e5443ccc72a70e10 100644 (file)
@@ -4,6 +4,16 @@ CONFIG_MACH_SUN6I=y
 CONFIG_DRAM_CLK=240
 CONFIG_DRAM_ZQ=251
 CONFIG_USB1_VBUS_PIN=""
+CONFIG_I2C0_ENABLE=y
+CONFIG_AXP_GPIO=y
+CONFIG_VIDEO_LCD_MODE="x:2048,y:1536,depth:24,pclk_khz:208000,le:5,ri:150,up:9,lo:24,hs:5,vs:1,sync:3,vmode:0"
+CONFIG_VIDEO_LCD_DCLK_PHASE=0
+CONFIG_VIDEO_LCD_POWER="PH27"
+CONFIG_VIDEO_LCD_BL_EN="PM1"
+CONFIG_VIDEO_LCD_BL_PWM="PH13"
+CONFIG_VIDEO_LCD_PANEL_I2C_SDA="PA23"
+CONFIG_VIDEO_LCD_PANEL_I2C_SCL="PA24"
+CONFIG_VIDEO_LCD_PANEL_EDP_4_LANE_1620M_VIA_ANX9804=y
 CONFIG_DEFAULT_DEVICE_TREE="sun6i-a31-colombus"
 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
 CONFIG_SPL=y
@@ -13,4 +23,5 @@ CONFIG_SYS_EXTRA_OPTIONS="SUNXI_GMAC,RGMII"
 # CONFIG_CMD_FPGA is not set
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_AXP221_ALDO1_VOLT=3300
+CONFIG_AXP221_ELDO3_VOLT=1800
 CONFIG_USB_EHCI_HCD=y
index 06ed5c760318a765d0f30489569601f0f2a62269..fc1aea3f06f2dd7f84fe84f912fc4c5667336f0b 100644 (file)
@@ -15,6 +15,7 @@
 #include <asm/global_data.h>
 #include <asm/gpio.h>
 #include <asm/io.h>
+#include <axp221.h>
 #include <errno.h>
 #include <fdtdec.h>
 #include <fdt_support.h>
@@ -22,6 +23,7 @@
 #include <malloc.h>
 #include <video_fb.h>
 #include "videomodes.h"
+#include "anx9804.h"
 #include "hitachi_tx18d42vm_lcd.h"
 #include "ssd2828.h"
 
@@ -765,13 +767,17 @@ static void sunxi_lcdc_tcon0_mode_set(const struct ctfb_res_modes *mode,
                (struct sunxi_lcdc_reg *)SUNXI_LCD0_BASE;
        int bp, clk_delay, clk_div, clk_double, pin, total, val;
 
-       for (pin = SUNXI_GPD(0); pin <= SUNXI_GPD(27); pin++)
+       for (pin = SUNXI_GPD(0); pin <= SUNXI_GPD(27); pin++) {
 #ifdef CONFIG_VIDEO_LCD_IF_PARALLEL
                sunxi_gpio_set_cfgpin(pin, SUNXI_GPD_LCD0);
 #endif
 #ifdef CONFIG_VIDEO_LCD_IF_LVDS
                sunxi_gpio_set_cfgpin(pin, SUNXI_GPD_LVDS0);
 #endif
+#ifdef CONFIG_VIDEO_LCD_PANEL_EDP_4_LANE_1620M_VIA_ANX9804
+               sunxi_gpio_set_drv(pin, 3);
+#endif
+       }
 
        sunxi_lcdc_pll_set(0, mode->pixclock_khz, &clk_div, &clk_double);
 
@@ -1208,6 +1214,17 @@ static void sunxi_mode_set(const struct ctfb_res_modes *mode,
                break;
        case sunxi_monitor_lcd:
                sunxi_lcdc_panel_enable();
+               if (IS_ENABLED(CONFIG_VIDEO_LCD_PANEL_EDP_4_LANE_1620M_VIA_ANX9804)) {
+                       /*
+                        * The anx9804 needs 1.8V from eldo3, we do this here
+                        * and not via CONFIG_AXP221_ELDO3 from board_init()
+                        * to avoid turning this on when using hdmi output.
+                        */
+                       axp221_set_eldo(3, 1800);
+                       anx9804_init(CONFIG_VIDEO_LCD_I2C_BUS, 4,
+                                    ANX9804_DATA_RATE_1620M,
+                                    sunxi_display.depth);
+               }
                if (IS_ENABLED(CONFIG_VIDEO_LCD_HITACHI_TX18D42VM)) {
                        mdelay(50); /* Wait for lcd controller power on */
                        hitachi_tx18d42vm_init();
index 7608f121caf3d3d24685d774d68b295d75b95c72..1abf73c311792b21f2fa40857b5f11e43fbd76cc 100644 (file)
@@ -288,7 +288,11 @@ extern int soft_i2c_gpio_scl;
  * The amount of RAM to keep free at the top of RAM when relocating u-boot,
  * to use as framebuffer. This must be a multiple of 4096.
  */
+#ifdef CONFIG_VIDEO_LCD_PANEL_EDP_4_LANE_1620M_VIA_ANX9804
+#define CONFIG_SUNXI_MAX_FB_SIZE (12 << 20)
+#else
 #define CONFIG_SUNXI_MAX_FB_SIZE (9 << 20)
+#endif
 
 /* Do we want to initialize a simple FB? */
 #define CONFIG_VIDEO_DT_SIMPLEFB