rockchip: rk3036: Add core Soc start-up code
authorhuang lin <hl@rock-chips.com>
Tue, 17 Nov 2015 06:20:27 +0000 (14:20 +0800)
committerSimon Glass <sjg@chromium.org>
Tue, 1 Dec 2015 15:07:22 +0000 (08:07 -0700)
rk3036 only 4K size SRAM for SPL, so only support
timer, uart, sdram driver in SPL stage, when finish
initial sdram, back to bootrom.And in rk3036 sdmmc and
debug uart use same iomux, so if you want to boot from
sdmmc, you must disable debug uart.

Signed-off-by: Lin Huang <hl@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
Fixed build error for chromebook_jerry, firefly-rk3288:
Signed-off-by: Simon Glass <sjg@chromium.org>
Series-changes: 8
- Fix build error for chromebook_jerry, firefly-rk3288

arch/arm/mach-rockchip/Kconfig
arch/arm/mach-rockchip/Makefile
arch/arm/mach-rockchip/board.c
arch/arm/mach-rockchip/rk3036-board-spl.c [new file with mode: 0644]
arch/arm/mach-rockchip/rk3036/Kconfig [new file with mode: 0644]
arch/arm/mach-rockchip/rk3036/Makefile
arch/arm/mach-rockchip/rk3036/save_boot_param.S [new file with mode: 0644]
include/configs/rk3036_common.h [new file with mode: 0644]

index fa1f4267537fd48e07ce172f2b4b42eb2408f37c..a2069f878d94db0662d210c51d00e66360a0f25b 100644 (file)
@@ -9,6 +9,14 @@ config ROCKCHIP_RK3288
          and video codec support. Peripherals include Gigabit Ethernet,
          USB2 host and OTG, SDIO, I2S, UART,s, SPI, I2C and PWMs.
 
+config ROCKCHIP_RK3036
+       bool "Support Rockchip RK3036"
+       help
+         The Rockchip RK3036 is a ARM-based SoC with a dual-core Cortex-A7
+         including NEON and GPU, Mali-400 graphics, several DDR3 options
+         and video codec support. Peripherals include Gigabit Ethernet,
+         USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs.
+
 config SYS_MALLOC_F
        default y
 
@@ -31,5 +39,5 @@ config DM_GPIO
        default y
 
 source "arch/arm/mach-rockchip/rk3288/Kconfig"
-
+source "arch/arm/mach-rockchip/rk3036/Kconfig"
 endif
index a29675ddf1d661aa704df48596381470b5bb9a6b..b703c3c1f2cb00f1b408af6f41db4b8ed52fe1b1 100644 (file)
@@ -6,10 +6,12 @@
 
 ifdef CONFIG_SPL_BUILD
 obj-$(CONFIG_ROCKCHIP_RK3288) += rk3288-board-spl.o
+obj-$(CONFIG_ROCKCHIP_RK3036) += rk3036-board-spl.o
 else
-obj-y += board.o
+obj-$(CONFIG_ROCKCHIP_RK3288) += board.o
 endif
 obj-y += rk_timer.o
 obj-y += rk_early_print.o
 obj-$(CONFIG_$(SPL_)ROCKCHIP_COMMON) += common.o
 obj-$(CONFIG_ROCKCHIP_RK3288) += rk3288/
+obj-$(CONFIG_ROCKCHIP_RK3036) += rk3036/
index 688bc0ffded2e2de2e3f5a5e0903eb449fce1cad..f026abf0b1681923a79ca53331237ecbfa21e81f 100644 (file)
@@ -7,6 +7,7 @@
 #include <common.h>
 #include <dm.h>
 #include <ram.h>
+#include <asm/io.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
diff --git a/arch/arm/mach-rockchip/rk3036-board-spl.c b/arch/arm/mach-rockchip/rk3036-board-spl.c
new file mode 100644 (file)
index 0000000..3a1491c
--- /dev/null
@@ -0,0 +1,55 @@
+/*
+ * (C) Copyright 2015 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <common.h>
+#include <asm/io.h>
+#include <asm/arch/grf_rk3036.h>
+#include <asm/arch/hardware.h>
+#include <asm/arch/sdram_rk3036.h>
+#include <asm/arch/timer.h>
+#include <asm/arch/uart.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#define GRF_BASE       0x20008000
+static struct rk3036_grf * const grf = (void *)GRF_BASE;
+
+#define DEBUG_UART_BASE        0x20068000
+
+extern void back_to_bootrom(void);
+
+void board_init_f(ulong dummy)
+{
+#ifdef EARLY_DEBUG
+       /*
+        * NOTE: sd card and debug uart use same iomux in rk3036,
+        * so if you enable uart,
+        * you can not boot from sdcard
+        */
+       rk_clrsetreg(&grf->gpio1c_iomux,
+                    GPIO1C3_MASK << GPIO1C3_SHIFT |
+                    GPIO1C2_MASK << GPIO1C2_SHIFT,
+                    GPIO1C3_UART2_SOUT << GPIO1C3_SHIFT |
+                    GPIO1C2_UART2_SIN << GPIO1C2_SHIFT);
+       rk_uart_init((void *)DEBUG_UART_BASE);
+#endif
+       rockchip_timer_init();
+       sdram_init();
+
+       /* return to maskrom */
+       back_to_bootrom();
+}
+
+/* Place Holders */
+void board_init_r(gd_t *id, ulong dest_addr)
+{
+       /*
+        * Function attribute is no-return
+        * This Function never executes
+        */
+       while (1)
+               ;
+}
diff --git a/arch/arm/mach-rockchip/rk3036/Kconfig b/arch/arm/mach-rockchip/rk3036/Kconfig
new file mode 100644 (file)
index 0000000..d76d5e1
--- /dev/null
@@ -0,0 +1,3 @@
+if ROCKCHIP_RK3036
+
+endif
index 6095777b8fcf2b1b1d1ec3dfc4c78566fabe2648..97d299d6cc6963efde70d88678d74c8773de528c 100644 (file)
@@ -10,3 +10,4 @@ obj-y += syscon_rk3036.o
 endif
 
 obj-y += sdram_rk3036.o
+obj-y += save_boot_param.o
diff --git a/arch/arm/mach-rockchip/rk3036/save_boot_param.S b/arch/arm/mach-rockchip/rk3036/save_boot_param.S
new file mode 100644 (file)
index 0000000..778ec83
--- /dev/null
@@ -0,0 +1,32 @@
+/*
+ * (C) Copyright 2015 Google, Inc
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#include <linux/linkage.h>
+
+.globl SAVE_SP_ADDR
+SAVE_SP_ADDR:
+       .word 0
+
+/*
+ * void save_boot_params
+ *
+ * Save sp, lr, r1~r12
+ */
+ENTRY(save_boot_params)
+       push    {r1-r12, lr}
+       ldr     r0, =SAVE_SP_ADDR
+       str     sp, [r0]
+       b       save_boot_params_ret            @ back to my caller
+ENDPROC(save_boot_params)
+
+
+.globl back_to_bootrom
+ENTRY(back_to_bootrom)
+       ldr     r0, =SAVE_SP_ADDR
+       ldr     sp, [r0]
+       mov     r0, #0
+       pop     {r1-r12, pc}
+ENDPROC(back_to_bootrom)
diff --git a/include/configs/rk3036_common.h b/include/configs/rk3036_common.h
new file mode 100644 (file)
index 0000000..525fabc
--- /dev/null
@@ -0,0 +1,103 @@
+/*
+ * (C) Copyright 2015 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+#ifndef __CONFIG_RK3036_COMMON_H
+#define __CONFIG_RK3036_COMMON_H
+
+#include <asm/arch/hardware.h>
+
+#define CONFIG_SYS_NO_FLASH
+#define CONFIG_NR_DRAM_BANKS           1
+#define CONFIG_ENV_IS_NOWHERE
+#define CONFIG_ENV_SIZE                        0x2000
+#define CONFIG_SYS_MAXARGS             16
+#define CONFIG_BAUDRATE                        115200
+#define CONFIG_SYS_MALLOC_LEN          (32 << 20)
+#define CONFIG_SYS_CBSIZE              1024
+#define CONFIG_SKIP_LOWLEVEL_INIT
+#define CONFIG_SYS_THUMB_BUILD
+#define CONFIG_DISPLAY_BOARDINFO
+
+#define CONFIG_SYS_TIMER_RATE          (24 * 1000 * 1000)
+#define CONFIG_SYS_TIMER_BASE          0x200440a0 /* TIMER5 */
+#define CONFIG_SYS_TIMER_COUNTER       (CONFIG_SYS_TIMER_BASE + 8)
+
+#define CONFIG_SYS_NS16550
+#define CONFIG_SYS_NS16550_MEM32
+
+#ifdef CONFIG_SPL_BUILD
+#define CONFIG_SYS_MALLOC_SIMPLE
+#endif
+
+#define CONFIG_SYS_TEXT_BASE           0x60000000
+#define CONFIG_SYS_INIT_SP_ADDR                0x60100000
+#define CONFIG_SYS_LOAD_ADDR           0x60800800
+#define CONFIG_SPL_STACK               0x10081fff
+#define CONFIG_SPL_TEXT_BASE           0x10081004
+
+#define CONFIG_ROCKCHIP_MAX_INIT_SIZE  (4 << 10)
+#define CONFIG_ROCKCHIP_CHIP_TAG       "RK30"
+
+#define CONFIG_ROCKCHIP_COMMON
+
+/* MMC/SD IP block */
+#define CONFIG_MMC
+#define CONFIG_GENERIC_MMC
+#define CONFIG_CMD_MMC
+#define CONFIG_SDHCI
+#define CONFIG_DWMMC
+#define CONFIG_BOUNCE_BUFFER
+
+#define CONFIG_DOS_PARTITION
+#define CONFIG_CMD_FAT
+#define CONFIG_FAT_WRITE
+#define CONFIG_CMD_EXT2
+#define CONFIG_CMD_EXT4
+#define CONFIG_CMD_FS_GENERIC
+#define CONFIG_PARTITION_UUIDS
+#define CONFIG_CMD_PART
+
+#define CONFIG_CMD_CACHE
+#define CONFIG_CMD_TIME
+
+#define CONFIG_SYS_SDRAM_BASE          0x60000000
+#define CONFIG_NR_DRAM_BANKS           1
+#define SDRAM_BANK_SIZE                        (512UL << 20UL)
+
+#define CONFIG_SPI_FLASH
+#define CONFIG_SPI
+#define CONFIG_CMD_SF
+#define CONFIG_CMD_SPI
+#define CONFIG_SPI_FLASH_GIGADEVICE
+#define CONFIG_SF_DEFAULT_SPEED 20000000
+
+#define CONFIG_CMD_I2C
+
+#ifndef CONFIG_SPL_BUILD
+#include <config_distro_defaults.h>
+
+#define ENV_MEM_LAYOUT_SETTINGS \
+       "scriptaddr=0x60000000\0" \
+       "pxefile_addr_r=0x60100000\0" \
+       "fdt_addr_r=0x61f00000\0" \
+       "kernel_addr_r=0x62000000\0" \
+       "ramdisk_addr_r=0x64000000\0"
+
+/* First try to boot from SD (index 0), then eMMC (index 1 */
+#define BOOT_TARGET_DEVICES(func) \
+       func(MMC, mmc, 0) \
+       func(MMC, mmc, 1)
+
+#include <config_distro_bootcmd.h>
+
+/* Linux fails to load the fdt if it's loaded above 512M on a evb-rk3036 board,
+ * so limit the fdt reallocation to that */
+#define CONFIG_EXTRA_ENV_SETTINGS \
+       "fdt_high=0x7fffffff\0" \
+       ENV_MEM_LAYOUT_SETTINGS \
+       BOOTENV
+#endif
+
+#endif