// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright 2011 Freescale Semiconductor
+ * Copyright 2020 NXP
* Author: Shengzhou Liu <Shengzhou.Liu@freescale.com>
*
* This file provides support for the QIXIS of some Freescale reference boards.
#ifdef QIXIS_LBMAP_EMMC
QIXIS_WRITE(rst_ctl, 0x30);
QIXIS_WRITE(rcfg_ctl, 0);
+#ifndef NON_EXTENDED_DUTCFG
set_lbmap(QIXIS_LBMAP_EMMC);
+#endif
set_rcw_src(QIXIS_RCW_SRC_EMMC);
QIXIS_WRITE(rcfg_ctl, QIXIS_RCFG_CTL_RECONFIG_IDLE);
QIXIS_WRITE(rcfg_ctl, QIXIS_RCFG_CTL_RECONFIG_START);
"qixis watchdog <watchdog_period> - set the watchdog period\n"
" period: 1s 2s 4s 8s 16s 32s 1min 2min 4min 8min\n"
"qixis_reset dump - display the QIXIS registers\n"
+ "qixis_reset emmc - reset to emmc\n"
"qixis_reset switch - display switch\n"
);
#endif
if (src == BOOT_SOURCE_SD_MMC) {
puts("SD\n");
+ } else if (src == BOOT_SOURCE_SD_MMC2) {
+ puts("eMMC\n");
} else {
sw = QIXIS_READ(brdcfg[0]);
sw = (sw >> QIXIS_XMAP_SHIFT) & QIXIS_XMAP_MASK;
#define QIXIS_RCFG_CTL_WATCHDOG_ENBLE 0x08
#define QIXIS_LBMAP_MASK 0x0f
#define QIXIS_LBMAP_SD
+#define QIXIS_LBMAP_EMMC
#define QIXIS_RCW_SRC_SD 0x08
+#define QIXIS_RCW_SRC_EMMC 0x09
#define NON_EXTENDED_DUTCFG
#define QIXIS_SDID_MASK 0x07
#define QIXIS_ESDHC_NO_ADAPTER 0x7
#define QIXIS_RCFG_CTL_WATCHDOG_ENBLE 0x08
#define QIXIS_LBMAP_MASK 0x0f
#define QIXIS_LBMAP_SD
+#define QIXIS_LBMAP_EMMC
#define QIXIS_RCW_SRC_SD 0x08
+#define QIXIS_RCW_SRC_EMMC 0x09
#define NON_EXTENDED_DUTCFG
/* VID */