Fix CONFIG_440_GX define usage.
authorMarian Balakowicz <m8@semihalf.com>
Fri, 30 Jun 2006 16:35:04 +0000 (18:35 +0200)
committerMarian Balakowicz <m8@semihalf.com>
Fri, 30 Jun 2006 16:35:04 +0000 (18:35 +0200)
CHANGELOG
cpu/ppc4xx/start.S
include/ppc440.h

index 3082b63ff01cc53a8f2346a8c3d91501c54ed0f3..7eb78c23a2bb2d1bd76f96b83d1fe712dde727f5 100644 (file)
--- a/CHANGELOG
+++ b/CHANGELOG
@@ -2,6 +2,8 @@
 Changes since U-Boot 1.1.4:
 ======================================================================
 
+* Fix CONFIG_440_GX define usage.
+
 * Remove autogenerated bmp_logo.h file.
 
 * VoiceBlue update: use new MTD flash partitioning methods, use more
index f37c1d6297678065b8e3b6a07582438fb8ac2f22..17d3aa32ed1f75962875c00f1136d640c7d3cc7f 100644 (file)
@@ -1468,7 +1468,7 @@ trap_init:
        cmplw   0, r7, r8
        blt     4b
 
-#if !defined(CONFIG_440_GX) && !defined(CONFIG_440SPE)
+#if !defined(CONFIG_440GX) && !defined(CONFIG_440SPE)
        addi    r7,r0,0x1000            /* set ME bit (Machine Exceptions) */
        oris    r7,r7,0x0002            /* set CE bit (Critical Exceptions) */
        mtmsr   r7                      /* change MSR */
index ea46cc0a0a0f902ec5a92a18617835a7e62acab5..d5a9f66a419142da495625077ba016b1f1f1e657 100644 (file)
 #define mem_dlycal     0x0084  /* delay line calibration register          */
 #define mem_eccesr     0x0098  /* ECC error status                         */
 
-#ifdef CONFIG_440_GX
+#ifdef CONFIG_440GX
 #define sdr_amp                0x0240
 #define sdr_xpllc      0x01c1
 #define sdr_xplld      0x01c2
 #define sdr_xcr                0x01c0
 #define sdr_sdstp2     0x4001
 #define sdr_sdstp3     0x4003
-#endif /* CONFIG_440_GX */
+#endif /* CONFIG_440GX */
 
 #ifdef CONFIG_440SPE
 #undef sdr_sdstp2
 #define SDRAM_BXCF_M_BE_ENABLE         0x00000001      /* Memory Bank Enable   */
 #endif /* CONFIG_440SPE */
 
-#ifndef CONFIG_440_GX
-#endif /* not CONFIG_440SPE       */
-
 /*-----------------------------------------------------------------------------
  | External Bus Controller
  +----------------------------------------------------------------------------*/
 
 #define UICB0_ALL              (UICB0_UIC0CI | UICB0_UIC0NCI | UICB0_UIC1CI | \
                                                 UICB0_UIC1NCI | UICB0_UIC2CI | UICB0_UIC2NCI)
-#endif /* CONFIG_440_GX */
+#endif /* CONFIG_440GX */
 /*---------------------------------------------------------------------------+
 |  Universal interrupt controller interrupts
 +---------------------------------------------------------------------------*/