.rst_to_cke = 0x23,
.sde_to_rst = 0x10,
.refsel = 1, /* Refresh cycles at 32KHz */
- .refr = 7, /* 8 refresh commands per refresh cycle */
+ .refr = 3, /* 4 refresh commands per refresh cycle */
};
static struct mx6_mmdc_calibration mx6dl_1g_mmdc_calib = {
.rst_to_cke = 0x23,
.sde_to_rst = 0x10,
.refsel = 1, /* Refresh cycles at 32KHz */
- .refr = 7, /* 8 refresh commands per refresh cycle */
+ .refr = 3, /* 4 refresh commands per refresh cycle */
};
/* DDR 32bit 512MB */
.rst_to_cke = 0x23,
.sde_to_rst = 0x10,
.refsel = 1, /* Refresh cycles at 32KHz */
- .refr = 7, /* 8 refresh commands per refresh cycle */
+ .refr = 3, /* 4 refresh commands per refresh cycle */
};
static void ccgr_init(void)