According to latest specification rev.0026 and after confirmation with
HW engineer, the DTCNTL register TAPNUM field must be set to 8 even on
H3 ES2.0 SoC. Make it so.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
tmio_sd_writel(priv, reg, RENESAS_SDHI_SCC_TMPPORT2);
- tmio_sd_writel(priv, (taps << RENESAS_SDHI_SCC_DTCNTL_TAPNUM_SHIFT) |
+ tmio_sd_writel(priv, (0x8 << RENESAS_SDHI_SCC_DTCNTL_TAPNUM_SHIFT) |
RENESAS_SDHI_SCC_DTCNTL_TAPEN,
RENESAS_SDHI_SCC_DTCNTL);