mmc: renesas: Unconditionally set DTCNTL TAPNUM to 8
authorMarek Vasut <marek.vasut+renesas@gmail.com>
Tue, 19 Feb 2019 18:32:28 +0000 (19:32 +0100)
committerMarek Vasut <marex@denx.de>
Mon, 25 Feb 2019 15:07:41 +0000 (16:07 +0100)
According to latest specification rev.0026 and after confirmation with
HW engineer, the DTCNTL register TAPNUM field must be set to 8 even on
H3 ES2.0 SoC. Make it so.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
drivers/mmc/renesas-sdhi.c

index 923f846370f4f299c1e4011d5933441a0215349b..6c51ccc294bec740e5a4f6dff18ed59c62116eac 100644 (file)
@@ -137,7 +137,7 @@ static int renesas_sdhi_hs400(struct udevice *dev)
 
        tmio_sd_writel(priv, reg, RENESAS_SDHI_SCC_TMPPORT2);
 
-       tmio_sd_writel(priv, (taps << RENESAS_SDHI_SCC_DTCNTL_TAPNUM_SHIFT) |
+       tmio_sd_writel(priv, (0x8 << RENESAS_SDHI_SCC_DTCNTL_TAPNUM_SHIFT) |
                             RENESAS_SDHI_SCC_DTCNTL_TAPEN,
                             RENESAS_SDHI_SCC_DTCNTL);