clk: stm32f7: cleanup clocks unused definitions
authorPatrice Chotard <patrice.chotard@st.com>
Tue, 18 Jul 2017 07:29:06 +0000 (09:29 +0200)
committerTom Rini <trini@konsulko.com>
Wed, 26 Jul 2017 15:26:54 +0000 (11:26 -0400)
clean the code by removing unused enums, structs and
defines related to clocks

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Acked-by: Vikas MANOCHA <vikas.manocha@st.com>
arch/arm/include/asm/arch-stm32f7/rcc.h
arch/arm/include/asm/arch-stm32f7/stm32.h
arch/arm/include/asm/arch-stm32f7/stm32_periph.h
drivers/clk/clk_stm32f7.c

index cc9b57f803f2b3664570efef15efe89d8a72053e..a33f8cf9bc3cf377de98e91d7d85a30929af63ce 100644 (file)
 /*
  * RCC AHB1ENR specific definitions
  */
-#define RCC_AHB1ENR_GPIO_A_EN          BIT(0)
-#define RCC_AHB1ENR_GPIO_B_EN          BIT(1)
-#define RCC_AHB1ENR_GPIO_C_EN          BIT(2)
-#define RCC_AHB1ENR_GPIO_D_EN          BIT(3)
-#define RCC_AHB1ENR_GPIO_E_EN          BIT(4)
-#define RCC_AHB1ENR_GPIO_F_EN          BIT(5)
-#define RCC_AHB1ENR_GPIO_G_EN          BIT(6)
-#define RCC_AHB1ENR_GPIO_H_EN          BIT(7)
-#define RCC_AHB1ENR_GPIO_I_EN          BIT(8)
-#define RCC_AHB1ENR_GPIO_J_EN          BIT(9)
-#define RCC_AHB1ENR_GPIO_K_EN          BIT(10)
 #define RCC_AHB1ENR_ETHMAC_EN          BIT(25)
 #define RCC_AHB1ENR_ETHMAC_TX_EN       BIT(26)
 #define RCC_AHB1ENR_ETHMAC_RX_EN       BIT(27)
-#define RCC_AHB1ENR_ETHMAC_PTP_EN      BIT(28)
-
-/*
- * RCC AHB3ENR specific definitions
- */
-#define RCC_AHB3ENR_FMC_EN             BIT(0)
-#define RCC_AHB3ENR_QSPI_EN             BIT(1)
 
 /*
  * RCC APB1ENR specific definitions
  */
 #define RCC_APB1ENR_TIM2EN             BIT(0)
-#define RCC_APB1ENR_USART2EN           BIT(17)
-#define RCC_APB1ENR_USART3EN           BIT(18)
 #define RCC_APB1ENR_PWREN              BIT(28)
 
 /*
  * RCC APB2ENR specific definitions
  */
-#define RCC_APB2ENR_USART1EN           BIT(4)
-#define RCC_APB2ENR_USART6EN           BIT(5)
 #define RCC_APB2ENR_SYSCFGEN           BIT(14)
 
 #endif
index d4c834eeddbb99671fa7d5c1116ae9608fa08d2a..12efee5d4805f84dac52b1f064f71c782beb0852 100644 (file)
@@ -58,7 +58,6 @@ static const u32 sect_sz_kb[CONFIG_SYS_MAX_FLASH_SECT] = {
 };
 
 enum clock {
-       CLOCK_CORE,
        CLOCK_AHB,
        CLOCK_APB1,
        CLOCK_APB2
@@ -101,11 +100,6 @@ struct stm32_rcc_regs {
 };
 #define STM32_RCC              ((struct stm32_rcc_regs *)RCC_BASE)
 
-struct stm32_rcc_ext_f7_regs {
-       u32 dckcfgr2;   /* dedicated clocks configuration register */
-};
-#define STM32_RCC_EXT_F7       ((struct stm32_rcc_ext_f7_regs *) (RCC_BASE + sizeof(struct stm32_rcc_regs)))
-
 struct stm32_pwr_regs {
        u32 cr1;   /* power control register 1 */
        u32 csr1;  /* power control/status register 2 */
index 3c5604ae29ad2d4caeab73de4bcf59f59286d480..9c1ec022332a494f725f854d011080f49fdf7b9d 100644 (file)
@@ -21,24 +21,9 @@ enum periph_id {
 };
 
 enum periph_clock {
-       USART1_CLOCK_CFG = 0,
-       USART2_CLOCK_CFG,
-       GPIO_A_CLOCK_CFG,
-       GPIO_B_CLOCK_CFG,
-       GPIO_C_CLOCK_CFG,
-       GPIO_D_CLOCK_CFG,
-       GPIO_E_CLOCK_CFG,
-       GPIO_F_CLOCK_CFG,
-       GPIO_G_CLOCK_CFG,
-       GPIO_H_CLOCK_CFG,
-       GPIO_I_CLOCK_CFG,
-       GPIO_J_CLOCK_CFG,
-       GPIO_K_CLOCK_CFG,
        SYSCFG_CLOCK_CFG,
        TIMER2_CLOCK_CFG,
-       FMC_CLOCK_CFG,
        STMMAC_CLOCK_CFG,
-       QSPI_CLOCK_CFG,
 };
 
 #endif /* __ASM_ARM_ARCH_PERIPH_H */
index 5e20b0cbb79512bd90d5f6bce7534904e165239f..5bc650a7dd6dc25d0d130fe397bf726cf0791fc4 100644 (file)
@@ -195,9 +195,6 @@ unsigned long clock_get(enum clock clck)
        }
 
        switch (clck) {
-       case CLOCK_CORE:
-               return sysclk;
-               break;
        case CLOCK_AHB:
                shift = ahb_psc_table[(
                        (readl(&STM32_RCC->cfgr) & RCC_CFGR_AHB_PSC_MASK)