omap3: incorrect logical check in do_emif4_init
authorxypron.glpk@gmx.de <xypron.glpk@gmx.de>
Sat, 15 Apr 2017 14:11:12 +0000 (16:11 +0200)
committerTom Rini <trini@konsulko.com>
Sat, 12 Aug 2017 23:17:20 +0000 (19:17 -0400)
((readl(&emif4_base->sdram_iodft_tlgc) & (1<<10)) == 0x01)
is always false.
This does not match the comment
/*Wait till that bit clears*/

The problem was indicated by cppcheck.

I do not have the hardware to test if the code change below
leads to a correct system behavior.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
arch/arm/mach-omap2/omap3/emif4.c

index d540cf08d2e710f022ab28d5d9c83df8bc479c15..8197e7b03270dc9c8974d5798b0439bc7245bf40 100644 (file)
@@ -76,7 +76,7 @@ static void do_emif4_init(void)
        regval |= (1<<10);
        writel(regval, &emif4_base->sdram_iodft_tlgc);
        /*Wait till that bit clears*/
-       while ((readl(&emif4_base->sdram_iodft_tlgc) & (1<<10)) == 0x1);
+       while ((readl(&emif4_base->sdram_iodft_tlgc) & (1<<10)) != 0x0);
        /*Re-verify the DDR PHY status*/
        while ((readl(&emif4_base->sdram_sts) & (1<<2)) == 0x0);