ram: rk3399: Add ddr version enc macro
authorJagan Teki <jagan@amarulasolutions.com>
Tue, 16 Jul 2019 11:57:04 +0000 (17:27 +0530)
committerKever Yang <kever.yang@rock-chips.com>
Sat, 20 Jul 2019 15:59:44 +0000 (23:59 +0800)
Add dram config macro for handling ddr version number.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: YouMin Chen <cym@rock-chips.com>
Reviewed-by: Kever Yang <Kever.yang@rock-chips.com>
arch/arm/include/asm/arch-rockchip/sdram_common.h
drivers/ram/rockchip/sdram_rk3399.c

index f5c99fea8b378835f04d0187a2232fc502c9b32f..8027b53636ac3cf24a6db1da1c6d783667c11a25 100644 (file)
@@ -66,6 +66,7 @@ struct sdram_base_params {
  * [1:0]       dbw_ch0
 */
 #define SYS_REG_DDRTYPE_SHIFT          13
+#define DDR_SYS_REG_VERSION            2
 #define SYS_REG_DDRTYPE_MASK           7
 #define SYS_REG_NUM_CH_SHIFT           12
 #define SYS_REG_NUM_CH_MASK            1
@@ -99,6 +100,7 @@ struct sdram_base_params {
 #define SYS_REG_DBW_MASK               3
 #define SYS_REG_ENC_DBW(n, ch)         ((2 >> (n)) << SYS_REG_DBW_SHIFT(ch))
 
+#define SYS_REG_ENC_VERSION(n)         ((n) << 28)
 #define SYS_REG_ENC_CS0_ROW(n, os_reg2, os_reg3, ch) do { \
                        (os_reg2) |= (((n) - 13) & 0x3) << (6 + 16 * (ch)); \
                        (os_reg3) |= ((((n) - 13) & 0x4) >> 2) << \
index fed9f94840846bbc772626d8e8e513c2f1c7f1f6..750219921bb07d42e6a401a80148b36d3f89ab67 100644 (file)
@@ -1102,6 +1102,7 @@ static void dram_all_config(struct dram_info *dram,
                        SYS_REG_ENC_CS1_ROW(info->cap_info.cs1_row, sys_reg2,
                                            sys_reg3, channel);
                sys_reg3 |= SYS_REG_ENC_CS1_COL(info->cap_info.col, channel);
+               sys_reg3 |= SYS_REG_ENC_VERSION(DDR_SYS_REG_VERSION);
 
                ddr_msch_regs = dram->chan[channel].msch;
                noc_timing = &params->ch[channel].noc_timings;