if (!IS_ERR_OR_NULL(mtd))
board_get_alt_info("spi-nand0", buf);
+#ifdef CONFIG_DFU_VIRT
+ strncat(buf, "&virt 0=OTP", DFU_ALT_BUF_LEN);
+
+ if (IS_ENABLED(CONFIG_PMIC_STPMIC1))
+ strncat(buf, "&virt 1=PMIC", DFU_ALT_BUF_LEN);
+#endif
+
env_set("dfu_alt_info", buf);
puts("DFU alt info setting: done\n");
}
+
+#if CONFIG_IS_ENABLED(DFU_VIRT)
+#include <dfu.h>
+#include <power/stpmic1.h>
+
+int dfu_otp_read(u64 offset, u8 *buffer, long *size)
+{
+ struct udevice *dev;
+ int ret;
+
+ ret = uclass_get_device_by_driver(UCLASS_MISC,
+ DM_GET_DRIVER(stm32mp_bsec),
+ &dev);
+ if (ret)
+ return ret;
+
+ ret = misc_read(dev, offset + STM32_BSEC_OTP_OFFSET, buffer, *size);
+ if (ret >= 0) {
+ *size = ret;
+ ret = 0;
+ }
+
+ return 0;
+}
+
+int dfu_pmic_read(u64 offset, u8 *buffer, long *size)
+{
+ int ret;
+#ifdef CONFIG_PMIC_STPMIC1
+ struct udevice *dev;
+
+ ret = uclass_get_device_by_driver(UCLASS_MISC,
+ DM_GET_DRIVER(stpmic1_nvm),
+ &dev);
+ if (ret)
+ return ret;
+
+ ret = misc_read(dev, 0xF8 + offset, buffer, *size);
+ if (ret >= 0) {
+ *size = ret;
+ ret = 0;
+ }
+ if (ret == -EACCES) {
+ *size = 0;
+ ret = 0;
+ }
+#else
+ pr_err("PMIC update not supported");
+ ret = -EOPNOTSUPP;
+#endif
+
+ return ret;
+}
+
+int dfu_read_medium_virt(struct dfu_entity *dfu, u64 offset,
+ void *buf, long *len)
+{
+ switch (dfu->data.virt.dev_num) {
+ case 0x0:
+ return dfu_otp_read(offset, buf, len);
+ case 0x1:
+ return dfu_pmic_read(offset, buf, len);
+ }
+ *len = 0;
+ return 0;
+}
+
+int __weak dfu_get_medium_size_virt(struct dfu_entity *dfu, u64 *size)
+{
+ *size = SZ_1K;
+
+ return 0;
+}
+
+#endif
+
#endif
static void board_copro_image_process(ulong fw_image, size_t fw_size)