};
&qspi {
- bus-num = <0>;
status = "okay";
- qflash0: s25fl128s@0 {
+ s25fs512s0: flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "jedec,spi-nor";
- spi-max-frequency = <20000000>;
+ spi-max-frequency = <50000000>;
reg = <0>;
};
};
};
&qspi {
- bus-num = <0>;
status = "okay";
- qflash0: s25fl128s@0 {
+ s25fs512s0: flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "jedec,spi-nor";
- spi-max-frequency = <20000000>;
+ spi-max-frequency = <50000000>;
reg = <0>;
};
};
};
&qspi {
- bus-num = <0>;
status = "okay";
- qflash0: s25fl128s@0 {
+ s25fs512s0: flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "jedec,spi-nor";
- spi-max-frequency = <20000000>;
+ spi-max-frequency = <50000000>;
reg = <0>;
};
};
};
&qspi {
- bus-num = <0>;
status = "okay";
- qflash0: s25fl128s@0 {
+ s25fs512s0: flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "jedec,spi-nor";
- spi-max-frequency = <20000000>;
+ spi-max-frequency = <50000000>;
reg = <0>;
};
};
};
qspi: quadspi@1550000 {
- compatible = "fsl,vf610-qspi";
+ compatible = "fsl,ls1021a-qspi";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x0 0x1550000 0x0 0x10000>,
<0x0 0x40000000 0x0 0x4000000>;
reg-names = "QuadSPI", "QuadSPI-memory";
- num-cs = <1>;
- big-endian;
status = "disabled";
};
};
&qspi {
- bus-num = <0>;
status = "okay";
- qflash0: s25fl128s@0 {
+ s25fl128s0: flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "jedec,spi-nor";
- spi-max-frequency = <20000000>;
+ spi-max-frequency = <50000000>;
reg = <0>;
};
};
status = "disabled";
};
qspi: quadspi@1550000 {
- compatible = "fsl,vf610-qspi";
+ compatible = "fsl,ls1021a-qspi";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x0 0x1550000 0x0 0x10000>,
- <0x0 0x40000000 0x0 0x4000000>;
+ <0x0 0x40000000 0x0 0x1000000>;
reg-names = "QuadSPI", "QuadSPI-memory";
- num-cs = <2>;
- big-endian;
status = "disabled";
};
};
&qspi {
- bus-num = <0>;
status = "okay";
- qflash0: mt25qu512abb8esf@0 {
+ mt25qu512a0: flash@0 {
#address-cells = <1>;
#size-cells = <1>;
- compatible = "spi-flash";
+ compatible = "jedec,spi-nor";
spi-max-frequency = <50000000>;
reg = <0>;
};
};
&qspi {
- bus-num = <0>;
status = "okay";
- qflash0: s25fl128s@0 {
+ s25fs512s0: flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "jedec,spi-nor";
- spi-max-frequency = <20000000>;
+ spi-max-frequency = <50000000>;
reg = <0>;
};
};
};
&qspi {
- bus-num = <0>;
status = "okay";
- qflash0: s25fs512s@0 {
+ s25fs512s0: flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "jedec,spi-nor";
reg = <0>;
};
- qflash1: s25fs512s@1 {
+ s25fs512s1: flash@1 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "jedec,spi-nor";
};
qspi: quadspi@1550000 {
- compatible = "fsl,vf610-qspi";
+ compatible = "fsl,ls1021a-qspi";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x0 0x1550000 0x0 0x10000>,
<0x0 0x40000000 0x0 0x10000000>;
reg-names = "QuadSPI", "QuadSPI-memory";
- num-cs = <4>;
- big-endian;
status = "disabled";
};
};
&qspi {
- bus-num = <0>;
status = "okay";
- qflash0: s25fs512s@0 {
+ s25fs512s0: flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "jedec,spi-nor";
reg = <0>;
};
- qflash1: s25fs512s@1 {
+ s25fs512s1: flash@1 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "jedec,spi-nor";
};
&qspi {
- bus-num = <0>;
status = "okay";
- qflash0: s25fs512s@0 {
+ s25fs512s0: flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "jedec,spi-nor";
reg = <0>;
};
- qflash1: s25fs512s@1 {
+ s25fs512s1: flash@1 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "jedec,spi-nor";
};
qspi: quadspi@1550000 {
- compatible = "fsl,vf610-qspi";
+ compatible = "fsl,ls1088a-qspi";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x0 0x20c0000 0x0 0x10000>,
};
&qspi {
- bus-num = <0>;
status = "okay";
- qflash0: s25fs256s@0 {
+ s25fs256s0: flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "jedec,spi-nor";
- spi-max-frequency = <20000000>;
+ spi-max-frequency = <50000000>;
reg = <0>;
};
};
};
qspi: quadspi@1550000 {
- compatible = "fsl,vf610-qspi";
+ compatible = "fsl,ls2080a-qspi";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x0 0x20c0000 0x0 0x10000>,
<0x0 0x20000000 0x0 0x10000000>;
reg-names = "QuadSPI", "QuadSPI-memory";
- num-cs = <4>;
+ status = "disabled";
};
esdhc: esdhc@0 {
};
&qspi {
- bus-num = <0>;
status = "okay";
- qflash0: s25fs512s@0 {
+ s25fs512s0: flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "jedec,spi-nor";
reg = <0>;
};
- qflash1: s25fs512s@1 {
+ s25fs512s1: flash@1 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "jedec,spi-nor";
};
&qspi {
- bus-num = <0>;
status = "okay";
- qflash0: n25q128a13@0 {
+ n25q128a130: flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "jedec,spi-nor";
- spi-max-frequency = <20000000>;
+ spi-max-frequency = <50000000>;
reg = <0>;
};
};
};
qspi: quadspi@1550000 {
- compatible = "fsl,vf610-qspi";
+ compatible = "fsl,ls1021a-qspi";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x1550000 0x10000>,
- <0x40000000 0x4000000>;
+ <0x40000000 0x1000000>;
reg-names = "QuadSPI", "QuadSPI-memory";
- num-cs = <2>;
- big-endian;
status = "disabled";
};