: "r"(a), "I"(n)); \
ret; \
})
+# elif defined(__s390__) || defined(__s390x__)
+# define ROTATE(a,n) ({ register unsigned int ret; \
+ asm ("rll %0,%1,%2" \
+ : "=r"(ret) \
+ : "r"(a), "I"(n):"cc"); \
+ ret; \
+ })
# endif
# endif
#endif /* PEDANTIC */
# endif
# endif
#endif
+#if defined(__s390__) || defined(__s390x__)
+# define HOST_c2l(c,l) ((l)=*((const unsigned int *)(c)), (c)+=4, (l))
+# define HOST_l2c(l,c) (*((unsigned int *)(c))=(l), (c)+=4, (l))
+#endif
#ifndef HOST_c2l
#define HOST_c2l(c,l) (l =(((unsigned long)(*((c)++)))<<24), \
#elif defined(DATA_ORDER_IS_LITTLE_ENDIAN)
+#ifndef PEDANTIC
+# if defined(__GNUC__) && __GNUC__>=2 && !defined(OPENSSL_NO_ASM) && !defined(OPENSSL_NO_INLINE_ASM)
+# if defined(__s390x__)
+# define HOST_c2l(c,l) ({ asm ("lrv %0,0(%1)" \
+ :"=r"(l) : "r"(c)); \
+ (c)+=4; (l); })
+# define HOST_l2c(l,c) ({ asm ("strv %0,0(%1)" \
+ : : "r"(l),"r"(c) : "memory"); \
+ (c)+=4; (l); })
+# endif
+# endif
+#endif
#if defined(__i386) || defined(__i386__) || defined(__x86_64) || defined(__x86_64__)
# ifndef B_ENDIAN
/* See comment in DATA_ORDER_IS_BIG_ENDIAN section. */
const char SHA512_version[]="SHA-512" OPENSSL_VERSION_PTEXT;
-#if defined(_M_IX86) || defined(_M_AMD64) || defined(__i386) || defined(__x86_64)
+#if defined(__i386) || defined(__i386__) || defined(_M_IX87) || \
+ defined(__x86_64) || defined(_M_AMD64) || defined(_M_X64) || \
+ defined(__s390__) || defined(__s390x__)
#define SHA512_BLOCK_CAN_MANAGE_UNALIGNED_DATA
#endif