clk: rk3399: Set empty for vopl assigned-clocks
authorJagan Teki <jagan@amarulasolutions.com>
Thu, 2 Apr 2020 11:41:21 +0000 (17:11 +0530)
committerAnatolij Gustschin <agust@denx.de>
Thu, 2 Apr 2020 13:44:56 +0000 (15:44 +0200)
During vidconsole probe, the device probe will try to
check whether the assigned clocks on that video console
node is initialized or not? and return an error if not.

But, unlike Linux U-Boot won't require to handle these
vopl assigned-clocks since core clocks are enough to
handle the video out to process.

So, mark them as empty in set_rate to satisfy clk_set_defaults
so-that probe happened properly.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Tested-by: Peter Robinson <pbrobinson@gmail.com>
drivers/clk/rockchip/clk_rk3399.c

index 865b80cc0fb296aeef2ed8eb284a311ee4d4b4d2..1f623765956b861328fee4a965fbd1cbe66aeb01 100644 (file)
@@ -994,6 +994,13 @@ static ulong rk3399_clk_set_rate(struct clk *clk, ulong rate)
        case DCLK_VOP1:
                ret = rk3399_vop_set_clk(priv->cru, clk->id, rate);
                break;
+       case ACLK_VOP1:
+       case HCLK_VOP1:
+               /**
+                * assigned-clocks handling won't require for vopl, so
+                * return 0 to satisfy clk_set_defaults during device probe.
+                */
+               return 0;
        case SCLK_DDRCLK:
                ret = rk3399_ddr_set_clk(priv->cru, rate);
                break;