powerpc: P1025RDB: Separate from P1_P2_RDB_PC in Kconfig
authorYork Sun <york.sun@nxp.com>
Thu, 17 Nov 2016 22:10:14 +0000 (14:10 -0800)
committerYork Sun <york.sun@nxp.com>
Thu, 24 Nov 2016 07:42:09 +0000 (23:42 -0800)
Use TARGET_P1025RDB instead of sharing with P1_P2_RDB_PC to
simplify Kconfig and config macros.

Remove macro CONFIG_P1025RDB.

Signed-off-by: York Sun <york.sun@nxp.com>
arch/powerpc/cpu/mpc85xx/Kconfig
board/freescale/p1_p2_rdb_pc/Kconfig
board/freescale/p1_p2_rdb_pc/ddr.c
board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c
configs/P1025RDB_36BIT_defconfig
configs/P1025RDB_NAND_defconfig
configs/P1025RDB_SDCARD_defconfig
configs/P1025RDB_SPIFLASH_defconfig
configs/P1025RDB_defconfig
include/configs/p1_p2_rdb_pc.h
scripts/config_whitelist.txt

index a027ea96b00c090dd54c78b9e5bb78a5e06e1dcc..632e0f0c544186b5fcfa4d20793acf4aed91ae3e 100644 (file)
@@ -145,6 +145,11 @@ config TARGET_P1024RDB
        select SUPPORT_SPL
        select SUPPORT_TPL
 
+config TARGET_P1025RDB
+       bool "Support P1025RDB"
+       select SUPPORT_SPL
+       select SUPPORT_TPL
+
 config TARGET_P1_P2_RDB_PC
        bool "Support p1_p2_rdb_pc"
        select SUPPORT_SPL
index 91ba21ecc90aa3db4b3d5fd3e5efe7c67dc5843f..f02549ef185c28f296be229314490cf6b3811454 100644 (file)
@@ -4,7 +4,8 @@ if TARGET_P1_P2_RDB_PC          || \
        TARGET_P1020RDB_PD      || \
        TARGET_P1020UTM         || \
        TARGET_P1021RDB         || \
-       TARGET_P1024RDB
+       TARGET_P1024RDB         || \
+       TARGET_P1025RDB
 
 config SYS_BOARD
        default "p1_p2_rdb_pc"
index 446935e9f57c6faa58aa5fee15c1e751cead8317..44ab123f7909f38ac58fb437d137dc356f15b4db 100644 (file)
@@ -147,7 +147,7 @@ dimm_params_t ddr_raw_timing = {
        .tfaw_ps = 37500,
 };
 #elif  defined(CONFIG_TARGET_P1024RDB) || \
-       defined(CONFIG_P1025RDB)
+       defined(CONFIG_TARGET_P1025RDB)
 /*
  * Samsung K4B2G0846C-HCH9
  * The following timing are for "downshift"
index 44e8e02f0dc8082e2ca884182c4352535d5fb0e5..51217c58e5782ef5630fcbcd9701dff04fa4d05c 100644 (file)
@@ -47,7 +47,7 @@
 #define GPIO_2BIT_MASK         (0x3 << (32 - (GPIO_DDR_RST_PIN + 1) * 2))
 #endif
 
-#if defined(CONFIG_P1025RDB) || defined(CONFIG_TARGET_P1021RDB)
+#if defined(CONFIG_TARGET_P1025RDB) || defined(CONFIG_TARGET_P1021RDB)
 #define PCA_IOPORT_I2C_ADDR            0x23
 #define PCA_IOPORT_OUTPUT_CMD          0x2
 #define PCA_IOPORT_CFG_CMD             0x6
@@ -65,7 +65,7 @@ const qe_iop_conf_t qe_iop_conf_tab[] = {
        {GPIO_GETH_SW_PORT, GPIO_GETH_SW_PIN, 1, 0, 0}, /* RST_GETH_SW_N */
        {GPIO_SLIC_PORT, GPIO_SLIC_PIN, 1, 0, 0},       /* RST_SLIC_N */
 
-#ifdef CONFIG_P1025RDB
+#ifdef CONFIG_TARGET_P1025RDB
        /* QE_MUX_MDC */
        {1,  19, 1, 0, 1}, /* QE_MUX_MDC               */
 
@@ -379,7 +379,7 @@ int board_eth_init(bd_t *bis)
 }
 
 #if defined(CONFIG_QE) && \
-       (defined(CONFIG_P1025RDB) || defined(CONFIG_TARGET_P1021RDB))
+       (defined(CONFIG_TARGET_P1025RDB) || defined(CONFIG_TARGET_P1021RDB))
 static void fdt_board_fixup_qe_pins(void *blob)
 {
        unsigned int oldbus;
@@ -448,7 +448,7 @@ int ft_board_setup(void *blob, bd_t *bd)
 #ifdef CONFIG_QE
        do_fixup_by_compat(blob, "fsl,qe", "status", "okay",
                        sizeof("okay"), 0);
-#if defined(CONFIG_P1025RDB) || defined(CONFIG_TARGET_P1021RDB)
+#if defined(CONFIG_TARGET_P1025RDB) || defined(CONFIG_TARGET_P1021RDB)
        fdt_board_fixup_qe_pins(blob);
 #endif
 #endif
index d94c7af2f9f60400dc4f52acabde86c5d6db99d0..27151820cc1f177c9a43b29fa0eb773c514837e3 100644 (file)
@@ -1,12 +1,11 @@
 CONFIG_PPC=y
 CONFIG_MPC85xx=y
-CONFIG_TARGET_P1_P2_RDB_PC=y
+CONFIG_TARGET_P1025RDB=y
 CONFIG_PHYS_64BIT=y
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="P1025RDB"
 CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_MMC=y
index 0cf5bd24c398db0f6313480a1c5d6d01f89f2145..90e83679ad987d1e9af81786474b0281c0fdbefd 100644 (file)
@@ -2,12 +2,12 @@ CONFIG_PPC=y
 CONFIG_SPL_NAND_SUPPORT=y
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_MPC85xx=y
-CONFIG_TARGET_P1_P2_RDB_PC=y
+CONFIG_TARGET_P1025RDB=y
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="P1025RDB,NAND"
+CONFIG_SYS_EXTRA_OPTIONS="NAND"
 CONFIG_BOOTDELAY=10
 CONFIG_SPL=y
 CONFIG_TPL=y
index c9eda77588f524af9b9e1c2c5843c21fcca7ad95..90b005a9208c01deadae68b6027d857040da25c6 100644 (file)
@@ -6,12 +6,12 @@ CONFIG_SPL_MMC_SUPPORT=y
 CONFIG_SPL_SERIAL_SUPPORT=y
 CONFIG_SPL_ENV_SUPPORT=y
 CONFIG_MPC85xx=y
-CONFIG_TARGET_P1_P2_RDB_PC=y
+CONFIG_TARGET_P1025RDB=y
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="P1025RDB,SDCARD"
+CONFIG_SYS_EXTRA_OPTIONS="SDCARD"
 CONFIG_BOOTDELAY=10
 CONFIG_SPL=y
 CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
index a990a5e9e4d601bfaf588a9aa580b5baf6603789..0e5335da32bcbf1314847ed15da92dcaef843e0c 100644 (file)
@@ -7,12 +7,12 @@ CONFIG_SPL_ENV_SUPPORT=y
 CONFIG_SPL_SPI_FLASH_SUPPORT=y
 CONFIG_SPL_SPI_SUPPORT=y
 CONFIG_MPC85xx=y
-CONFIG_TARGET_P1_P2_RDB_PC=y
+CONFIG_TARGET_P1025RDB=y
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="P1025RDB,SPIFLASH"
+CONFIG_SYS_EXTRA_OPTIONS="SPIFLASH"
 CONFIG_BOOTDELAY=10
 CONFIG_SPL=y
 CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
index 80e997d80c15023fda72c47a958db949f7b36f2c..7094db49b5731eedd83ae923f2e31e5aa565e71e 100644 (file)
@@ -1,11 +1,10 @@
 CONFIG_PPC=y
 CONFIG_MPC85xx=y
-CONFIG_TARGET_P1_P2_RDB_PC=y
+CONFIG_TARGET_P1025RDB=y
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_OF_BOARD_SETUP=y
 CONFIG_OF_STDOUT_VIA_ALIAS=y
-CONFIG_SYS_EXTRA_OPTIONS="P1025RDB"
 CONFIG_BOOTDELAY=10
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_MMC=y
index eb885766d4ab70a8b5c0a2d95ea1ba45c2c100c7..6c2fdd1d79e85f11a7c9c388c93efc540a6fbbb8 100644 (file)
 #define CONFIG_SYS_L2_SIZE     (256 << 10)
 #endif
 
-#if defined(CONFIG_P1025RDB)
+#if defined(CONFIG_TARGET_P1025RDB)
 #define CONFIG_BOARDNAME "P1025RDB"
 #define CONFIG_NAND_FSL_ELBC
 #define CONFIG_P1025
 #define CONFIG_SYS_QE_FMAN_FW_LENGTH   0x10000
 #endif /* CONFIG_QE */
 
-#ifdef CONFIG_P1025RDB
+#ifdef CONFIG_TARGET_P1025RDB
 /*
  * QE UEC ethernet configuration
  */
 #define CONFIG_SYS_UEC5_INTERFACE_TYPE PHY_INTERFACE_MODE_RMII
 #define CONFIG_SYS_UEC5_INTERFACE_SPEED        100
 #endif /* CONFIG_UEC_ETH5 */
-#endif /* CONFIG_P1025RDB */
+#endif /* CONFIG_TARGET_P1025RDB */
 
 /*
  * Environment
index 9e630d25af783c0decc091260aa979a576594624..c95daac7185ad5c933a1c4a82badd584cca7a822 100644 (file)
@@ -3387,7 +3387,6 @@ CONFIG_P1020
 CONFIG_P1021
 CONFIG_P1024
 CONFIG_P1025
-CONFIG_P1025RDB
 CONFIG_P2020
 CONFIG_P2020RDB
 CONFIG_P2041RDB