LIBS += lib/lzo/liblzo.o
LIBS += $(shell if [ -f board/$(VENDOR)/common/Makefile ]; then echo \
"board/$(VENDOR)/common/lib$(VENDOR).o"; fi)
-ifdef CONFIG_FSL_DIU_FB
-LIBS += board/freescale/common/libfreescale.o
-endif
LIBS += $(CPUDIR)/lib$(CPU).o
ifdef SOC
LIBS += $(CPUDIR)/$(SOC)/lib$(SOC).o
bne 1b
stw r4, LBLAWAR1(r3) /* LBLAWAR1 <= 8MB Flash Size */
+ /* Wait for HW to catch up */
+ lwz r4, LBLAWAR1(r3)
+ twi 0,r4,0
+ isync
blr
/* Though all the LBIU Local Access Windows and LBC Banks will be
xor r4, r4, r4
stw r4, LBLAWBAR1(r3)
stw r4, LBLAWAR1(r3) /* Off LBIU LAW1 */
+ /* Wait for HW to catch up */
+ lwz r4, LBLAWAR1(r3)
+ twi 0,r4,0
+ isync
blr
#endif /* CONFIG_SYS_FLASHBOOT */
if (l2cache->l2ctl & MPC85xx_L2CTL_L2E) {
puts("already enabled");
l2srbar = l2cache->l2srbar0;
-#ifdef CONFIG_SYS_INIT_L2_ADDR
+#if defined(CONFIG_SYS_INIT_L2_ADDR) && defined(CONFIG_SYS_FLASH_BASE)
if (l2cache->l2ctl & MPC85xx_L2CTL_L2SRAM_ENTIRE
&& l2srbar >= CONFIG_SYS_FLASH_BASE) {
l2srbar = CONFIG_SYS_INIT_L2_ADDR;
gd->cpu += dest_addr - CONFIG_SYS_MONITOR_BASE;
#endif
+#ifdef CONFIG_SYS_EXTRA_ENV_RELOC
+ /*
+ * Some systems need to relocate the env_addr pointer early because the
+ * location it points to will get invalidated before env_relocate is
+ * called. One example is on systems that might use a L2 or L3 cache
+ * in SRAM mode and initialize that cache from SRAM mode back to being
+ * a cache in cpu_init_r.
+ */
+ gd->env_addr += dest_addr - CONFIG_SYS_MONITOR_BASE;
+#endif
+
#ifdef CONFIG_SERIAL_MULTI
serial_initialize();
#endif
.align 2
.global _start
-_start:
+_sh_start:
.long 0x00000010 /* Ppower ON reset PC*/
.long 0x00000000
.long 0x00000010 /* Manual reset PC */
nop
1: sts pr, r5
mov.l ._reloc_dst, r4
- add #(_start-1b), r5
+ add #(_sh_start-1b), r5
mov.l ._reloc_dst_end, r6
2: mov.l @r5+, r1
._reloc_dst_end: .long reloc_dst_end
._bss_start: .long bss_start
._bss_end: .long bss_end
-._gd_init: .long (_start - GENERATED_GBL_DATA_SIZE)
-._stack_init: .long (_start - GENERATED_GBL_DATA_SIZE - CONFIG_SYS_MALLOC_LEN - 16)
+._gd_init: .long (_sh_start - GENERATED_GBL_DATA_SIZE)
+._stack_init: .long (_sh_start - GENERATED_GBL_DATA_SIZE - CONFIG_SYS_MALLOC_LEN - 16)
._sh_generic_init: .long sh_generic_init
.align 2
.global _start
-_start:
+_sh_start:
mov.l ._lowlevel_init, r0
100: bsrf r0
nop
nop
1: sts pr, r5
mov.l ._reloc_dst, r4
- add #(_start-1b), r5
+ add #(_sh_start-1b), r5
mov.l ._reloc_dst_end, r6
2: mov.l @r5+, r1
._reloc_dst_end: .long reloc_dst_end
._bss_start: .long bss_start
._bss_end: .long bss_end
-._gd_init: .long (_start - GENERATED_GBL_DATA_SIZE)
-._stack_init: .long (_start - GENERATED_GBL_DATA_SIZE - CONFIG_SYS_MALLOC_LEN - 16)
+._gd_init: .long (_sh_start - GENERATED_GBL_DATA_SIZE)
+._stack_init: .long (_sh_start - GENERATED_GBL_DATA_SIZE - CONFIG_SYS_MALLOC_LEN - 16)
._sh_generic_init: .long sh_generic_init
/*
- * (C) Copyright 2007
+ * (C) Copyright 2007, 2010
* Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
*
* This program is free software; you can redistribute it and/or
.align 2
.global _start
-_start:
+_sh_start:
mov.l ._lowlevel_init, r0
100: bsrf r0
nop
nop
1: sts pr, r5
mov.l ._reloc_dst, r4
- add #(_start-1b), r5
+ add #(_sh_start-1b), r5
mov.l ._reloc_dst_end, r6
2: mov.l @r5+, r1
._reloc_dst_end: .long reloc_dst_end
._bss_start: .long bss_start
._bss_end: .long bss_end
-._gd_init: .long (_start - GENERATED_GBL_DATA_SIZE)
-._stack_init: .long (_start - GENERATED_GBL_DATA_SIZE - CONFIG_SYS_MALLOC_LEN - 16)
+._gd_init: .long (_sh_start - GENERATED_GBL_DATA_SIZE)
+._stack_init: .long (_sh_start - GENERATED_GBL_DATA_SIZE - CONFIG_SYS_MALLOC_LEN - 16)
._sh_generic_init: .long sh_generic_init
COBJS-$(CONFIG_FSL_CADMUS) += cadmus.o
COBJS-$(CONFIG_FSL_VIA) += cds_via.o
-COBJS-$(CONFIG_FSL_DIU_FB) += fsl_diu_fb.o
COBJS-$(CONFIG_FSL_PIXIS) += pixis.o
COBJS-$(CONFIG_FSL_NGPIXIS) += ngpixis.o
COBJS-$(CONFIG_PQ_MDS_PIB) += pq-mds-pib.o
+++ /dev/null
-/*
- * Copyright 2007, 2010 Freescale Semiconductor, Inc.
- * York Sun <yorksun@freescale.com>
- *
- * FSL DIU Framebuffer driver
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <i2c.h>
-#include <malloc.h>
-#include <asm/io.h>
-
-#include <fsl_diu_fb.h>
-
-struct fb_videomode {
- const char *name; /* optional */
- unsigned int refresh; /* optional */
- unsigned int xres;
- unsigned int yres;
- unsigned int pixclock;
- unsigned int left_margin;
- unsigned int right_margin;
- unsigned int upper_margin;
- unsigned int lower_margin;
- unsigned int hsync_len;
- unsigned int vsync_len;
- unsigned int sync;
- unsigned int vmode;
- unsigned int flag;
-};
-
-#define FB_SYNC_VERT_HIGH_ACT 2 /* vertical sync high active */
-#define FB_SYNC_COMP_HIGH_ACT 8 /* composite sync high active */
-#define FB_VMODE_NONINTERLACED 0 /* non interlaced */
-
-/* This setting is used for the ifm pdm360ng with PRIMEVIEW PM070WL3 */
-static struct fb_videomode fsl_diu_mode_800 = {
- .refresh = 60,
- .xres = 800,
- .yres = 480,
- .pixclock = 31250,
- .left_margin = 86,
- .right_margin = 42,
- .upper_margin = 33,
- .lower_margin = 10,
- .hsync_len = 128,
- .vsync_len = 2,
- .sync = 0,
- .vmode = FB_VMODE_NONINTERLACED
-};
-
-/*
- * These parameters give default parameters
- * for video output 1024x768,
- * FIXME - change timing to proper amounts
- * hsync 31.5kHz, vsync 60Hz
- */
-static struct fb_videomode fsl_diu_mode_1024 = {
- .refresh = 60,
- .xres = 1024,
- .yres = 768,
- .pixclock = 15385,
- .left_margin = 160,
- .right_margin = 24,
- .upper_margin = 29,
- .lower_margin = 3,
- .hsync_len = 136,
- .vsync_len = 6,
- .sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
- .vmode = FB_VMODE_NONINTERLACED
-};
-
-static struct fb_videomode fsl_diu_mode_1280 = {
- .name = "1280x1024-60",
- .refresh = 60,
- .xres = 1280,
- .yres = 1024,
- .pixclock = 9375,
- .left_margin = 38,
- .right_margin = 128,
- .upper_margin = 2,
- .lower_margin = 7,
- .hsync_len = 216,
- .vsync_len = 37,
- .sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
- .vmode = FB_VMODE_NONINTERLACED
-};
-
-/*
- * These are the fields of area descriptor(in DDR memory) for every plane
- */
-struct diu_ad {
- /* Word 0(32-bit) in DDR memory */
- unsigned int pix_fmt; /* hard coding pixel format */
- /* Word 1(32-bit) in DDR memory */
- unsigned int addr;
- /* Word 2(32-bit) in DDR memory */
- unsigned int src_size_g_alpha;
- /* Word 3(32-bit) in DDR memory */
- unsigned int aoi_size;
- /* Word 4(32-bit) in DDR memory */
- unsigned int offset_xyi;
- /* Word 5(32-bit) in DDR memory */
- unsigned int offset_xyd;
- /* Word 6(32-bit) in DDR memory */
- unsigned int ckmax_r:8;
- unsigned int ckmax_g:8;
- unsigned int ckmax_b:8;
- unsigned int res9:8;
- /* Word 7(32-bit) in DDR memory */
- unsigned int ckmin_r:8;
- unsigned int ckmin_g:8;
- unsigned int ckmin_b:8;
- unsigned int res10:8;
- /* Word 8(32-bit) in DDR memory */
- unsigned int next_ad;
- /* Word 9(32-bit) in DDR memory, just for 64-bit aligned */
- unsigned int res1;
- unsigned int res2;
- unsigned int res3;
-}__attribute__ ((packed));
-
-/*
- * DIU register map
- */
-struct diu {
- unsigned int desc[3];
- unsigned int gamma;
- unsigned int pallete;
- unsigned int cursor;
- unsigned int curs_pos;
- unsigned int diu_mode;
- unsigned int bgnd;
- unsigned int bgnd_wb;
- unsigned int disp_size;
- unsigned int wb_size;
- unsigned int wb_mem_addr;
- unsigned int hsyn_para;
- unsigned int vsyn_para;
- unsigned int syn_pol;
- unsigned int thresholds;
- unsigned int int_status;
- unsigned int int_mask;
- unsigned int colorbar[8];
- unsigned int filling;
- unsigned int plut;
-} __attribute__ ((packed));
-
-struct diu_hw {
- struct diu *diu_reg;
- volatile unsigned int mode; /* DIU operation mode */
-};
-
-struct diu_addr {
- unsigned char * paddr; /* Virtual address */
- unsigned int offset;
-};
-
-/*
- * Modes of operation of DIU
- */
-#define MFB_MODE0 0 /* DIU off */
-#define MFB_MODE1 1 /* All three planes output to display */
-#define MFB_MODE2 2 /* Plane 1 to display,
- * planes 2+3 written back to memory */
-#define MFB_MODE3 3 /* All three planes written back to memory */
-#define MFB_MODE4 4 /* Color bar generation */
-
-#define MAX_CURS 32
-
-static struct fb_info fsl_fb_info;
-static struct diu_addr gamma, cursor;
-static struct diu_ad fsl_diu_fb_ad __attribute__ ((aligned(32)));
-static struct diu_ad dummy_ad __attribute__ ((aligned(32)));
-static unsigned char *dummy_fb;
-static struct diu_hw dr = {
- .mode = MFB_MODE1,
-};
-
-int fb_enabled = 0;
-int fb_initialized = 0;
-const int default_xres = 1280;
-const int default_pixel_format = 0x88882317;
-
-static int map_video_memory(struct fb_info *info, unsigned long bytes_align);
-static void enable_lcdc(void);
-static void disable_lcdc(void);
-static int fsl_diu_enable_panel(struct fb_info *info);
-static int fsl_diu_disable_panel(struct fb_info *info);
-static int allocate_buf(struct diu_addr *buf, u32 size, u32 bytes_align);
-void diu_set_pixel_clock(unsigned int pixclock);
-
-int fsl_diu_init(int xres, unsigned int pixel_format, int gamma_fix)
-{
- struct fb_videomode *fsl_diu_mode_db;
- struct diu_ad *ad = &fsl_diu_fb_ad;
- struct diu *hw;
- struct fb_info *info = &fsl_fb_info;
- struct fb_var_screeninfo *var = &info->var;
- unsigned char *gamma_table_base;
- unsigned int i, j;
-
- debug("Enter fsl_diu_init\n");
- dr.diu_reg = (struct diu *) (CONFIG_SYS_DIU_ADDR);
- hw = (struct diu *) dr.diu_reg;
-
- disable_lcdc();
-
- switch (xres) {
- case 800:
- fsl_diu_mode_db = &fsl_diu_mode_800;
- break;
- case 1280:
- fsl_diu_mode_db = &fsl_diu_mode_1280;
- break;
- default:
- fsl_diu_mode_db = &fsl_diu_mode_1024;
- }
-
- if (0 == fb_initialized) {
- allocate_buf(&gamma, 768, 32);
- debug("gamma is allocated @ 0x%x\n",
- (unsigned int)gamma.paddr);
- allocate_buf(&cursor, MAX_CURS * MAX_CURS * 2, 32);
- debug("curosr is allocated @ 0x%x\n",
- (unsigned int)cursor.paddr);
-
- /* create a dummy fb and dummy ad */
- dummy_fb = malloc(64);
- if (NULL == dummy_fb) {
- printf("Cannot allocate dummy fb\n");
- return -1;
- }
- dummy_ad.addr = cpu_to_le32((unsigned int)dummy_fb);
- dummy_ad.pix_fmt = 0x88882317;
- dummy_ad.src_size_g_alpha = 0x04400000; /* alpha = 0 */
- dummy_ad.aoi_size = 0x02000400;
- dummy_ad.offset_xyi = 0;
- dummy_ad.offset_xyd = 0;
- dummy_ad.next_ad = 0;
- /* Memory allocation for framebuffer */
- if (map_video_memory(info, 32)) {
- printf("Unable to allocate fb memory 1\n");
- return -1;
- }
- }
-
- memset(info->screen_base, 0, info->smem_len);
-
- out_be32(&dr.diu_reg->desc[0], (int)&dummy_ad);
- out_be32(&dr.diu_reg->desc[1], (int)&dummy_ad);
- out_be32(&dr.diu_reg->desc[2], (int)&dummy_ad);
- debug("dummy dr.diu_reg->desc[0] = 0x%x\n", dr.diu_reg->desc[0]);
- debug("dummy desc[0] = 0x%x\n", hw->desc[0]);
-
- /* read mode info */
- var->xres = fsl_diu_mode_db->xres;
- var->yres = fsl_diu_mode_db->yres;
- var->bits_per_pixel = 32;
- var->pixclock = fsl_diu_mode_db->pixclock;
- var->left_margin = fsl_diu_mode_db->left_margin;
- var->right_margin = fsl_diu_mode_db->right_margin;
- var->upper_margin = fsl_diu_mode_db->upper_margin;
- var->lower_margin = fsl_diu_mode_db->lower_margin;
- var->hsync_len = fsl_diu_mode_db->hsync_len;
- var->vsync_len = fsl_diu_mode_db->vsync_len;
- var->sync = fsl_diu_mode_db->sync;
- var->vmode = fsl_diu_mode_db->vmode;
- info->line_length = var->xres * var->bits_per_pixel / 8;
-
- ad->pix_fmt = pixel_format;
- ad->addr = cpu_to_le32((unsigned int)info->screen_base);
- ad->src_size_g_alpha
- = cpu_to_le32((var->yres << 12) | var->xres);
- /* fix me. AOI should not be greater than display size */
- ad->aoi_size = cpu_to_le32(( var->yres << 16) | var->xres);
- ad->offset_xyi = 0;
- ad->offset_xyd = 0;
-
- /* Disable chroma keying function */
- ad->ckmax_r = 0;
- ad->ckmax_g = 0;
- ad->ckmax_b = 0;
-
- ad->ckmin_r = 255;
- ad->ckmin_g = 255;
- ad->ckmin_b = 255;
-
- gamma_table_base = gamma.paddr;
- debug("gamma_table_base is allocated @ 0x%x\n",
- (unsigned int)gamma_table_base);
-
- /* Prep for DIU init - gamma table */
-
- for (i = 0; i <= 2; i++)
- for (j = 0; j <= 255; j++)
- *gamma_table_base++ = j;
-
- if (gamma_fix == 1) { /* fix the gamma */
- debug("Fix gamma table\n");
- gamma_table_base = gamma.paddr;
- for (i = 0; i < 256*3; i++) {
- gamma_table_base[i] = (gamma_table_base[i] << 2)
- | ((gamma_table_base[i] >> 6) & 0x03);
- }
- }
-
- debug("update-lcdc: HW - %p\n Disabling DIU\n", hw);
-
- /* Program DIU registers */
-
- out_be32(&hw->gamma, (int)gamma.paddr);
- out_be32(&hw->cursor, (int)cursor.paddr);
- out_be32(&hw->bgnd, 0x007F7F7F);
- out_be32(&hw->bgnd_wb, 0); /* BGND_WB */
- out_be32(&hw->disp_size, var->yres << 16 | var->xres); /* DISP SIZE */
- out_be32(&hw->wb_size, 0); /* WB SIZE */
- out_be32(&hw->wb_mem_addr, 0); /* WB MEM ADDR */
- out_be32(&hw->hsyn_para, var->left_margin << 22 | /* BP_H */
- var->hsync_len << 11 | /* PW_H */
- var->right_margin); /* FP_H */
-
- out_be32(&hw->vsyn_para, var->upper_margin << 22 | /* BP_V */
- var->vsync_len << 11 | /* PW_V */
- var->lower_margin); /* FP_V */
-
- out_be32(&hw->syn_pol, 0); /* SYNC SIGNALS POLARITY */
- out_be32(&hw->thresholds, 0x00037800); /* The Thresholds */
- out_be32(&hw->int_status, 0); /* INTERRUPT STATUS */
- out_be32(&hw->int_mask, 0); /* INT MASK */
- out_be32(&hw->plut, 0x01F5F666);
- /* Pixel Clock configuration */
- debug("DIU pixclock in ps - %d\n", var->pixclock);
- diu_set_pixel_clock(var->pixclock);
-
- fb_initialized = 1;
-
- /* Enable the DIU */
- fsl_diu_enable_panel(info);
- enable_lcdc();
-
- return 0;
-}
-
-char *fsl_fb_open(struct fb_info **info)
-{
- *info = &fsl_fb_info;
- return fsl_fb_info.screen_base;
-}
-
-void fsl_diu_close(void)
-{
- struct fb_info *info = &fsl_fb_info;
- fsl_diu_disable_panel(info);
-}
-
-static int fsl_diu_enable_panel(struct fb_info *info)
-{
- struct diu *hw = dr.diu_reg;
- struct diu_ad *ad = &fsl_diu_fb_ad;
-
- debug("Entered: enable_panel\n");
- if (in_be32(&hw->desc[0]) != (unsigned)ad)
- out_be32(&hw->desc[0], (unsigned)ad);
- debug("desc[0] = 0x%x\n", hw->desc[0]);
- return 0;
-}
-
-static int fsl_diu_disable_panel(struct fb_info *info)
-{
- struct diu *hw = dr.diu_reg;
-
- debug("Entered: disable_panel\n");
- if (in_be32(&hw->desc[0]) != (unsigned)&dummy_ad)
- out_be32(&hw->desc[0], (unsigned)&dummy_ad);
- return 0;
-}
-
-static int map_video_memory(struct fb_info *info, unsigned long bytes_align)
-{
- unsigned long offset;
- unsigned long mask;
-
- debug("Entered: map_video_memory\n");
- /* allocate maximum 1280*1024 with 32bpp */
- info->smem_len = 1280 * 4 *1024 + bytes_align;
- debug("MAP_VIDEO_MEMORY: smem_len = %d\n", info->smem_len);
- info->screen_base = malloc(info->smem_len);
- if (info->screen_base == NULL) {
- printf("Unable to allocate fb memory\n");
- return -1;
- }
- info->smem_start = (unsigned int) info->screen_base;
- mask = bytes_align - 1;
- offset = (unsigned long)info->screen_base & mask;
- if (offset) {
- info->screen_base += (bytes_align - offset);
- info->smem_len = info->smem_len - (bytes_align - offset);
- } else
- info->smem_len = info->smem_len - bytes_align;
-
- info->screen_size = info->smem_len;
-
- debug("Allocated fb @ 0x%08lx, size=%d.\n",
- info->smem_start, info->smem_len);
-
- return 0;
-}
-
-static void enable_lcdc(void)
-{
- struct diu *hw = dr.diu_reg;
-
- debug("Entered: enable_lcdc, fb_enabled = %d\n", fb_enabled);
- if (!fb_enabled) {
- out_be32(&hw->diu_mode, dr.mode);
- fb_enabled++;
- }
- debug("diu_mode = %d\n", hw->diu_mode);
-}
-
-static void disable_lcdc(void)
-{
- struct diu *hw = dr.diu_reg;
-
- debug("Entered: disable_lcdc, fb_enabled = %d\n", fb_enabled);
- if (fb_enabled) {
- out_be32(&hw->diu_mode, 0);
- fb_enabled = 0;
- }
-}
-
-/*
- * Align to 64-bit(8-byte), 32-byte, etc.
- */
-static int allocate_buf(struct diu_addr *buf, u32 size, u32 bytes_align)
-{
- u32 offset, ssize;
- u32 mask;
-
- debug("Entered: allocate_buf\n");
- ssize = size + bytes_align;
- buf->paddr = malloc(ssize);
- if (!buf->paddr)
- return -1;
-
- memset(buf->paddr, 0, ssize);
- mask = bytes_align - 1;
- offset = (u32)buf->paddr & mask;
- if (offset) {
- buf->offset = bytes_align - offset;
- buf->paddr = (unsigned char *) ((u32)buf->paddr + offset);
- } else
- buf->offset = 0;
- return 0;
-}
-
-#if defined(CONFIG_VIDEO) || defined(CONFIG_CFB_CONSOLE)
-#include <stdio_dev.h>
-#include <video_fb.h>
-/*
- * The Graphic Device
- */
-static GraphicDevice ctfb;
-
-void *video_hw_init(void)
-{
- struct fb_info *info;
-
- if (platform_diu_init(&ctfb.winSizeX, &ctfb.winSizeY) < 0)
- return NULL;
-
- /* fill in Graphic device struct */
- sprintf(ctfb.modeIdent, "%ix%ix%i %ikHz %iHz",
- ctfb.winSizeX, ctfb.winSizeY, 32, 64, 60);
-
- ctfb.frameAdrs = (unsigned int)fsl_fb_open(&info);
- ctfb.plnSizeX = ctfb.winSizeX;
- ctfb.plnSizeY = ctfb.winSizeY;
-
- ctfb.gdfBytesPP = 4;
- ctfb.gdfIndex = GDF_32BIT_X888RGB;
-
- ctfb.isaBase = 0;
- ctfb.pciBase = 0;
- ctfb.memSize = info->screen_size;
-
- /* Cursor Start Address */
- ctfb.dprBase = 0;
- ctfb.vprBase = 0;
- ctfb.cprBase = 0;
-
- return &ctfb;
-}
-#endif /* defined(CONFIG_VIDEO) || defined(CONFIG_CFB_CONSOLE) */
return 0;
}
-const char *board_hwconfig = "foo:bar=baz";
-const char *cpu_hwconfig = "foo:bar=baz";
-
phys_size_t
initdram(int board_type)
{
return 0;
}
-const char *board_hwconfig = "foo:bar=baz";
-const char *cpu_hwconfig = "foo:bar=baz";
-
phys_size_t initdram(int board_type)
{
phys_size_t dram_size = 0;
MPC8308RDB powerpc mpc83xx mpc8308rdb freescale
MPC8313ERDB_33 powerpc mpc83xx mpc8313erdb freescale - MPC8313ERDB:SYS_33MHZ
MPC8313ERDB_66 powerpc mpc83xx mpc8313erdb freescale - MPC8313ERDB:SYS_66MHZ
-MPC8313ERDB_NAND_33 powerpc mpc83xx mpc8313erdb freescale - MPC8313ERDB:SYS_33MHZ,NAND_U_BOOT,SYS_TEXT_BASE=0x00100000
-MPC8313ERDB_NAND_66 powerpc mpc83xx mpc8313erdb freescale - MPC8313ERDB:SYS_66MHZ,NAND_U_BOOT,SYS_TEXT_BASE=0x00100000
+MPC8313ERDB_NAND_33 powerpc mpc83xx mpc8313erdb freescale - MPC8313ERDB:SYS_33MHZ,NAND_U_BOOT
+MPC8313ERDB_NAND_66 powerpc mpc83xx mpc8313erdb freescale - MPC8313ERDB:SYS_66MHZ,NAND_U_BOOT
MPC8315ERDB powerpc mpc83xx mpc8315erdb freescale - MPC8315ERDB
-MPC8315ERDB_NAND powerpc mpc83xx mpc8315erdb freescale - MPC8315ERDB:NAND
+MPC8315ERDB_NAND powerpc mpc83xx mpc8315erdb freescale - MPC8315ERDB:NAND_U_BOOT
MPC8323ERDB powerpc mpc83xx mpc8323erdb freescale
MPC832XEMDS powerpc mpc83xx mpc832xemds freescale - MPC832XEMDS:
MPC832XEMDS_ATM powerpc mpc83xx mpc832xemds freescale - MPC832XEMDS:PQ_MDS_PIB=1,PQ_MDS_PIB_ATM=1
addr = (loff_t) off;
memset(&ops, 0, sizeof(ops));
ops.datbuf = datbuf;
- ops.oobbuf = oobbuf; /* must exist, but oob data will be appended to ops.datbuf */
+ ops.oobbuf = oobbuf;
ops.len = mtd->writesize;
ops.ooblen = mtd->oobsize;
ops.retlen = 0;
}
puts("OOB:\n");
i = mtd->oobsize >> 3;
+ p = oobbuf;
+
while (i--) {
printf("\t%02x %02x %02x %02x %02x %02x %02x %02x\n",
p[0], p[1], p[2], p[3], p[4], p[5], p[6], p[7]);
static struct selected_dev ubi_dev;
+#ifdef CONFIG_CMD_UBIFS
+int ubifs_is_mounted(void);
+void cmd_ubifs_umount(void);
+#endif
+
static void ubi_dump_vol_info(const struct ubi_volume *vol)
{
ubi_msg("volume information dump:");
if (argc < 3)
return cmd_usage(cmdtp);
+#ifdef CONFIG_CMD_UBIFS
+ /*
+ * Automatically unmount UBIFS partition when user
+ * changes the UBI device. Otherwise the following
+ * UBIFS commands will crash.
+ */
+ if (ubifs_is_mounted())
+ cmd_ubifs_umount();
+#endif
+
/* todo: get dev number for NAND... */
ubi_dev.nr = 0;
#include <config.h>
#include <command.h>
+#include "../fs/ubifs/ubifs.h"
+
static int ubifs_initialized;
static int ubifs_mounted;
+extern struct super_block *ubifs_sb;
+
/* Prototypes */
int ubifs_init(void);
int ubifs_mount(char *vol_name);
+void ubifs_umount(struct ubifs_info *c);
int ubifs_ls(char *dir_name);
int ubifs_load(char *filename, u32 addr, u32 size);
return 0;
}
+int ubifs_is_mounted(void)
+{
+ return ubifs_mounted;
+}
+
+void cmd_ubifs_umount(void)
+{
+
+ if (ubifs_sb) {
+ printf("Unmounting UBIFS volume %s!\n",
+ ((struct ubifs_info *)(ubifs_sb->s_fs_info))->vi.name);
+ ubifs_umount(ubifs_sb->s_fs_info);
+ }
+
+ ubifs_sb = NULL;
+ ubifs_mounted = 0;
+ ubifs_initialized = 0;
+}
+
+int do_ubifs_umount(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+{
+ if (argc != 1)
+ return cmd_usage(cmdtp);
+
+ if (ubifs_initialized == 0) {
+ printf("No UBIFS volume mounted!\n");
+ return -1;
+ }
+
+ cmd_ubifs_umount();
+
+ return 0;
+}
+
int do_ubifs_ls(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
char *filename = "/";
int ret;
if (!ubifs_mounted) {
- printf("UBIFS not mounted, use ubifs mount to mount volume first!\n");
+ printf("UBIFS not mounted, use ubifsmount to mount volume first!\n");
return -1;
}
" - mount 'volume-name' volume"
);
+U_BOOT_CMD(
+ ubifsumount, 1, 0, do_ubifs_umount,
+ "unmount UBIFS volume",
+ " - unmount current volume"
+);
+
U_BOOT_CMD(
ubifsls, 2, 0, do_ubifs_ls,
"list files in a directory",
offset += blocksize;
} else {
char_ptr = &buf[amount_loaded];
- if (nand_read(&nand_info[0], offset, &len, char_ptr))
+ if (nand_read_skip_bad(&nand_info[0], offset, &len, char_ptr))
return 1;
offset += blocksize;
amount_loaded += len;
return NULL;
}
-const char *cpu_hwconfig __attribute__((weak));
-const char *board_hwconfig __attribute__((weak));
+const char cpu_hwconfig[] __attribute__((weak)) = "";
+const char board_hwconfig[] __attribute__((weak)) = "";
#define HWCONFIG_PRE_RELOC_BUF_SIZE 128
return hwconfig_parse(env_hwconfig, strlen(env_hwconfig),
opt, ";", ':', arglen);
- if (board_hwconfig)
- return hwconfig_parse(board_hwconfig, strlen(board_hwconfig),
- opt, ";", ':', arglen);
+ return hwconfig_parse(board_hwconfig, strlen(board_hwconfig),
+ opt, ";", ':', arglen);
- if (cpu_hwconfig)
- return hwconfig_parse(cpu_hwconfig, strlen(cpu_hwconfig),
- opt, ";", ':', arglen);
+ return hwconfig_parse(cpu_hwconfig, strlen(cpu_hwconfig),
+ opt, ";", ':', arglen);
return NULL;
}
writel(readl(&clk_power->clkcon) | (1 << 4), &clk_power->clkcon);
/* initialize hardware */
- twrph0 = 3;
- twrph1 = 0;
- tacls = 0;
+#if defined(CONFIG_S3C24XX_CUSTOM_NAND_TIMING)
+ tacls = CONFIG_S3C24XX_TACLS;
+ twrph0 = CONFIG_S3C24XX_TWRPH0;
+ twrph1 = CONFIG_S3C24XX_TWRPH1;
+#else
+ tacls = 4;
+ twrph0 = 8;
+ twrph1 = 8;
+#endif
cfg = S3C2410_NFCONF_EN;
cfg |= S3C2410_NFCONF_TACLS(tacls - 1);
COBJS-$(CONFIG_ATI_RADEON_FB) += ati_radeon_fb.o videomodes.o
COBJS-$(CONFIG_ATMEL_LCD) += atmel_lcdfb.o
COBJS-$(CONFIG_CFB_CONSOLE) += cfb_console.o
+COBJS-$(CONFIG_FSL_DIU_FB) += fsl_diu_fb.o
COBJS-$(CONFIG_S6E63D6) += s6e63d6.o
COBJS-$(CONFIG_VIDEO_AMBA) += amba.o
COBJS-$(CONFIG_VIDEO_CT69000) += ct69000.o videomodes.o
--- /dev/null
+/*
+ * Copyright 2007, 2010 Freescale Semiconductor, Inc.
+ * York Sun <yorksun@freescale.com>
+ *
+ * FSL DIU Framebuffer driver
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <i2c.h>
+#include <malloc.h>
+#include <asm/io.h>
+
+#include <fsl_diu_fb.h>
+
+struct fb_videomode {
+ const char *name; /* optional */
+ unsigned int refresh; /* optional */
+ unsigned int xres;
+ unsigned int yres;
+ unsigned int pixclock;
+ unsigned int left_margin;
+ unsigned int right_margin;
+ unsigned int upper_margin;
+ unsigned int lower_margin;
+ unsigned int hsync_len;
+ unsigned int vsync_len;
+ unsigned int sync;
+ unsigned int vmode;
+ unsigned int flag;
+};
+
+#define FB_SYNC_VERT_HIGH_ACT 2 /* vertical sync high active */
+#define FB_SYNC_COMP_HIGH_ACT 8 /* composite sync high active */
+#define FB_VMODE_NONINTERLACED 0 /* non interlaced */
+
+/* This setting is used for the ifm pdm360ng with PRIMEVIEW PM070WL3 */
+static struct fb_videomode fsl_diu_mode_800 = {
+ .refresh = 60,
+ .xres = 800,
+ .yres = 480,
+ .pixclock = 31250,
+ .left_margin = 86,
+ .right_margin = 42,
+ .upper_margin = 33,
+ .lower_margin = 10,
+ .hsync_len = 128,
+ .vsync_len = 2,
+ .sync = 0,
+ .vmode = FB_VMODE_NONINTERLACED
+};
+
+/*
+ * These parameters give default parameters
+ * for video output 1024x768,
+ * FIXME - change timing to proper amounts
+ * hsync 31.5kHz, vsync 60Hz
+ */
+static struct fb_videomode fsl_diu_mode_1024 = {
+ .refresh = 60,
+ .xres = 1024,
+ .yres = 768,
+ .pixclock = 15385,
+ .left_margin = 160,
+ .right_margin = 24,
+ .upper_margin = 29,
+ .lower_margin = 3,
+ .hsync_len = 136,
+ .vsync_len = 6,
+ .sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
+ .vmode = FB_VMODE_NONINTERLACED
+};
+
+static struct fb_videomode fsl_diu_mode_1280 = {
+ .name = "1280x1024-60",
+ .refresh = 60,
+ .xres = 1280,
+ .yres = 1024,
+ .pixclock = 9375,
+ .left_margin = 38,
+ .right_margin = 128,
+ .upper_margin = 2,
+ .lower_margin = 7,
+ .hsync_len = 216,
+ .vsync_len = 37,
+ .sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
+ .vmode = FB_VMODE_NONINTERLACED
+};
+
+/*
+ * These are the fields of area descriptor(in DDR memory) for every plane
+ */
+struct diu_ad {
+ /* Word 0(32-bit) in DDR memory */
+ unsigned int pix_fmt; /* hard coding pixel format */
+ /* Word 1(32-bit) in DDR memory */
+ unsigned int addr;
+ /* Word 2(32-bit) in DDR memory */
+ unsigned int src_size_g_alpha;
+ /* Word 3(32-bit) in DDR memory */
+ unsigned int aoi_size;
+ /* Word 4(32-bit) in DDR memory */
+ unsigned int offset_xyi;
+ /* Word 5(32-bit) in DDR memory */
+ unsigned int offset_xyd;
+ /* Word 6(32-bit) in DDR memory */
+ unsigned int ckmax_r:8;
+ unsigned int ckmax_g:8;
+ unsigned int ckmax_b:8;
+ unsigned int res9:8;
+ /* Word 7(32-bit) in DDR memory */
+ unsigned int ckmin_r:8;
+ unsigned int ckmin_g:8;
+ unsigned int ckmin_b:8;
+ unsigned int res10:8;
+ /* Word 8(32-bit) in DDR memory */
+ unsigned int next_ad;
+ /* Word 9(32-bit) in DDR memory, just for 64-bit aligned */
+ unsigned int res1;
+ unsigned int res2;
+ unsigned int res3;
+}__attribute__ ((packed));
+
+/*
+ * DIU register map
+ */
+struct diu {
+ unsigned int desc[3];
+ unsigned int gamma;
+ unsigned int pallete;
+ unsigned int cursor;
+ unsigned int curs_pos;
+ unsigned int diu_mode;
+ unsigned int bgnd;
+ unsigned int bgnd_wb;
+ unsigned int disp_size;
+ unsigned int wb_size;
+ unsigned int wb_mem_addr;
+ unsigned int hsyn_para;
+ unsigned int vsyn_para;
+ unsigned int syn_pol;
+ unsigned int thresholds;
+ unsigned int int_status;
+ unsigned int int_mask;
+ unsigned int colorbar[8];
+ unsigned int filling;
+ unsigned int plut;
+} __attribute__ ((packed));
+
+struct diu_hw {
+ struct diu *diu_reg;
+ volatile unsigned int mode; /* DIU operation mode */
+};
+
+struct diu_addr {
+ unsigned char * paddr; /* Virtual address */
+ unsigned int offset;
+};
+
+/*
+ * Modes of operation of DIU
+ */
+#define MFB_MODE0 0 /* DIU off */
+#define MFB_MODE1 1 /* All three planes output to display */
+#define MFB_MODE2 2 /* Plane 1 to display,
+ * planes 2+3 written back to memory */
+#define MFB_MODE3 3 /* All three planes written back to memory */
+#define MFB_MODE4 4 /* Color bar generation */
+
+#define MAX_CURS 32
+
+static struct fb_info fsl_fb_info;
+static struct diu_addr gamma, cursor;
+static struct diu_ad fsl_diu_fb_ad __attribute__ ((aligned(32)));
+static struct diu_ad dummy_ad __attribute__ ((aligned(32)));
+static unsigned char *dummy_fb;
+static struct diu_hw dr = {
+ .mode = MFB_MODE1,
+};
+
+int fb_enabled = 0;
+int fb_initialized = 0;
+const int default_xres = 1280;
+const int default_pixel_format = 0x88882317;
+
+static int map_video_memory(struct fb_info *info, unsigned long bytes_align);
+static void enable_lcdc(void);
+static void disable_lcdc(void);
+static int fsl_diu_enable_panel(struct fb_info *info);
+static int fsl_diu_disable_panel(struct fb_info *info);
+static int allocate_buf(struct diu_addr *buf, u32 size, u32 bytes_align);
+void diu_set_pixel_clock(unsigned int pixclock);
+
+int fsl_diu_init(int xres, unsigned int pixel_format, int gamma_fix)
+{
+ struct fb_videomode *fsl_diu_mode_db;
+ struct diu_ad *ad = &fsl_diu_fb_ad;
+ struct diu *hw;
+ struct fb_info *info = &fsl_fb_info;
+ struct fb_var_screeninfo *var = &info->var;
+ unsigned char *gamma_table_base;
+ unsigned int i, j;
+
+ debug("Enter fsl_diu_init\n");
+ dr.diu_reg = (struct diu *) (CONFIG_SYS_DIU_ADDR);
+ hw = (struct diu *) dr.diu_reg;
+
+ disable_lcdc();
+
+ switch (xres) {
+ case 800:
+ fsl_diu_mode_db = &fsl_diu_mode_800;
+ break;
+ case 1280:
+ fsl_diu_mode_db = &fsl_diu_mode_1280;
+ break;
+ default:
+ fsl_diu_mode_db = &fsl_diu_mode_1024;
+ }
+
+ if (0 == fb_initialized) {
+ allocate_buf(&gamma, 768, 32);
+ debug("gamma is allocated @ 0x%x\n",
+ (unsigned int)gamma.paddr);
+ allocate_buf(&cursor, MAX_CURS * MAX_CURS * 2, 32);
+ debug("curosr is allocated @ 0x%x\n",
+ (unsigned int)cursor.paddr);
+
+ /* create a dummy fb and dummy ad */
+ dummy_fb = malloc(64);
+ if (NULL == dummy_fb) {
+ printf("Cannot allocate dummy fb\n");
+ return -1;
+ }
+ dummy_ad.addr = cpu_to_le32((unsigned int)dummy_fb);
+ dummy_ad.pix_fmt = 0x88882317;
+ dummy_ad.src_size_g_alpha = 0x04400000; /* alpha = 0 */
+ dummy_ad.aoi_size = 0x02000400;
+ dummy_ad.offset_xyi = 0;
+ dummy_ad.offset_xyd = 0;
+ dummy_ad.next_ad = 0;
+ /* Memory allocation for framebuffer */
+ if (map_video_memory(info, 32)) {
+ printf("Unable to allocate fb memory 1\n");
+ return -1;
+ }
+ }
+
+ memset(info->screen_base, 0, info->smem_len);
+
+ out_be32(&dr.diu_reg->desc[0], (int)&dummy_ad);
+ out_be32(&dr.diu_reg->desc[1], (int)&dummy_ad);
+ out_be32(&dr.diu_reg->desc[2], (int)&dummy_ad);
+ debug("dummy dr.diu_reg->desc[0] = 0x%x\n", dr.diu_reg->desc[0]);
+ debug("dummy desc[0] = 0x%x\n", hw->desc[0]);
+
+ /* read mode info */
+ var->xres = fsl_diu_mode_db->xres;
+ var->yres = fsl_diu_mode_db->yres;
+ var->bits_per_pixel = 32;
+ var->pixclock = fsl_diu_mode_db->pixclock;
+ var->left_margin = fsl_diu_mode_db->left_margin;
+ var->right_margin = fsl_diu_mode_db->right_margin;
+ var->upper_margin = fsl_diu_mode_db->upper_margin;
+ var->lower_margin = fsl_diu_mode_db->lower_margin;
+ var->hsync_len = fsl_diu_mode_db->hsync_len;
+ var->vsync_len = fsl_diu_mode_db->vsync_len;
+ var->sync = fsl_diu_mode_db->sync;
+ var->vmode = fsl_diu_mode_db->vmode;
+ info->line_length = var->xres * var->bits_per_pixel / 8;
+
+ ad->pix_fmt = pixel_format;
+ ad->addr = cpu_to_le32((unsigned int)info->screen_base);
+ ad->src_size_g_alpha
+ = cpu_to_le32((var->yres << 12) | var->xres);
+ /* fix me. AOI should not be greater than display size */
+ ad->aoi_size = cpu_to_le32(( var->yres << 16) | var->xres);
+ ad->offset_xyi = 0;
+ ad->offset_xyd = 0;
+
+ /* Disable chroma keying function */
+ ad->ckmax_r = 0;
+ ad->ckmax_g = 0;
+ ad->ckmax_b = 0;
+
+ ad->ckmin_r = 255;
+ ad->ckmin_g = 255;
+ ad->ckmin_b = 255;
+
+ gamma_table_base = gamma.paddr;
+ debug("gamma_table_base is allocated @ 0x%x\n",
+ (unsigned int)gamma_table_base);
+
+ /* Prep for DIU init - gamma table */
+
+ for (i = 0; i <= 2; i++)
+ for (j = 0; j <= 255; j++)
+ *gamma_table_base++ = j;
+
+ if (gamma_fix == 1) { /* fix the gamma */
+ debug("Fix gamma table\n");
+ gamma_table_base = gamma.paddr;
+ for (i = 0; i < 256*3; i++) {
+ gamma_table_base[i] = (gamma_table_base[i] << 2)
+ | ((gamma_table_base[i] >> 6) & 0x03);
+ }
+ }
+
+ debug("update-lcdc: HW - %p\n Disabling DIU\n", hw);
+
+ /* Program DIU registers */
+
+ out_be32(&hw->gamma, (int)gamma.paddr);
+ out_be32(&hw->cursor, (int)cursor.paddr);
+ out_be32(&hw->bgnd, 0x007F7F7F);
+ out_be32(&hw->bgnd_wb, 0); /* BGND_WB */
+ out_be32(&hw->disp_size, var->yres << 16 | var->xres); /* DISP SIZE */
+ out_be32(&hw->wb_size, 0); /* WB SIZE */
+ out_be32(&hw->wb_mem_addr, 0); /* WB MEM ADDR */
+ out_be32(&hw->hsyn_para, var->left_margin << 22 | /* BP_H */
+ var->hsync_len << 11 | /* PW_H */
+ var->right_margin); /* FP_H */
+
+ out_be32(&hw->vsyn_para, var->upper_margin << 22 | /* BP_V */
+ var->vsync_len << 11 | /* PW_V */
+ var->lower_margin); /* FP_V */
+
+ out_be32(&hw->syn_pol, 0); /* SYNC SIGNALS POLARITY */
+ out_be32(&hw->thresholds, 0x00037800); /* The Thresholds */
+ out_be32(&hw->int_status, 0); /* INTERRUPT STATUS */
+ out_be32(&hw->int_mask, 0); /* INT MASK */
+ out_be32(&hw->plut, 0x01F5F666);
+ /* Pixel Clock configuration */
+ debug("DIU pixclock in ps - %d\n", var->pixclock);
+ diu_set_pixel_clock(var->pixclock);
+
+ fb_initialized = 1;
+
+ /* Enable the DIU */
+ fsl_diu_enable_panel(info);
+ enable_lcdc();
+
+ return 0;
+}
+
+char *fsl_fb_open(struct fb_info **info)
+{
+ *info = &fsl_fb_info;
+ return fsl_fb_info.screen_base;
+}
+
+void fsl_diu_close(void)
+{
+ struct fb_info *info = &fsl_fb_info;
+ fsl_diu_disable_panel(info);
+}
+
+static int fsl_diu_enable_panel(struct fb_info *info)
+{
+ struct diu *hw = dr.diu_reg;
+ struct diu_ad *ad = &fsl_diu_fb_ad;
+
+ debug("Entered: enable_panel\n");
+ if (in_be32(&hw->desc[0]) != (unsigned)ad)
+ out_be32(&hw->desc[0], (unsigned)ad);
+ debug("desc[0] = 0x%x\n", hw->desc[0]);
+ return 0;
+}
+
+static int fsl_diu_disable_panel(struct fb_info *info)
+{
+ struct diu *hw = dr.diu_reg;
+
+ debug("Entered: disable_panel\n");
+ if (in_be32(&hw->desc[0]) != (unsigned)&dummy_ad)
+ out_be32(&hw->desc[0], (unsigned)&dummy_ad);
+ return 0;
+}
+
+static int map_video_memory(struct fb_info *info, unsigned long bytes_align)
+{
+ unsigned long offset;
+ unsigned long mask;
+
+ debug("Entered: map_video_memory\n");
+ /* allocate maximum 1280*1024 with 32bpp */
+ info->smem_len = 1280 * 4 *1024 + bytes_align;
+ debug("MAP_VIDEO_MEMORY: smem_len = %d\n", info->smem_len);
+ info->screen_base = malloc(info->smem_len);
+ if (info->screen_base == NULL) {
+ printf("Unable to allocate fb memory\n");
+ return -1;
+ }
+ info->smem_start = (unsigned int) info->screen_base;
+ mask = bytes_align - 1;
+ offset = (unsigned long)info->screen_base & mask;
+ if (offset) {
+ info->screen_base += (bytes_align - offset);
+ info->smem_len = info->smem_len - (bytes_align - offset);
+ } else
+ info->smem_len = info->smem_len - bytes_align;
+
+ info->screen_size = info->smem_len;
+
+ debug("Allocated fb @ 0x%08lx, size=%d.\n",
+ info->smem_start, info->smem_len);
+
+ return 0;
+}
+
+static void enable_lcdc(void)
+{
+ struct diu *hw = dr.diu_reg;
+
+ debug("Entered: enable_lcdc, fb_enabled = %d\n", fb_enabled);
+ if (!fb_enabled) {
+ out_be32(&hw->diu_mode, dr.mode);
+ fb_enabled++;
+ }
+ debug("diu_mode = %d\n", hw->diu_mode);
+}
+
+static void disable_lcdc(void)
+{
+ struct diu *hw = dr.diu_reg;
+
+ debug("Entered: disable_lcdc, fb_enabled = %d\n", fb_enabled);
+ if (fb_enabled) {
+ out_be32(&hw->diu_mode, 0);
+ fb_enabled = 0;
+ }
+}
+
+/*
+ * Align to 64-bit(8-byte), 32-byte, etc.
+ */
+static int allocate_buf(struct diu_addr *buf, u32 size, u32 bytes_align)
+{
+ u32 offset, ssize;
+ u32 mask;
+
+ debug("Entered: allocate_buf\n");
+ ssize = size + bytes_align;
+ buf->paddr = malloc(ssize);
+ if (!buf->paddr)
+ return -1;
+
+ memset(buf->paddr, 0, ssize);
+ mask = bytes_align - 1;
+ offset = (u32)buf->paddr & mask;
+ if (offset) {
+ buf->offset = bytes_align - offset;
+ buf->paddr = (unsigned char *) ((u32)buf->paddr + offset);
+ } else
+ buf->offset = 0;
+ return 0;
+}
+
+#if defined(CONFIG_VIDEO) || defined(CONFIG_CFB_CONSOLE)
+#include <stdio_dev.h>
+#include <video_fb.h>
+/*
+ * The Graphic Device
+ */
+static GraphicDevice ctfb;
+
+void *video_hw_init(void)
+{
+ struct fb_info *info;
+
+ if (platform_diu_init(&ctfb.winSizeX, &ctfb.winSizeY) < 0)
+ return NULL;
+
+ /* fill in Graphic device struct */
+ sprintf(ctfb.modeIdent, "%ix%ix%i %ikHz %iHz",
+ ctfb.winSizeX, ctfb.winSizeY, 32, 64, 60);
+
+ ctfb.frameAdrs = (unsigned int)fsl_fb_open(&info);
+ ctfb.plnSizeX = ctfb.winSizeX;
+ ctfb.plnSizeY = ctfb.winSizeY;
+
+ ctfb.gdfBytesPP = 4;
+ ctfb.gdfIndex = GDF_32BIT_X888RGB;
+
+ ctfb.isaBase = 0;
+ ctfb.pciBase = 0;
+ ctfb.memSize = info->screen_size;
+
+ /* Cursor Start Address */
+ ctfb.dprBase = 0;
+ ctfb.vprBase = 0;
+ ctfb.cprBase = 0;
+
+ return &ctfb;
+}
+#endif /* defined(CONFIG_VIDEO) || defined(CONFIG_CFB_CONSOLE) */
* through mounting (error path cleanup function). So it has to make sure the
* resource was actually allocated before freeing it.
*/
-static void ubifs_umount(struct ubifs_info *c)
+void ubifs_umount(struct ubifs_info *c)
{
dbg_gen("un-mounting UBI device %d, volume %d", c->vi.ubi_num,
c->vi.vol_id);
*
* Copyright (C) 2006-2008 Nokia Corporation.
*
- * (C) Copyright 2008-2009
+ * (C) Copyright 2008-2010
* Stefan Roese, DENX Software Engineering, sr@denx.de.
*
* This program is free software; you can redistribute it and/or modify it
unsigned long root_inum = 1;
unsigned long inum;
int symlink_count = 0; /* Don't allow symlink recursion */
+ char link_name[64];
strcpy(fpath, filename);
ui = ubifs_inode(inode);
if ((inode->i_mode & S_IFMT) == S_IFLNK) {
- char link_name[64];
char buf[128];
/* We have some sort of symlink recursion, bail out */
return -EINVAL;
}
-static int do_readpage(struct ubifs_info *c, struct inode *inode, struct page *page)
+static int do_readpage(struct ubifs_info *c, struct inode *inode,
+ struct page *page, int last_block_size)
{
void *addr;
int err = 0, i;
err = -ENOENT;
memset(addr, 0, UBIFS_BLOCK_SIZE);
} else {
- ret = read_block(inode, addr, block, dn);
- if (ret) {
- err = ret;
- if (err != -ENOENT)
+ /*
+ * Reading last block? Make sure to not write beyond
+ * the requested size in the destination buffer.
+ */
+ if (((block + 1) == beyond) || last_block_size) {
+ void *buff;
+ int dlen;
+
+ /*
+ * We need to buffer the data locally for the
+ * last block. This is to not pad the
+ * destination area to a multiple of
+ * UBIFS_BLOCK_SIZE.
+ */
+ buff = malloc(UBIFS_BLOCK_SIZE);
+ if (!buff) {
+ printf("%s: Error, malloc fails!\n",
+ __func__);
+ err = -ENOMEM;
break;
- } else if (block + 1 == beyond) {
- int dlen = le32_to_cpu(dn->size);
- int ilen = i_size & (UBIFS_BLOCK_SIZE - 1);
-
- if (ilen && ilen < dlen)
- memset(addr + ilen, 0, dlen - ilen);
+ }
+
+ /* Read block-size into temp buffer */
+ ret = read_block(inode, buff, block, dn);
+ if (ret) {
+ err = ret;
+ if (err != -ENOENT) {
+ free(buff);
+ break;
+ }
+ }
+
+ if (last_block_size)
+ dlen = last_block_size;
+ else
+ dlen = le32_to_cpu(dn->size);
+
+ /* Now copy required size back to dest */
+ memcpy(addr, buff, dlen);
+
+ free(buff);
+ } else {
+ ret = read_block(inode, addr, block, dn);
+ if (ret) {
+ err = ret;
+ if (err != -ENOENT)
+ break;
+ }
}
}
if (++i >= UBIFS_BLOCKS_PER_PAGE)
int err = 0;
int i;
int count;
+ int last_block_size = 0;
c->ubi = ubi_open_volume(c->vi.ubi_num, c->vi.vol_id, UBI_READONLY);
/* ubifs_findfile will resolve symlinks, so we know that we get
page.index = 0;
page.inode = inode;
for (i = 0; i < count; i++) {
- err = do_readpage(c, inode, &page);
+ /*
+ * Make sure to not read beyond the requested size
+ */
+ if (((i + 1) == count) && (size < inode->i_size))
+ last_block_size = size - (i * PAGE_SIZE);
+
+ err = do_readpage(c, inode, &page, last_block_size);
if (err)
break;
/*
* CS4 on Local Bus, to PIB
*/
-#define CONFIG_SYS_BR4_PRELIM 0xf8010801 /* CS4 base address at 0xf8010000 */
+#define CONFIG_SYS_BR4_PRELIM 0xf8008801 /* CS4 base address at 0xf8008000 */
#define CONFIG_SYS_OR4_PRELIM 0xffffe9f7 /* size 32KB, port size 8bit, GPCM */
/*
* CS5 on Local Bus, to PIB
*/
-#define CONFIG_SYS_BR5_PRELIM 0xf8008801 /* CS5 base address at 0xf8008000 */
+#define CONFIG_SYS_BR5_PRELIM 0xf8010801 /* CS5 base address at 0xf8010000 */
#define CONFIG_SYS_OR5_PRELIM 0xffffe9f7 /* size 32KB, port size 8bit, GPCM */
/*
#define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */
#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */
-#if defined(CONFIG_SYS_SPL) || defined(CONFIG_RAMBOOT_NAND) \
- || defined(CONFIG_RAMBOOT_SDCARD) || defined(CONFIG_RAMBOOT_SPIFLASH)
+#if defined(CONFIG_RAMBOOT_NAND) || defined(CONFIG_RAMBOOT_SDCARD) || \
+ defined(CONFIG_RAMBOOT_SPIFLASH)
#define CONFIG_SYS_RAMBOOT
+#define CONFIG_SYS_EXTRA_ENV_RELOC
#else
#undef CONFIG_SYS_RAMBOOT
#endif
#define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */
#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */
-#if defined(CONFIG_SYS_SPL) || defined(CONFIG_RAMBOOT_NAND)
+#if defined(CONFIG_RAMBOOT_NAND)
#define CONFIG_SYS_RAMBOOT
+#define CONFIG_SYS_EXTRA_ENV_RELOC
#else
#undef CONFIG_SYS_RAMBOOT
#endif
#define CONFIG_BOARD_EARLY_INIT_R /* call board_early_init_r function */
+#define CONFIG_HWCONFIG /* enable hwconfig */
#define CONFIG_FSL_PIXIS 1 /* use common PIXIS code */
#define PIXIS_BASE 0xffdf0000 /* PIXIS registers */
#ifdef CONFIG_PHYS_64BIT
#define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */
#define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */
-#if defined(CONFIG_SYS_SPL) || defined(CONFIG_RAMBOOT_NAND) \
- || defined(CONFIG_RAMBOOT_SDCARD) || defined(CONFIG_RAMBOOT_SPIFLASH)
+#if defined(CONFIG_RAMBOOT_NAND) || defined(CONFIG_RAMBOOT_SDCARD) || \
+ defined(CONFIG_RAMBOOT_SPIFLASH)
#define CONFIG_SYS_RAMBOOT
+#define CONFIG_SYS_EXTRA_ENV_RELOC
#else
#undef CONFIG_SYS_RAMBOOT
#endif
#define CONFIG_E300 1 /* E300 Family */
#define CONFIG_MPC512X 1 /* MPC512X family */
#define CONFIG_FSL_DIU_FB 1 /* FSL DIU */
-#define CONFIG_FSL_DIU_LOGO_BMP 1 /* Don't include FSL DIU binary bmp */
#define CONFIG_SYS_TEXT_BASE 0xFFF00000
#define CONFIG_BOOTP_SUBNETMASK
#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_DOS_PARTITION 1
-
/*
* Command line configuration.
*/
#define CONFIG_BOOTP_SUBNETMASK
#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_DOS_PARTITION 1
-
/*
* Command line configuration.
*/
#define CONFIG_RTL8169
*/
/* AX88796L Support(NE2000 base chip) */
-#define CONFIG_DRIVER_NE2000
#define CONFIG_DRIVER_AX88796L
#define CONFIG_DRIVER_NE2000_BASE 0xA4100000
#endif
#define PCI_DEVICE_ID_PLX_SPCOM200 0x1103
#define PCI_DEVICE_ID_PLX_DJINN_ITOO 0x1151
#define PCI_DEVICE_ID_PLX_R753 0x1152
+#define PCI_DEVICE_ID_PLX_9030 0x9030
#define PCI_DEVICE_ID_PLX_9050 0x9050
#define PCI_DEVICE_ID_PLX_9060 0x9060
#define PCI_DEVICE_ID_PLX_9060ES 0x906E
#elif defined (CONFIG_MPC85xx)
#include <asm/immap_85xx.h>
-#define _POST_WORD_ADDR (CONFIG_SYS_IMMR + offsetof(ccsr_pic_t, tfrr))
+#define _POST_WORD_ADDR (CONFIG_SYS_IMMR + CONFIG_SYS_MPC85xx_PIC_OFFSET + \
+ offsetof(ccsr_pic_t, tfrr))
#elif defined (CONFIG_MPC86xx)
#include <asm/immap_86xx.h>
-#define _POST_WORD_ADDR (CONFIG_SYS_IMMR + offsetof(ccsr_pic_t, tfrr))
+#define _POST_WORD_ADDR (CONFIG_SYS_IMMR + CONFIG_SYS_MPC86xx_PIC_OFFSET + \
+ offsetof(ccsr_pic_t, tfrr))
#elif defined (CONFIG_4xx)
#define _POST_WORD_ADDR \
projects / oweals / u-boot.git / commitdiff