unsigned char model;
dev = eth_get_dev_by_name(devname);
- if (dev == NULL) {
+ if (!dev) {
printf("%s: no such device\n", devname);
return NULL;
}
struct eth_device *dev;
dev = verify_phyaddr(bus->name, addr);
- if (dev == NULL)
+ if (!dev)
return -1;
if (get_phyreg(dev, addr, reg, &value) != 0) {
struct eth_device *dev;
dev = verify_phyaddr(bus->name, addr);
- if (dev == NULL)
+ if (!dev)
return -1;
if (set_phyreg(dev, addr, reg, value) != 0) {
debug("eepro100: Intel i82559 PCI EtherExpressPro @0x%x\n",
iobase);
- pci_write_config_dword(devno,
- PCI_COMMAND,
- PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER);
+ pci_write_config_dword(devno, PCI_COMMAND,
+ PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER);
/* Check if I/O accesses and Bus Mastering are enabled. */
pci_read_config_dword(devno, PCI_COMMAND, &status);
continue;
}
- dev = (struct eth_device *)malloc(sizeof *dev);
+ dev = (struct eth_device *)malloc(sizeof(*dev));
if (!dev) {
printf("eepro100: Can not allocate memory\n");
break;
/* register mii command access routines */
int retval;
struct mii_dev *mdiodev = mdio_alloc();
+
if (!mdiodev)
return -ENOMEM;
strncpy(mdiodev->name, dev->name, MDIO_NAME_LEN);
return card_number;
}
-
static int eepro100_init(struct eth_device *dev, bd_t *bis)
{
int i, status = -1;
tx_next = ((tx_next + 1) % NUM_TX_DESC);
cfg_cmd = (struct descriptor *)&tx_ring[tx_cur];
- cfg_cmd->command = cpu_to_le16 ((CONFIG_SYS_CMD_SUSPEND | CONFIG_SYS_CMD_CONFIGURE));
+ cfg_cmd->command = cpu_to_le16(CONFIG_SYS_CMD_SUSPEND |
+ CONFIG_SYS_CMD_CONFIGURE);
cfg_cmd->status = 0;
- cfg_cmd->link = cpu_to_le32 (phys_to_bus((u32)&tx_ring[tx_next]));
+ cfg_cmd->link = cpu_to_le32(phys_to_bus((u32)&tx_ring[tx_next]));
memcpy(cfg_cmd->params, i82558_config_cmd,
sizeof(i82558_config_cmd));
tx_next = ((tx_next + 1) % NUM_TX_DESC);
ias_cmd = (struct descriptor *)&tx_ring[tx_cur];
- ias_cmd->command = cpu_to_le16 ((CONFIG_SYS_CMD_SUSPEND | CONFIG_SYS_CMD_IAS));
+ ias_cmd->command = cpu_to_le16(CONFIG_SYS_CMD_SUSPEND |
+ CONFIG_SYS_CMD_IAS);
ias_cmd->status = 0;
- ias_cmd->link = cpu_to_le32 (phys_to_bus((u32)&tx_ring[tx_next]));
+ ias_cmd->link = cpu_to_le32(phys_to_bus((u32)&tx_ring[tx_next]));
memcpy(ias_cmd->params, dev->enetaddr, 6);
OUTL(dev, phys_to_bus((u32)&tx_ring[tx_cur]), SCBPointer);
OUTW(dev, SCB_M | CU_START, SCBCmd);
- for (i = 0; !(le16_to_cpu(tx_ring[tx_cur].status) & CONFIG_SYS_STATUS_C);
- i++) {
+ for (i = 0;
+ !(le16_to_cpu(tx_ring[tx_cur].status) & CONFIG_SYS_STATUS_C);
+ i++) {
if (i >= TOUT_LOOP) {
printf("%s: Tx error buffer not ready\n",
dev->name);
OUTL(dev, phys_to_bus((u32)&tx_ring[tx_cur]), SCBPointer);
OUTW(dev, SCB_M | CU_START, SCBCmd);
- for (i = 0; !(le16_to_cpu(tx_ring[tx_cur].status) & CONFIG_SYS_STATUS_C);
- i++) {
+ for (i = 0;
+ !(le16_to_cpu(tx_ring[tx_cur].status) & CONFIG_SYS_STATUS_C);
+ i++) {
if (i >= TOUT_LOOP) {
printf("%s: Tx error buffer not ready\n", dev->name);
goto Done;
for (i = 0; i < NUM_RX_DESC; i++) {
rx_ring[i].status = 0;
- rx_ring[i].control =
- (i == NUM_RX_DESC - 1) ? cpu_to_le16 (RFD_CONTROL_S) : 0;
+ rx_ring[i].control = (i == NUM_RX_DESC - 1) ?
+ cpu_to_le16 (RFD_CONTROL_S) : 0;
rx_ring[i].link =
- cpu_to_le32 (phys_to_bus
- ((u32)&rx_ring[(i + 1) % NUM_RX_DESC]));
+ cpu_to_le32(phys_to_bus((u32)&rx_ring[(i + 1) %
+ NUM_RX_DESC]));
rx_ring[i].rx_buf_addr = 0xffffffff;
- rx_ring[i].count = cpu_to_le32 (PKTSIZE_ALIGN << 16);
+ rx_ring[i].count = cpu_to_le32(PKTSIZE_ALIGN << 16);
}
rx_next = 0;