rockchip: rk3328: defconfig: no need to reserve IRAM for SPL
authorKever Yang <kever.yang@rock-chips.com>
Wed, 23 Oct 2019 02:08:53 +0000 (10:08 +0800)
committerKever Yang <kever.yang@rock-chips.com>
Sun, 10 Nov 2019 12:40:20 +0000 (20:40 +0800)
We use to reserve IRAM to avoid the SPL text overlap with ATF M0 code,
and when we introduce the TPL, the SPL space is in DRAM, we reserve
space to avoid SPL text overlap with ATF bl31.

Now we decide to move ATF entry point to 0x40000 instead of 0x1000,
so that the SPL can have 0x4000 as code size and no need to reserve
space or relocate before loading ATF.

The mainline ATF has update since:
0aad563c rockchip: Update BL31_BASE to 0x40000

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
configs/evb-rk3328_defconfig
configs/rock64-rk3328_defconfig

index f161c40ae76961664b8d63ad31eb67696508eebc..a4405a6a9ddad39ee762dc1238ff9cf8087d43ab 100644 (file)
@@ -3,7 +3,6 @@ CONFIG_ARCH_ROCKCHIP=y
 CONFIG_SYS_TEXT_BASE=0x00200000
 CONFIG_ROCKCHIP_RK3328=y
 CONFIG_TPL_ROCKCHIP_COMMON_BOARD=y
-CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x40000
 CONFIG_TPL_LIBCOMMON_SUPPORT=y
 CONFIG_TPL_LIBGENERIC_SUPPORT=y
 CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
index 60a0d1473c186b32404340120c908746bfea585e..3b3ac96cc0f305ec6a4bd88269b7fc32f9c77a29 100644 (file)
@@ -3,7 +3,6 @@ CONFIG_ARCH_ROCKCHIP=y
 CONFIG_SYS_TEXT_BASE=0x00200000
 CONFIG_ROCKCHIP_RK3328=y
 CONFIG_TPL_ROCKCHIP_COMMON_BOARD=y
-CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x40000
 CONFIG_TPL_LIBCOMMON_SUPPORT=y
 CONFIG_TPL_LIBGENERIC_SUPPORT=y
 CONFIG_SPL_DRIVERS_MISC_SUPPORT=y