powerpc/b4: Fix the wrong register offset of B4 PCIE module
authorLiu Gang <Gang.Liu@freescale.com>
Mon, 25 Feb 2013 00:14:17 +0000 (00:14 +0000)
committerAndy Fleming <afleming@freescale.com>
Thu, 2 May 2013 21:56:43 +0000 (16:56 -0500)
B4420/B4860 PCIE can not work because of the wrong definition of
the PCIE register offset in the file:
arch/powerpc/include/asm/immap_85xx.h

Add the judgement of B4420/B4860 to make the register offset to:
#define CONFIG_SYS_MPC85xx_PCIE1_OFFSET         0x200000

Signed-off-by: Liu Gang <Gang.Liu@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
arch/powerpc/include/asm/immap_85xx.h

index 4eb3f7923039aec0964e899b674a890a56bd794d..1c8d1ac0eea67343f4dbcf5ccf8ec4d7c1148cd0 100644 (file)
@@ -2914,7 +2914,8 @@ struct ccsr_pman {
 #define CONFIG_SYS_MPC85xx_IFC_OFFSET          0x124000
 #define CONFIG_SYS_MPC85xx_GPIO_OFFSET         0x130000
 #define CONFIG_SYS_FSL_CORENET_RMAN_OFFSET     0x1e0000
-#ifdef CONFIG_SYS_FSL_QORIQ_CHASSIS2
+#if defined(CONFIG_SYS_FSL_QORIQ_CHASSIS2) && !defined(CONFIG_PPC_B4860)\
+       && !defined(CONFIG_PPC_B4420)
 #define CONFIG_SYS_MPC85xx_PCIE1_OFFSET                0x240000
 #define CONFIG_SYS_MPC85xx_PCIE2_OFFSET                0x250000
 #define CONFIG_SYS_MPC85xx_PCIE3_OFFSET                0x260000