rockchip: dts: rk3288: correct sdram setting for miniarm
authorJacob Chen <jacob2.chen@rock-chips.com>
Tue, 15 Nov 2016 04:01:47 +0000 (12:01 +0800)
committerSimon Glass <sjg@chromium.org>
Thu, 9 Feb 2017 19:10:59 +0000 (12:10 -0700)
miniarm board use lpddr3

Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
Added 'rockchip:' prefix to subject:
Signed-off-by: Simon Glass <sjg@chromium.org>
Change-Id: I84c3679dab2dbd8d01c1ebfd22220946d07c03cd

arch/arm/dts/rk3288-miniarm.dts

index 9083028579f1068a8ca7fd7c609448332126209f..3dd40e6f0ef61cb83869f9e830895aec9e591ad0 100644 (file)
 };
 
 &dmc {
-       rockchip,pctl-timing = <0x29a 0xc8 0x1f8 0x42 0x4e 0x4 0xea 0xa
-               0x5 0x0 0xa 0x7 0x19 0x24 0xa 0x7
-               0x5 0xa 0x5 0x200 0x5 0x10 0x40 0x0
-               0x1 0x7 0x7 0x4 0xc 0x43 0x100 0x0
-               0x5 0x0>;
-       rockchip,phy-timing = <0x48f9aab4 0xea0910 0x1002c200
-               0xa60 0x40 0x10 0x0>;
-       rockchip,sdram-params = <0x30B25564 0x627 3 666000000 3 9 1>;
+       rockchip,pctl-timing = <0x215 0xc8 0x0 0x35 0x26 0x2 0x70 0x2000d
+               0x6 0x0 0x8 0x4 0x17 0x24 0xd 0x6
+               0x4 0x8 0x4 0x76 0x4 0x0 0x30 0x0
+               0x1 0x2 0x2 0x4 0x0 0x0 0xc0 0x4
+               0x8 0x1f4>;
+       rockchip,phy-timing = <0x48d7dd93 0x187008d8 0x121076
+               0x0 0xc3 0x6 0x2>;
+       rockchip,sdram-params = <0x20d266a4 0x5b6 2 533000000 6 9 0>;
 };