return 0;
}
-const struct sdhci_ops am654_sdhci_ops = {
- .set_ios_post = &am654_sdhci_set_ios_post,
- .set_control_reg = &am654_sdhci_set_control_reg,
-};
-
-const struct am654_driver_data am654_drv_data = {
- .ops = &am654_sdhci_ops,
- .flags = IOMUX_PRESENT | FREQSEL_2_BIT | DLL_PRESENT | STRBSEL_4_BIT,
-};
-
-const struct am654_driver_data j721e_8bit_drv_data = {
- .ops = &am654_sdhci_ops,
- .flags = DLL_PRESENT,
-};
-
-static int j721e_4bit_sdhci_set_ios_post(struct sdhci_host *host)
-{
- struct udevice *dev = host->mmc->dev;
- struct am654_sdhci_plat *plat = dev_get_platdata(dev);
- u32 otap_del_sel, mask, val;
-
- otap_del_sel = plat->otap_del_sel[host->mmc->selected_mode];
- mask = OTAPDLYENA_MASK | OTAPDLYSEL_MASK;
- val = (1 << OTAPDLYENA_SHIFT) | (otap_del_sel << OTAPDLYSEL_SHIFT);
- regmap_update_bits(plat->base, PHY_CTRL4, mask, val);
-
- return 0;
-}
-
-const struct sdhci_ops j721e_4bit_sdhci_ops = {
- .set_ios_post = &j721e_4bit_sdhci_set_ios_post,
-};
-
-const struct am654_driver_data j721e_4bit_drv_data = {
- .ops = &j721e_4bit_sdhci_ops,
- .flags = IOMUX_PRESENT,
-};
-
int am654_sdhci_init(struct am654_sdhci_plat *plat)
{
u32 ctl_cfg_2 = 0;
return 0;
}
+#define MAX_SDCD_DEBOUNCE_TIME 2000
+static int am654_sdhci_deferred_probe(struct sdhci_host *host)
+{
+ struct udevice *dev = host->mmc->dev;
+ struct am654_sdhci_plat *plat = dev_get_platdata(dev);
+ unsigned long start;
+ int val;
+
+ /*
+ * The controller takes about 1 second to debounce the card detect line
+ * and doesn't let us power on until that time is up. Instead of waiting
+ * for 1 second at every stage, poll on the CARD_PRESENT bit upto a
+ * maximum of 2 seconds to be safe..
+ */
+ start = get_timer(0);
+ do {
+ if (get_timer(start) > MAX_SDCD_DEBOUNCE_TIME)
+ return -ENOMEDIUM;
+
+ val = mmc_getcd(host->mmc);
+ } while (!val);
+
+ am654_sdhci_init(plat);
+
+ return sdhci_probe(dev);
+}
+
+const struct sdhci_ops am654_sdhci_ops = {
+ .deferred_probe = am654_sdhci_deferred_probe,
+ .set_ios_post = &am654_sdhci_set_ios_post,
+ .set_control_reg = &am654_sdhci_set_control_reg,
+};
+
+const struct am654_driver_data am654_drv_data = {
+ .ops = &am654_sdhci_ops,
+ .flags = IOMUX_PRESENT | FREQSEL_2_BIT | DLL_PRESENT | STRBSEL_4_BIT,
+};
+
+const struct am654_driver_data j721e_8bit_drv_data = {
+ .ops = &am654_sdhci_ops,
+ .flags = DLL_PRESENT,
+};
+
+static int j721e_4bit_sdhci_set_ios_post(struct sdhci_host *host)
+{
+ struct udevice *dev = host->mmc->dev;
+ struct am654_sdhci_plat *plat = dev_get_platdata(dev);
+ u32 otap_del_sel, mask, val;
+
+ otap_del_sel = plat->otap_del_sel[host->mmc->selected_mode];
+ mask = OTAPDLYENA_MASK | OTAPDLYSEL_MASK;
+ val = (1 << OTAPDLYENA_SHIFT) | (otap_del_sel << OTAPDLYSEL_SHIFT);
+ regmap_update_bits(plat->base, PHY_CTRL4, mask, val);
+
+ return 0;
+}
+
+const struct sdhci_ops j721e_4bit_sdhci_ops = {
+ .deferred_probe = am654_sdhci_deferred_probe,
+ .set_ios_post = &j721e_4bit_sdhci_set_ios_post,
+};
+
+const struct am654_driver_data j721e_4bit_drv_data = {
+ .ops = &j721e_4bit_sdhci_ops,
+ .flags = IOMUX_PRESENT,
+};
+
static int sdhci_am654_get_otap_delay(struct udevice *dev,
struct mmc_config *cfg)
{
regmap_init_mem_index(dev_ofnode(dev), &plat->base, 1);
- am654_sdhci_init(plat);
-
- return sdhci_probe(dev);
+ return 0;
}
static int am654_sdhci_ofdata_to_platdata(struct udevice *dev)