powerpc/85xx: wait for alignment before resetting SERDES RX lanes (SERDES9)

The work-around for P4080 erratum SERDES9 says that the SERDES receiver
lanes should be reset after the XAUI starts tranmitting alignment signals.

Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

diff --git a/arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.c b/arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.c
index 07e58ed024a14bc41d5b11bcb36d497df761a2ff..89ed5b47fc9344bd5412a1e75036a8c1762e7c22 100644 (file)
--- a/arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.c
+++ b/arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.c
@@ -504,9 +504,6 @@ void fsl_serdes_init(void)
        const char *srds_lpd_arg;
        size_t arglen;
 #endif
-#ifdef CONFIG_SYS_P4080_ERRATUM_SERDES9
-       enum srds_prtcl device;
-#endif
 #ifdef CONFIG_SYS_P4080_ERRATUM_SERDES_A001
        int need_serdes_a001;   /* TRUE == need work-around for SERDES A001 */
 #endif
@@ -787,11 +784,4 @@ void fsl_serdes_init(void)
                             SRDS_RSTCTL_SDPD);
        }
 #endif
-
-#ifdef CONFIG_SYS_P4080_ERRATUM_SERDES9
-       for (device = XAUI_FM1; device <= XAUI_FM2; device++) {
-               if (is_serdes_configured(device))
-                       __serdes_reset_rx(srds_regs, cfg, device);
-       }
-#endif
 }

diff --git a/board/freescale/corenet_ds/eth_p4080.c b/board/freescale/corenet_ds/eth_p4080.c
index 00dfa9ac3918c6abe8f745bb36627c519bca16ce..7ff00d1460aa249b3784260ca5dd9b54d2eb4bc6 100644 (file)
--- a/board/freescale/corenet_ds/eth_p4080.c
+++ b/board/freescale/corenet_ds/eth_p4080.c
@@ -93,21 +93,43 @@ struct mii_dev *mii_dev_for_muxval(u32 muxval)
        return bus;
 }
 
-#ifdef CONFIG_SYS_P4080_ERRATUM_SERDES9
+#if defined(CONFIG_SYS_P4080_ERRATUM_SERDES9) && defined(CONFIG_PHY_TERANETICS)
 int board_phy_config(struct phy_device *phydev)
 {
-       /*
-        * If this is the 10G PHY, and we switched it to fiber,
-        * we need to reset the serdes link for SERDES9
-        */
-       if ((phydev->port == PORT_FIBRE) && (phydev->drv->uid == 0x00a19410)) {
+       if (phydev->drv->uid == PHY_UID_TN2020) {
+               unsigned long timeout = 1 * 1000; /* 1 seconds */
                enum srds_prtcl device;
 
+               /*
+                * Wait for the XAUI to come out of reset.  This is when it
+                * starts transmitting alignment signals.
+                */
+               while (--timeout) {
+                       int reg = phy_read(phydev, MDIO_MMD_PHYXS, MDIO_CTRL1);
+                       if (reg < 0) {
+                               printf("TN2020: Error reading from PHY at "
+                                      "address %u\n", phydev->addr);
+                               break;
+                       }
+                       /*
+                        * Note that we've never actually seen
+                        * MDIO_CTRL1_RESET set to 1.
+                        */
+                       if ((reg & MDIO_CTRL1_RESET) == 0)
+                               break;
+                       udelay(1000);
+               }
+
+               if (!timeout) {
+                       printf("TN2020: Timeout waiting for PHY at address %u "
+                              " to reset.\n", phydev->addr);
+               }
+
                switch (phydev->addr) {
-               case 4:
+               case CONFIG_SYS_FM1_10GEC1_PHY_ADDR:
                        device = XAUI_FM1;
                        break;
-               case 0:
+               case CONFIG_SYS_FM2_10GEC1_PHY_ADDR:
                        device = XAUI_FM2;
                        break;
                default:

diff --git a/drivers/net/phy/teranetics.c b/drivers/net/phy/teranetics.c
index 9d9397aadd45b51144422a56f1753986dfdf1e80..78447b711f5e51a8fca4f072d4622618ace28d41 100644 (file)
--- a/drivers/net/phy/teranetics.c
+++ b/drivers/net/phy/teranetics.c
@@ -95,7 +95,7 @@ int tn2020_startup(struct phy_device *phydev)
 
 struct phy_driver tn2020_driver = {
        .name = "Teranetics TN2020",
-       .uid = 0x00a19410,
+       .uid = PHY_UID_TN2020,
        .mask = 0xfffffff0,
        .features = PHY_10G_FEATURES,
        .mmds = (MDIO_DEVS_PMAPMD | MDIO_DEVS_PCS |

diff --git a/include/phy.h b/include/phy.h
index d5817bf19f4b460be173389114f5fe94d7a4882b..095f41c43b27cd4f376094530481023a6123be93 100644 (file)
--- a/include/phy.h
+++ b/include/phy.h
@@ -226,4 +226,8 @@ int phy_natsemi_init(void);
 int phy_realtek_init(void);
 int phy_teranetics_init(void);
 int phy_vitesse_init(void);
+
+/* PHY UIDs for various PHYs that are referenced in external code */
+#define PHY_UID_TN2020 0x00a19410
+
 #endif