If the specified delay is very short, the cycle counter may go past the
"end" time we are waiting for before we get around to reading it.
Fix it by checking the different between the cycle count "now" and the
cycle count at the beginning. This will work as long as the delay
measured in number of cycles is below 2^31.
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
*/
void udelay(unsigned long usec)
{
- unsigned long now, end;
+ unsigned long cycles;
+ unsigned long base;
+ unsigned long now;
- now = sysreg_read(COUNT);
+ base = sysreg_read(COUNT);
+ cycles = ((usec * (get_tbclk() / 10000)) + 50) / 100;
- end = ((usec * (get_tbclk() / 10000)) + 50) / 100;
- end += now;
-
- while (now > end)
- now = sysreg_read(COUNT);
-
- while (now < end)
+ do {
now = sysreg_read(COUNT);
+ } while ((now - base) < cycles);
}
static int set_interrupt_handler(unsigned int nr, void (*handler)(void),