ARM: DRA7: Update DDR IO configuration

DDRIO_2 and LPDDR2CH1_1 registers are not present
for DRA7. So not configuring these registers for DRA7xx

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>

diff --git a/arch/arm/cpu/armv7/omap5/hwinit.c b/arch/arm/cpu/armv7/omap5/hwinit.c
index 8d6b59eeb04406bc3bf23c4714d41bde89585dce..03c2b978560aeb6c177b1f6fbcc9213868803e08 100644 (file)
--- a/arch/arm/cpu/armv7/omap5/hwinit.c
+++ b/arch/arm/cpu/armv7/omap5/hwinit.c
@@ -75,16 +75,20 @@ static void io_settings_ddr3(void)
 
        writel(ioregs->ctrl_ddrio_0, (*ctrl)->control_ddrio_0);
        writel(ioregs->ctrl_ddrio_1, (*ctrl)->control_ddrio_1);
-       writel(ioregs->ctrl_ddrio_2, (*ctrl)->control_ddrio_2);
+
+       if (!is_dra7xx()) {
+               writel(ioregs->ctrl_ddrio_2, (*ctrl)->control_ddrio_2);
+               writel(ioregs->ctrl_lpddr2ch, (*ctrl)->control_lpddr2ch1_1);
+       }
 
        /* omap5432 does not use lpddr2 */
        writel(ioregs->ctrl_lpddr2ch, (*ctrl)->control_lpddr2ch1_0);
-       writel(ioregs->ctrl_lpddr2ch, (*ctrl)->control_lpddr2ch1_1);
 
        writel(ioregs->ctrl_emif_sdram_config_ext,
               (*ctrl)->control_emif1_sdram_config_ext);
-       writel(ioregs->ctrl_emif_sdram_config_ext,
-              (*ctrl)->control_emif2_sdram_config_ext);
+       if (!is_dra72x())
+               writel(ioregs->ctrl_emif_sdram_config_ext,
+                      (*ctrl)->control_emif2_sdram_config_ext);
 
        if (is_omap54xx()) {
                /* Disable DLL select */