Add some comments to clocks in atstk1002.h
authorEirik Aanonsen <eaa@wprmedical.com>
Wed, 12 Sep 2007 11:32:37 +0000 (13:32 +0200)
committerHaavard Skinnemoen <hskinnemoen@atmel.com>
Tue, 18 Sep 2007 07:50:58 +0000 (09:50 +0200)
This patch applies some clarifying comments to how the different
clocks are setup according to atstk1002.h Some of the previous
comments where stating wrongful information.

Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
include/configs/atstk1002.h

index f7bf62c825f518b2b0a24e1e43db89eeb2342605..7533b0ef9c1d924acb8a4697c09986d2068a52fa 100644 (file)
 #define CFG_HZ                         1000
 
 /*
- * Set up the PLL to run at 199.5 MHz, the CPU to run at 1/2 the PLL
- * frequency and the peripherals to run at 1/4 the PLL frequency.
+ * Set up the PLL to run at 140 MHz, the CPU to run at the PLL
+ * frequency, the HSB and PBB at 1/2, and the PBA to run at 1/4 the
+ * PLL frequency.
+ * (CFG_OSC0_HZ * CFG_PLL0_MUL) / CFG_PLL0_DIV = PLL MHz
  */
 #define CONFIG_PLL                     1
 #define CFG_POWER_MANAGER              1
 #define CFG_PLL0_DIV                   1
 #define CFG_PLL0_MUL                   7
 #define CFG_PLL0_SUPPRESS_CYCLES       16
+/*
+ * Set the CPU running at:
+ * PLL / (2^CFG_CLKDIV_CPU) = CPU MHz
+ */
 #define CFG_CLKDIV_CPU                 0
+/*
+ * Set the HSB running at:
+ * PLL / (2^CFG_CLKDIV_HSB) = HSB MHz
+ */
 #define CFG_CLKDIV_HSB                 1
+/*
+ * Set the PBA running at:
+ * PLL / (2^CFG_CLKDIV_PBA) = PBA MHz
+ */
 #define CFG_CLKDIV_PBA                 2
+/*
+ * Set the PBB running at:
+ * PLL / (2^CFG_CLKDIV_PBB) = PBB MHz
+ */
 #define CFG_CLKDIV_PBB                 1
 
 /*