Revert "arm: socfpga: set the fpga global bit to disable HPS to FPGA signals"

Apparently, the logic for the FPGA global bit is not universal between Gen5
and Gen10 devices is not the same. Disabling this bit, while applicable to
Gen10 devices, will break FPGA programming on Gen5 devices.

Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>

diff --git a/drivers/fpga/socfpga.c b/drivers/fpga/socfpga.c
index 431e159e48c0ba37443057ef4ca68429fb6128d8..4448250f5c64a0b1a1605a3d5dbf581891e05a0b 100644 (file)
--- a/drivers/fpga/socfpga.c
+++ b/drivers/fpga/socfpga.c
@@ -269,7 +269,7 @@ int socfpga_load(Altera_desc *desc, const void *rbf_data, size_t rbf_size)
        /* Prior programming the FPGA, all bridges need to be shut off */
 
        /* Disable all signals from hps peripheral controller to fpga */
-       writel(0, &sysmgr_regs->fpgaintfgrp_gbl);
+       writel(0, &sysmgr_regs->fpgaintfgrp_module);
 
        /* Disable all signals from FPGA to HPS SDRAM */
 #define SDR_CTRLGRP_FPGAPORTRST_ADDRESS        0x5080