arm:exynos4:pinmux: Modify the gpio function for mmc
authorPiotr Wilczek <p.wilczek@samsung.com>
Thu, 20 Sep 2012 00:19:57 +0000 (00:19 +0000)
committerMinkyu Kang <mk7.kang@samsung.com>
Thu, 15 Nov 2012 12:08:18 +0000 (21:08 +0900)
This patch add pinmux settings for Exynos4 for mmc0 and mmc2

Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
arch/arm/cpu/armv7/exynos/pinmux.c
arch/arm/include/asm/arch-exynos/periph.h

index 7776add9db3de7fb3212c43e959d6603534c1c2d..5796d5697290efe8bc2ba96325d15888310c8f0b 100644 (file)
@@ -265,10 +265,68 @@ static int exynos5_pinmux_config(int peripheral, int flags)
        return 0;
 }
 
+static int exynos4_mmc_config(int peripheral, int flags)
+{
+       struct exynos4_gpio_part2 *gpio2 =
+               (struct exynos4_gpio_part2 *)samsung_get_base_gpio_part2();
+       struct s5p_gpio_bank *bank, *bank_ext;
+       int i;
+
+       switch (peripheral) {
+       case PERIPH_ID_SDMMC0:
+               bank = &gpio2->k0;
+               bank_ext = &gpio2->k1;
+               break;
+       case PERIPH_ID_SDMMC2:
+               bank = &gpio2->k2;
+               bank_ext = &gpio2->k3;
+               break;
+       default:
+               return -1;
+       }
+       for (i = 0; i < 7; i++) {
+               if (i == 2)
+                       continue;
+               s5p_gpio_cfg_pin(bank, i,  GPIO_FUNC(0x2));
+               s5p_gpio_set_pull(bank, i, GPIO_PULL_NONE);
+               s5p_gpio_set_drv(bank, i, GPIO_DRV_4X);
+       }
+       if (flags & PINMUX_FLAG_8BIT_MODE) {
+               for (i = 3; i < 7; i++) {
+                       s5p_gpio_cfg_pin(bank_ext, i,  GPIO_FUNC(0x3));
+                       s5p_gpio_set_pull(bank_ext, i, GPIO_PULL_NONE);
+                       s5p_gpio_set_drv(bank_ext, i, GPIO_DRV_4X);
+               }
+       }
+
+       return 0;
+}
+
+static int exynos4_pinmux_config(int peripheral, int flags)
+{
+       switch (peripheral) {
+       case PERIPH_ID_SDMMC0:
+       case PERIPH_ID_SDMMC2:
+               return exynos4_mmc_config(peripheral, flags);
+       case PERIPH_ID_SDMMC1:
+       case PERIPH_ID_SDMMC3:
+       case PERIPH_ID_SDMMC4:
+               printf("SDMMC device %d not implemented\n", peripheral);
+               return -1;
+       default:
+               debug("%s: invalid peripheral %d", __func__, peripheral);
+               return -1;
+       }
+
+       return 0;
+}
+
 int exynos_pinmux_config(int peripheral, int flags)
 {
        if (cpu_is_exynos5())
                return exynos5_pinmux_config(peripheral, flags);
+       else if (cpu_is_exynos4())
+               return exynos4_pinmux_config(peripheral, flags);
        else {
                debug("pinmux functionality not supported\n");
                return -1;
index b861d7d58425060a3a90d545e42efaa27f82177d..082611c6a9447ac261530b3fd2d137fd6291ab49 100644 (file)
@@ -42,6 +42,7 @@ enum periph_id {
        PERIPH_ID_SDMMC1,
        PERIPH_ID_SDMMC2,
        PERIPH_ID_SDMMC3,
+       PERIPH_ID_SDMMC4,
        PERIPH_ID_SROMC,
        PERIPH_ID_UART0,
        PERIPH_ID_UART1,