video: omap: use BIT() and GENMASK() macros

Use the standard BIT() and GENMASK() macros for bitfield definitions.

Signed-off-by: Dario Binacchi <dariobin@libero.it>

diff --git a/drivers/video/am335x-fb.c b/drivers/video/am335x-fb.c
index 51c1af587f27b6b41f58584f83c4541d5f8b1187..7065d57148588e56fcee36f1846c48c152b95d6c 100644 (file)
--- a/drivers/video/am335x-fb.c
+++ b/drivers/video/am335x-fb.c
@@ -27,11 +27,11 @@
 
 /* LCD Control Register */
 #define LCD_CLK_DIVISOR(x)                     ((x) << 8)
-#define LCD_RASTER_MODE                                0x01
+#define LCD_RASTER_MODE                                BIT(0)
 /* LCD Clock Enable Register */
-#define LCD_CORECLKEN                          (0x01 << 0)
-#define LCD_LIDDCLKEN                          (0x01 << 1)
-#define LCD_DMACLKEN                           (0x01 << 2)
+#define LCD_CORECLKEN                          BIT(0)
+#define LCD_LIDDCLKEN                          BIT(1)
+#define LCD_DMACLKEN                           BIT(2)
 /* LCD DMA Control Register */
 #define LCD_DMA_BURST_SIZE(x)                  ((x) << 4)
 #define LCD_DMA_BURST_1                                0x0
@@ -40,28 +40,28 @@
 #define LCD_DMA_BURST_8                                0x3
 #define LCD_DMA_BURST_16                       0x4
 /* LCD Timing_0 Register */
-#define LCD_HBPLSB(x)                          ((((x)-1) & 0xFF) << 24)
-#define LCD_HFPLSB(x)                          ((((x)-1) & 0xFF) << 16)
-#define LCD_HSWLSB(x)                          ((((x)-1) & 0x3F) << 10)
-#define LCD_HORLSB(x)                          (((((x) >> 4)-1) & 0x3F) << 4)
+#define LCD_HBPLSB(x)                  ((((x) - 1) & GENMASK(7, 0)) << 24)
+#define LCD_HFPLSB(x)                  ((((x) - 1) & GENMASK(7, 0)) << 16)
+#define LCD_HSWLSB(x)                  ((((x) - 1) & GENMASK(5, 0)) << 10)
+#define LCD_HORLSB(x)          (((((x) >> 4) - 1) & GENMASK(5, 0)) << 4)
 #define LCD_HORMSB(x)                          (((((x) >> 4)-1) & 0x40) >> 4)
 /* LCD Timing_1 Register */
 #define LCD_VBP(x)                             ((x) << 24)
 #define LCD_VFP(x)                             ((x) << 16)
 #define LCD_VSW(x)                             (((x)-1) << 10)
-#define LCD_VERLSB(x)                          (((x)-1) & 0x3FF)
+#define LCD_VERLSB(x)                          (((x) - 1) & GENMASK(9, 0))
 /* LCD Timing_2 Register */
-#define LCD_HSWMSB(x)                          ((((x)-1) & 0x3C0) << 21)
-#define LCD_VERMSB(x)                          ((((x)-1) & 0x400) << 16)
-#define LCD_HBPMSB(x)                          ((((x)-1) & 0x300) >> 4)
-#define LCD_HFPMSB(x)                          ((((x)-1) & 0x300) >> 8)
-#define LCD_INVMASK(x)                         ((x) & 0x3F00000)
+#define LCD_HSWMSB(x)                  ((((x) - 1) & GENMASK(9, 6)) << 21)
+#define LCD_VERMSB(x)                          ((((x) - 1) & BIT(10)) << 16)
+#define LCD_HBPMSB(x)                  ((((x) - 1) & GENMASK(9, 8)) >> 4)
+#define LCD_HFPMSB(x)                  ((((x) - 1) & GENMASK(9, 8)) >> 8)
+#define LCD_INVMASK(x)                         ((x) & GENMASK(25, 20))
 /* LCD Raster Ctrl Register */
-#define LCD_TFT_24BPP_MODE                     (1 << 25)
-#define LCD_TFT_24BPP_UNPACK                   (1 << 26)
+#define LCD_TFT_24BPP_MODE                     BIT(25)
+#define LCD_TFT_24BPP_UNPACK                   BIT(26)
 #define LCD_PALMODE_RAWDATA                    (0x02 << 20)
-#define LCD_TFT_MODE                           (0x01 << 7)
-#define LCD_RASTER_ENABLE                      (0x01 << 0)
+#define LCD_TFT_MODE                           BIT(7)
+#define LCD_RASTER_ENABLE                      BIT(0)
 
 
 /* Macro definitions */

diff --git a/drivers/video/am335x-fb.h b/drivers/video/am335x-fb.h
index f5883c02ddd317d2917b44281ccf4830b2432803..ad9b015e090f7855d0f5b50ae42f76d37c9eb667 100644 (file)
--- a/drivers/video/am335x-fb.h
+++ b/drivers/video/am335x-fb.h
@@ -7,7 +7,7 @@
 #ifndef AM335X_FB_H
 #define AM335X_FB_H
 
-#define HSVS_CONTROL   (0x01 << 25)    /*
+#define HSVS_CONTROL           BIT(25) /*
                                         * 0 = lcd_lp and lcd_fp are driven on
                                         * opposite edges of pixel clock than
                                         * the lcd_pixel_o
@@ -17,7 +17,7 @@
                                         * Matrix displays the edge timing is
                                         * fixed
                                         */
-#define HSVS_RISEFALL  (0x01 << 24)    /*
+#define HSVS_RISEFALL          BIT(24) /*
                                         * 0 = lcd_lp and lcd_fp are driven on
                                         * the rising edge of pixel clock (bit
                                         * 25 must be set to 1)
@@ -25,19 +25,19 @@
                                         * the falling edge of pixel clock (bit
                                         * 25 must be set to 1)
                                         */
-#define DE_INVERT      (0x01 << 23)    /*
+#define DE_INVERT              BIT(23) /*
                                         * 0 = DE is low-active
                                         * 1 = DE is high-active
                                         */
-#define PXCLK_INVERT   (0x01 << 22)    /*
+#define PXCLK_INVERT           BIT(22) /*
                                         * 0 = pix-clk is high-active
                                         * 1 = pic-clk is low-active
                                         */
-#define HSYNC_INVERT   (0x01 << 21)    /*
+#define HSYNC_INVERT           BIT(21) /*
                                         * 0 = HSYNC is active high
                                         * 1 = HSYNC is avtive low
                                         */
-#define VSYNC_INVERT   (0x01 << 20)    /*
+#define VSYNC_INVERT           BIT(20) /*
                                         * 0 = VSYNC is active high
                                         * 1 = VSYNC is active low
                                         */