lpuart_read32(plat->flags, &base->data, &val);
- if (plat->devtype & DEV_MX7ULP) {
- lpuart_read32(plat->flags, &base->stat, &stat);
- if (stat & STAT_OR)
- lpuart_write32(plat->flags, &base->stat, STAT_OR);
- }
+ lpuart_read32(plat->flags, &base->stat, &stat);
+ if (stat & STAT_OR)
+ lpuart_write32(plat->flags, &base->stat, STAT_OR);
return val & 0x3ff;
}
struct lpuart_fsl_reg32 *base = plat->reg;
u32 stat;
- if (plat->devtype & DEV_MX7ULP) {
- if (c == '\n')
- serial_putc('\r');
- }
+ if (c == '\n')
+ serial_putc('\r');
while (true) {
lpuart_read32(plat->flags, &base->stat, &stat);
lpuart_write32(plat->flags, &base->match, 0);
- if (plat->devtype & DEV_MX7ULP) {
+ if (plat->devtype == DEV_MX7ULP) {
_lpuart32_serial_setbrg_7ulp(plat, gd->baudrate);
} else {
/* provide data bits, parity, stop bit, etc */
struct lpuart_serial_platdata *plat = dev->platdata;
if (is_lpuart32(dev)) {
- if (plat->devtype & DEV_MX7ULP)
+ if (plat->devtype == DEV_MX7ULP)
_lpuart32_serial_setbrg_7ulp(plat, baudrate);
else
_lpuart32_serial_setbrg(plat, baudrate);