exynos5250: Add arndale board support

Arndale board is based on samsung's exynos5250 soc.

Signed-off-by: Inderpal Singh <inderpal.singh@linaro.org>
Signed-off-by: Chander Kashyap <chander.kashyap@linaro.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>

diff --git a/MAINTAINERS b/MAINTAINERS
index 23965a8d3359f7325cc449b23e21f527222f0446..9700ec9e8043c5d1d40e592150379face78c3034 100644 (file)
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -465,6 +465,10 @@ Andre Schwarz <andre.schwarz@matrix-vision.de>
        mvblm7          MPC8343
        mvsmr           MPC5200
 
+Inderpal Singh <inderpal.singh@linaro.org>
+
+       Arndale         ARM ARMV7 (EXYNOS5250 SoC)
+
 Jon Smirl <jonsmirl@gmail.com>
 
        pcm030          MPC5200

diff --git a/board/samsung/arndale/Makefile b/board/samsung/arndale/Makefile
new file mode 100644 (file)
index 0000000..afd8db3
--- /dev/null
+++ b/board/samsung/arndale/Makefile
@@ -0,0 +1,34 @@
+#
+# Copyright (C) 2013 Samsung Electronics
+#
+# SPDX-License-Identifier:     GPL-2.0+
+#
+
+include $(TOPDIR)/config.mk
+
+LIB    = $(obj)lib$(BOARD).o
+
+COBJS  += arndale_spl.o
+
+ifndef CONFIG_SPL_BUILD
+COBJS  += arndale.o
+endif
+
+SRCS   := $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS   := $(addprefix $(obj),$(COBJS) $(SOBJS))
+
+ALL    :=       $(obj).depend $(LIB)
+
+all:   $(ALL)
+
+$(LIB):        $(OBJS)
+       $(call cmd_link_o_target, $(OBJS))
+
+#########################################################################
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################

diff --git a/board/samsung/arndale/arndale.c b/board/samsung/arndale/arndale.c
new file mode 100644 (file)
index 0000000..84d8f19
--- /dev/null
+++ b/board/samsung/arndale/arndale.c
@@ -0,0 +1,87 @@
+/*
+ * Copyright (C) 2013 Samsung Electronics
+ *
+ * SPDX-License-Identifier:    GPL-2.0+
+ */
+
+#include <common.h>
+#include <asm/arch/pinmux.h>
+#include <asm/arch/power.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int board_init(void)
+{
+       gd->bd->bi_boot_params = (PHYS_SDRAM_1 + 0x100UL);
+       return 0;
+}
+
+int dram_init(void)
+{
+       int i;
+       u32 addr;
+
+       for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
+               addr = CONFIG_SYS_SDRAM_BASE + (i * SDRAM_BANK_SIZE);
+               gd->ram_size += get_ram_size((long *)addr, SDRAM_BANK_SIZE);
+       }
+       return 0;
+}
+
+int power_init_board(void)
+{
+       set_ps_hold_ctrl();
+       return 0;
+}
+
+void dram_init_banksize(void)
+{
+       int i;
+       u32 addr, size;
+
+       for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
+               addr = CONFIG_SYS_SDRAM_BASE + (i * SDRAM_BANK_SIZE);
+               size = get_ram_size((long *)addr, SDRAM_BANK_SIZE);
+
+               gd->bd->bi_dram[i].start = addr;
+               gd->bd->bi_dram[i].size = size;
+       }
+}
+
+static int board_uart_init(void)
+{
+       int err = 0, uart_id;
+
+       for (uart_id = PERIPH_ID_UART0; uart_id <= PERIPH_ID_UART3; uart_id++) {
+               err = exynos_pinmux_config(uart_id, PINMUX_FLAG_NONE);
+               if (err) {
+                       debug("UART%d not configured\n",
+                             (uart_id - PERIPH_ID_UART0));
+                       return err;
+               }
+       }
+       return err;
+}
+
+#ifdef CONFIG_BOARD_EARLY_INIT_F
+int board_early_init_f(void)
+{
+       int err;
+
+       err = board_uart_init();
+       if (err) {
+               debug("UART init failed\n");
+               return err;
+       }
+       return err;
+}
+#endif
+
+#ifdef CONFIG_DISPLAY_BOARDINFO
+int checkboard(void)
+{
+       printf("\nBoard: Arndale\n");
+
+       return 0;
+}
+#endif

diff --git a/board/samsung/arndale/arndale_spl.c b/board/samsung/arndale/arndale_spl.c
new file mode 100644 (file)
index 0000000..2949c08
--- /dev/null
+++ b/board/samsung/arndale/arndale_spl.c
@@ -0,0 +1,50 @@
+/*
+ * Copyright (c) 2012 The Chromium OS Authors.
+ *
+ * SPDX-License-Identifier:    GPL-2.0+
+ */
+
+#include <common.h>
+#include <asm/arch/spl.h>
+
+#define SIGNATURE      0xdeadbeef
+
+/* Parameters of early board initialization in SPL */
+static struct spl_machine_param machine_param
+               __attribute__((section(".machine_param"))) = {
+       .signature      = SIGNATURE,
+       .version        = 1,
+       .params         = "vmubfasirM",
+       .size           = sizeof(machine_param),
+
+       .mem_iv_size    = 0x1f,
+       .mem_type       = DDR_MODE_DDR3,
+
+       /*
+        * Set uboot_size to 0x100000 bytes.
+        *
+        * This is an overly conservative value chosen to accommodate all
+        * possible U-Boot image.  You are advised to set this value to a
+        * smaller realistic size via scripts that modifies the .machine_param
+        * section of output U-Boot image.
+        */
+       .uboot_size     = 0x100000,
+
+       .boot_source    = BOOT_MODE_OM,
+       .frequency_mhz  = 800,
+       .arm_freq_mhz   = 1000,
+       .serial_base    = 0x12c30000,
+       .i2c_base       = 0x12c60000,
+       .mem_manuf      = MEM_MANUF_SAMSUNG,
+};
+
+struct spl_machine_param *spl_get_machine_params(void)
+{
+       if (machine_param.signature != SIGNATURE) {
+               /* Will hang if SIGNATURE dont match */
+               while (1)
+                       ;
+       }
+
+       return &machine_param;
+}

diff --git a/board/samsung/dts/exynos5250-arndale.dts b/board/samsung/dts/exynos5250-arndale.dts
new file mode 100644 (file)
index 0000000..d3c0527
--- /dev/null
+++ b/board/samsung/dts/exynos5250-arndale.dts
@@ -0,0 +1,21 @@
+/*
+ * SAMSUNG Arndale board device tree source
+ *
+ * Copyright (c) 2013 Samsung Electronics Co., Ltd.
+ *             http://www.samsung.com
+ *
+ * SPDX-License-Identifier:    GPL-2.0+
+*/
+
+/dts-v1/;
+/include/ ARCH_CPU_DTS
+
+/ {
+       model = "SAMSUNG Arndale board based on EXYNOS5250";
+       compatible = "samsung,arndale", "samsung,exynos5250";
+
+       aliases {
+               serial0 = "/serial@12C20000";
+               console = "/serial@12C20000";
+       };
+};

diff --git a/boards.cfg b/boards.cfg
index d7c8d341b84ed0a8d1e5ffa8db37cc1d9419c895..598561be2921be18ff95fd5b9a0f89a9c8ae51d2 100644 (file)
--- a/boards.cfg
+++ b/boards.cfg
@@ -323,6 +323,7 @@ omap5_uevm                   arm         armv7       omap5_uevm          ti         oma
 dra7xx_evm                  arm         armv7       dra7xx              ti             omap5
 s5p_goni                     arm         armv7       goni                samsung        s5pc1xx
 smdkc100                     arm         armv7       smdkc100            samsung        s5pc1xx
+arndale                             arm         armv7       arndale             samsung        exynos
 origen                      arm         armv7       origen              samsung        exynos
 s5pc210_universal            arm         armv7       universal_c210      samsung        exynos
 snow                        arm         armv7       smdk5250            samsung        exynos

diff --git a/include/configs/arndale.h b/include/configs/arndale.h
new file mode 100644 (file)
index 0000000..ed44a04
--- /dev/null
+++ b/include/configs/arndale.h
@@ -0,0 +1,255 @@
+/*
+ * Copyright (C) 2013 Samsung Electronics
+ *
+ * SPDX-License-Identifier:    GPL-2.0+
+ *
+ * Configuration settings for the SAMSUNG Arndale board.
+ */
+
+#ifndef __CONFIG_ARNDALE_H
+#define __CONFIG_ARNDALE_H
+
+/* High Level Configuration Options */
+#define CONFIG_SAMSUNG                 /* in a SAMSUNG core */
+#define CONFIG_S5P                     /* S5P Family */
+#define CONFIG_EXYNOS5                 /* which is in a Exynos5 Family */
+#define CONFIG_EXYNOS5250
+
+#include <asm/arch/cpu.h>              /* get chip and board defs */
+
+#define CONFIG_SYS_GENERIC_BOARD
+#define CONFIG_ARCH_CPU_INIT
+#define CONFIG_DISPLAY_CPUINFO
+#define CONFIG_DISPLAY_BOARDINFO
+
+/* Enable fdt support for Exynos5250 */
+#define CONFIG_ARCH_DEVICE_TREE                exynos5250
+#define CONFIG_OF_CONTROL
+#define CONFIG_OF_SEPARATE
+
+/* Allow tracing to be enabled */
+#define CONFIG_TRACE
+#define CONFIG_CMD_TRACE
+#define CONFIG_TRACE_BUFFER_SIZE       (16 << 20)
+#define CONFIG_TRACE_EARLY_SIZE                (8 << 20)
+#define CONFIG_TRACE_EARLY
+#define CONFIG_TRACE_EARLY_ADDR                0x50000000
+
+/* Keep L2 Cache Disabled */
+#define CONFIG_SYS_DCACHE_OFF
+
+#define CONFIG_SYS_SDRAM_BASE          0x40000000
+#define CONFIG_SYS_TEXT_BASE           0x43E00000
+
+/* input clock of PLL: SMDK5250 has 24MHz input clock */
+#define CONFIG_SYS_CLK_FREQ            24000000
+
+#define CONFIG_SETUP_MEMORY_TAGS
+#define CONFIG_CMDLINE_TAG
+#define CONFIG_INITRD_TAG
+#define CONFIG_CMDLINE_EDITING
+
+/* Power Down Modes */
+#define S5P_CHECK_SLEEP                        0x00000BAD
+#define S5P_CHECK_DIDLE                        0xBAD00000
+#define S5P_CHECK_LPA                  0xABAD0000
+
+/* Offset for inform registers */
+#define INFORM0_OFFSET                 0x800
+#define INFORM1_OFFSET                 0x804
+
+/* Size of malloc() pool */
+#define CONFIG_SYS_MALLOC_LEN          (CONFIG_ENV_SIZE + (4 << 20))
+
+/* select serial console configuration */
+#define CONFIG_BAUDRATE                        115200
+#define EXYNOS5_DEFAULT_UART_OFFSET    0x010000
+#define CONFIG_SILENT_CONSOLE
+
+/* Console configuration */
+#define CONFIG_CONSOLE_MUX
+#define CONFIG_SYS_CONSOLE_IS_IN_ENV
+#define EXYNOS_DEVICE_SETTINGS \
+               "stdin=serial\0" \
+               "stdout=serial\0" \
+               "stderr=serial\0"
+
+#define CONFIG_EXTRA_ENV_SETTINGS \
+       EXYNOS_DEVICE_SETTINGS
+
+/* SD/MMC configuration */
+#define CONFIG_GENERIC_MMC
+#define CONFIG_MMC
+#define CONFIG_SDHCI
+#define CONFIG_S5P_SDHCI
+#define CONFIG_DWMMC
+#define CONFIG_EXYNOS_DWMMC
+#define CONFIG_SUPPORT_EMMC_BOOT
+
+
+#define CONFIG_BOARD_EARLY_INIT_F
+#define CONFIG_SKIP_LOWLEVEL_INIT
+
+/* PWM */
+#define CONFIG_PWM
+
+/* allow to overwrite serial and ethaddr */
+#define CONFIG_ENV_OVERWRITE
+
+/* Command definition*/
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_ELF
+#define CONFIG_CMD_MMC
+#define CONFIG_CMD_EXT2
+#define CONFIG_CMD_FAT
+#define CONFIG_CMD_NET
+#define CONFIG_CMD_HASH
+
+#define CONFIG_BOOTDELAY               3
+#define CONFIG_ZERO_BOOTDELAY_CHECK
+
+/* USB */
+#define CONFIG_CMD_USB
+#define CONFIG_USB_EHCI
+#define CONFIG_USB_EHCI_EXYNOS
+#define CONFIG_USB_STORAGE
+
+/* MMC SPL */
+#define CONFIG_SPL
+#define COPY_BL2_FNPTR_ADDR    0x02020030
+
+#define CONFIG_SPL_LIBCOMMON_SUPPORT
+
+/* specific .lds file */
+#define CONFIG_SPL_LDSCRIPT    "board/samsung/common/exynos-uboot-spl.lds"
+#define CONFIG_SPL_TEXT_BASE   0x02023400
+#define CONFIG_SPL_MAX_FOOTPRINT       (14 * 1024)
+
+#define CONFIG_BOOTCOMMAND     "mmc read 40007000 451 2000; bootm 40007000"
+
+/* Miscellaneous configurable options */
+#define CONFIG_SYS_LONGHELP            /* undef to save memory */
+#define CONFIG_SYS_HUSH_PARSER         /* use "hush" command parser    */
+#define CONFIG_SYS_PROMPT              "ARNDALE # "
+#define CONFIG_SYS_CBSIZE              256     /* Console I/O Buffer Size */
+#define CONFIG_SYS_PBSIZE              384     /* Print Buffer Size */
+#define CONFIG_SYS_MAXARGS             16      /* max number of command args */
+#define CONFIG_DEFAULT_CONSOLE         "console=ttySAC2,115200n8\0"
+/* Boot Argument Buffer Size */
+#define CONFIG_SYS_BARGSIZE            CONFIG_SYS_CBSIZE
+/* memtest works on */
+#define CONFIG_SYS_MEMTEST_START       CONFIG_SYS_SDRAM_BASE
+#define CONFIG_SYS_MEMTEST_END         (CONFIG_SYS_SDRAM_BASE + 0x5E00000)
+#define CONFIG_SYS_LOAD_ADDR           (CONFIG_SYS_SDRAM_BASE + 0x3E00000)
+
+#define CONFIG_SYS_HZ                  1000
+
+#define CONFIG_RD_LVL
+
+#define CONFIG_NR_DRAM_BANKS   8
+#define SDRAM_BANK_SIZE                (256UL << 20UL) /* 256 MB */
+#define PHYS_SDRAM_1           CONFIG_SYS_SDRAM_BASE
+#define PHYS_SDRAM_1_SIZE      SDRAM_BANK_SIZE
+#define PHYS_SDRAM_2           (CONFIG_SYS_SDRAM_BASE + SDRAM_BANK_SIZE)
+#define PHYS_SDRAM_2_SIZE      SDRAM_BANK_SIZE
+#define PHYS_SDRAM_3           (CONFIG_SYS_SDRAM_BASE + (2 * SDRAM_BANK_SIZE))
+#define PHYS_SDRAM_3_SIZE      SDRAM_BANK_SIZE
+#define PHYS_SDRAM_4           (CONFIG_SYS_SDRAM_BASE + (3 * SDRAM_BANK_SIZE))
+#define PHYS_SDRAM_4_SIZE      SDRAM_BANK_SIZE
+#define PHYS_SDRAM_5           (CONFIG_SYS_SDRAM_BASE + (4 * SDRAM_BANK_SIZE))
+#define PHYS_SDRAM_5_SIZE      SDRAM_BANK_SIZE
+#define PHYS_SDRAM_6           (CONFIG_SYS_SDRAM_BASE + (5 * SDRAM_BANK_SIZE))
+#define PHYS_SDRAM_6_SIZE      SDRAM_BANK_SIZE
+#define PHYS_SDRAM_7           (CONFIG_SYS_SDRAM_BASE + (6 * SDRAM_BANK_SIZE))
+#define PHYS_SDRAM_7_SIZE      SDRAM_BANK_SIZE
+#define PHYS_SDRAM_8           (CONFIG_SYS_SDRAM_BASE + (7 * SDRAM_BANK_SIZE))
+#define PHYS_SDRAM_8_SIZE      SDRAM_BANK_SIZE
+
+#define CONFIG_SYS_MONITOR_BASE        0x00000000
+
+/* FLASH and environment organization */
+#define CONFIG_SYS_NO_FLASH
+#undef CONFIG_CMD_IMLS
+#define CONFIG_IDENT_STRING            " for ARNDALE"
+
+#define CONFIG_SYS_MMC_ENV_DEV         0
+
+#define CONFIG_ENV_IS_IN_MMC
+#define CONFIG_SECURE_BL1_ONLY
+
+/* Secure FW size configuration */
+#ifdef CONFIG_SECURE_BL1_ONLY
+#define        CONFIG_SEC_FW_SIZE              (8 << 10)       /* 8KB */
+#else
+#define        CONFIG_SEC_FW_SIZE              0
+#endif
+
+/* Configuration of BL1, BL2, ENV Blocks on mmc */
+#define CONFIG_RES_BLOCK_SIZE  (512)
+#define CONFIG_BL1_SIZE                (16 << 10) /*16 K reserved for BL1*/
+#define        CONFIG_BL2_SIZE         (512UL << 10UL) /* 512 KB */
+#define CONFIG_ENV_SIZE                (16 << 10)      /* 16 KB */
+
+#define CONFIG_BL1_OFFSET      (CONFIG_RES_BLOCK_SIZE + CONFIG_SEC_FW_SIZE)
+#define CONFIG_BL2_OFFSET      (CONFIG_BL1_OFFSET + CONFIG_BL1_SIZE)
+#define CONFIG_ENV_OFFSET      (CONFIG_BL2_OFFSET + CONFIG_BL2_SIZE)
+
+/* U-boot copy size from boot Media to DRAM.*/
+#define BL2_START_OFFSET       (CONFIG_BL2_OFFSET/512)
+#define BL2_SIZE_BLOC_COUNT    (CONFIG_BL2_SIZE/512)
+
+#define CONFIG_SPI_BOOTING
+#define EXYNOS_COPY_SPI_FNPTR_ADDR     0x02020058
+#define SPI_FLASH_UBOOT_POS            (CONFIG_SEC_FW_SIZE + CONFIG_BL1_SIZE)
+
+#define CONFIG_DOS_PARTITION
+#define CONFIG_EFI_PARTITION
+#define CONFIG_CMD_PART
+#define CONFIG_PARTITION_UUIDS
+
+
+#define CONFIG_IRAM_STACK      0x02050000
+
+#define CONFIG_SYS_INIT_SP_ADDR        CONFIG_IRAM_STACK
+
+/* I2C */
+#define CONFIG_SYS_I2C_INIT_BOARD
+#define CONFIG_HARD_I2C
+#define CONFIG_CMD_I2C
+#define CONFIG_SYS_I2C_SPEED   100000          /* 100 Kbps */
+#define CONFIG_DRIVER_S3C24X0_I2C
+#define CONFIG_I2C_MULTI_BUS
+#define CONFIG_MAX_I2C_NUM     8
+#define CONFIG_SYS_I2C_SLAVE    0x0
+#define CONFIG_I2C_EDID
+
+/* PMIC */
+#define CONFIG_PMIC
+#define CONFIG_PMIC_I2C
+#define CONFIG_PMIC_MAX77686
+
+#define CONFIG_DEFAULT_DEVICE_TREE     exynos5250-arndale
+
+/* Ethernet Controllor Driver */
+#ifdef CONFIG_CMD_NET
+#define CONFIG_SMC911X
+#define CONFIG_SMC911X_BASE            0x5000000
+#define CONFIG_SMC911X_16_BIT
+#define CONFIG_ENV_SROM_BANK           1
+#endif /*CONFIG_CMD_NET*/
+
+/* Enable PXE Support */
+#ifdef CONFIG_CMD_NET
+#define CONFIG_CMD_PXE
+#define CONFIG_MENU
+#endif
+
+/* Enable devicetree support */
+#define CONFIG_OF_LIBFDT
+
+/* Enable Time Command */
+#define CONFIG_CMD_TIME
+
+#endif /* __CONFIG_H */