taurus, spl: erase also spi flash if recovery button is pressed
authorHeiko Schocher <hs@denx.de>
Tue, 18 Nov 2014 08:41:58 +0000 (09:41 +0100)
committerAndreas Bießmann <andreas.devel@googlemail.com>
Mon, 19 Jan 2015 11:49:28 +0000 (12:49 +0100)
if in SPL mode recovery button is pressed, erase also spi flash
from offset 0 to CONFIG_SYS_NAND_U_BOOT_SIZE on the taurus board.

Signed-off-by: Heiko Schocher <hs@denx.de>
board/siemens/taurus/taurus.c
include/configs/taurus.h

index b8ff478110287c89bbd3fa274ff4e3eae28e5298..013dac2e2fb131baa83ae883c1eb514c26f55ef1 100644 (file)
@@ -68,6 +68,7 @@ static void taurus_nand_hw_init(void)
 #if defined(CONFIG_SPL_BUILD)
 #include <spl.h>
 #include <nand.h>
+#include <spi_flash.h>
 
 void matrix_init(void)
 {
@@ -81,23 +82,28 @@ void matrix_init(void)
 void at91_spl_board_init(void)
 {
        taurus_nand_hw_init();
+       at91_spi0_hw_init(TAURUS_SPI_MASK);
 
        /* Configure recovery button PINs */
        at91_set_gpio_input(AT91_PIN_PA31, 1);
 
        /* check if button is pressed */
        if (at91_get_gpio_value(AT91_PIN_PA31) == 0) {
-               u32 boot_device;
+               struct spi_flash *flash;
 
                debug("Recovery button pressed\n");
-               boot_device = spl_boot_device();
-               switch (boot_device) {
-#ifdef CONFIG_SPL_NAND_SUPPORT
-               case BOOT_DEVICE_NAND:
-                       nand_init();
-                       spl_nand_erase_one(0, 0);
-                       break;
-#endif
+               nand_init();
+               spl_nand_erase_one(0, 0);
+               flash = spi_flash_probe(CONFIG_SF_DEFAULT_BUS,
+                                       0,
+                                       CONFIG_SF_DEFAULT_SPEED,
+                                       SPI_MODE_3);
+               if (!flash) {
+                       puts("no flash\n");
+               } else {
+                       puts("erase spi flash sector 0\n");
+                       spi_flash_erase(flash, 0,
+                                       CONFIG_SYS_NAND_U_BOOT_SIZE);
                }
        }
 }
index 06725cddc944ddf5e656b65a6b4d4a05824c82d0..65468ad1656dad3bbd66fea5fcc8b9b7d6590201 100644 (file)
 #define TAURUS_SPI_MASK (1 << 4)
 #define TAURUS_SPI_CS_PIN      AT91_PIN_PA3
 
+#if defined(CONFIG_SPL_BUILD)
+/* SPL related */
+#undef CONFIG_SPL_OS_BOOT              /* Not supported by existing map */
+#define CONFIG_SPL_SPI_SUPPORT
+#define CONFIG_SPL_SPI_FLASH_SUPPORT
+#define CONFIG_SPL_SPI_LOAD
+#define CONFIG_SYS_SPI_U_BOOT_OFFS     0x20000
+
+#define CONFIG_SF_DEFAULT_BUS 0
+#define CONFIG_SF_DEFAULT_SPEED 10000000
+#define CONFIG_SF_DEFAULT_MODE SPI_MODE_0
+#endif
+
 /* load address */
 #define CONFIG_SYS_LOAD_ADDR                   0x22000000
 
 /* Defines for SPL */
 #define CONFIG_SPL_FRAMEWORK
 #define CONFIG_SPL_TEXT_BASE           0x0
-#define CONFIG_SPL_MAX_SIZE            (11 * 1024)
+#define CONFIG_SPL_MAX_SIZE            (14 * 1024)
 #define CONFIG_SPL_STACK               (16 * 1024)
+#define CONFIG_SYS_SPL_MALLOC_START     (CONFIG_SYS_TEXT_BASE - \
+                                       CONFIG_SYS_MALLOC_LEN)
+#define CONFIG_SYS_SPL_MALLOC_SIZE      CONFIG_SYS_MALLOC_LEN
 
 #define CONFIG_SPL_BSS_START_ADDR      CONFIG_SPL_MAX_SIZE
 #define CONFIG_SPL_BSS_MAX_SIZE                (3 * 1024)