net: phy: do not read configuration register on reset
authorStefan Agner <stefan@agner.ch>
Wed, 9 Dec 2015 19:21:25 +0000 (11:21 -0800)
committerJoe Hershberger <joe.hershberger@ni.com>
Thu, 28 Jan 2016 18:22:00 +0000 (12:22 -0600)
When doing a software reset, the reset flag should be written without
other bits set. Writing the current state will lead to restoring the
state of the PHY (e.g. Powerdown), which is not what is expected from
a software reset.

Signed-off-by: Stefan Agner <stefan@agner.ch>
Acked-by: Michael Welling <mwelling@ieee.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
drivers/net/phy/phy.c

index 51b5746a5a49739c2b71e0a87e115b644f98b6e7..ef9f13bd46f4523d4abf846f0c3488b76d68e9fd 100644 (file)
@@ -717,15 +717,7 @@ int phy_reset(struct phy_device *phydev)
        }
 #endif
 
-       reg = phy_read(phydev, devad, MII_BMCR);
-       if (reg < 0) {
-               debug("PHY status read failed\n");
-               return -1;
-       }
-
-       reg |= BMCR_RESET;
-
-       if (phy_write(phydev, devad, MII_BMCR, reg) < 0) {
+       if (phy_write(phydev, devad, MII_BMCR, BMCR_RESET) < 0) {
                debug("PHY reset failed\n");
                return -1;
        }
@@ -738,6 +730,7 @@ int phy_reset(struct phy_device *phydev)
         * auto-clearing).  This should happen within 0.5 seconds per the
         * IEEE spec.
         */
+       reg = phy_read(phydev, devad, MII_BMCR);
        while ((reg & BMCR_RESET) && timeout--) {
                reg = phy_read(phydev, devad, MII_BMCR);